1// SPDX-License-Identifier: GPL-2.0 OR MIT 2/* 3 * Copyright (C) 2022 StarFive Technology Co., Ltd. 4 * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk> 5 */ 6 7/dts-v1/; 8#include "jh7110.dtsi" 9#include "jh7110-pinfunc.h" 10#include <dt-bindings/gpio/gpio.h> 11 12/ { 13 aliases { 14 ethernet0 = &gmac0; 15 i2c0 = &i2c0; 16 i2c2 = &i2c2; 17 i2c5 = &i2c5; 18 i2c6 = &i2c6; 19 mmc0 = &mmc0; 20 mmc1 = &mmc1; 21 serial0 = &uart0; 22 }; 23 24 chosen { 25 stdout-path = "serial0:115200n8"; 26 }; 27 28 memory@40000000 { 29 device_type = "memory"; 30 reg = <0x0 0x40000000 0x1 0x0>; 31 }; 32 33 gpio-restart { 34 compatible = "gpio-restart"; 35 gpios = <&sysgpio 35 GPIO_ACTIVE_HIGH>; 36 priority = <224>; 37 }; 38 39 pwmdac_codec: audio-codec { 40 compatible = "linux,spdif-dit"; 41 #sound-dai-cells = <0>; 42 }; 43 44 sound { 45 compatible = "simple-audio-card"; 46 simple-audio-card,name = "StarFive-PWMDAC-Sound-Card"; 47 #address-cells = <1>; 48 #size-cells = <0>; 49 50 simple-audio-card,dai-link@0 { 51 reg = <0>; 52 format = "left_j"; 53 bitclock-master = <&sndcpu0>; 54 frame-master = <&sndcpu0>; 55 56 sndcpu0: cpu { 57 sound-dai = <&pwmdac>; 58 }; 59 60 codec { 61 sound-dai = <&pwmdac_codec>; 62 }; 63 }; 64 }; 65}; 66 67&cpus { 68 timebase-frequency = <4000000>; 69}; 70 71&dvp_clk { 72 clock-frequency = <74250000>; 73}; 74 75&gmac0_rgmii_rxin { 76 clock-frequency = <125000000>; 77}; 78 79&gmac0_rmii_refin { 80 clock-frequency = <50000000>; 81}; 82 83&gmac1_rgmii_rxin { 84 clock-frequency = <125000000>; 85}; 86 87&gmac1_rmii_refin { 88 clock-frequency = <50000000>; 89}; 90 91&hdmitx0_pixelclk { 92 clock-frequency = <297000000>; 93}; 94 95&i2srx_bclk_ext { 96 clock-frequency = <12288000>; 97}; 98 99&i2srx_lrck_ext { 100 clock-frequency = <192000>; 101}; 102 103&i2stx_bclk_ext { 104 clock-frequency = <12288000>; 105}; 106 107&i2stx_lrck_ext { 108 clock-frequency = <192000>; 109}; 110 111&mclk_ext { 112 clock-frequency = <12288000>; 113}; 114 115&osc { 116 clock-frequency = <24000000>; 117}; 118 119&rtc_osc { 120 clock-frequency = <32768>; 121}; 122 123&tdm_ext { 124 clock-frequency = <49152000>; 125}; 126 127&camss { 128 assigned-clocks = <&ispcrg JH7110_ISPCLK_DOM4_APB_FUNC>, 129 <&ispcrg JH7110_ISPCLK_MIPI_RX0_PXL>; 130 assigned-clock-rates = <49500000>, <198000000>; 131 status = "okay"; 132 133 ports { 134 #address-cells = <1>; 135 #size-cells = <0>; 136 137 port@0 { 138 reg = <0>; 139 }; 140 141 port@1 { 142 reg = <1>; 143 144 camss_from_csi2rx: endpoint { 145 remote-endpoint = <&csi2rx_to_camss>; 146 }; 147 }; 148 }; 149}; 150 151&csi2rx { 152 assigned-clocks = <&ispcrg JH7110_ISPCLK_VIN_SYS>; 153 assigned-clock-rates = <297000000>; 154 status = "okay"; 155 156 ports { 157 #address-cells = <1>; 158 #size-cells = <0>; 159 160 port@0 { 161 reg = <0>; 162 163 /* remote MIPI sensor endpoint */ 164 }; 165 166 port@1 { 167 reg = <1>; 168 169 csi2rx_to_camss: endpoint { 170 remote-endpoint = <&camss_from_csi2rx>; 171 }; 172 }; 173 }; 174}; 175 176&gmac0 { 177 phy-handle = <&phy0>; 178 phy-mode = "rgmii-id"; 179 status = "okay"; 180 181 mdio { 182 #address-cells = <1>; 183 #size-cells = <0>; 184 compatible = "snps,dwmac-mdio"; 185 186 phy0: ethernet-phy@0 { 187 reg = <0>; 188 }; 189 }; 190}; 191 192&i2c0 { 193 clock-frequency = <100000>; 194 i2c-sda-hold-time-ns = <300>; 195 i2c-sda-falling-time-ns = <510>; 196 i2c-scl-falling-time-ns = <510>; 197 pinctrl-names = "default"; 198 pinctrl-0 = <&i2c0_pins>; 199 status = "okay"; 200}; 201 202&i2c2 { 203 clock-frequency = <100000>; 204 i2c-sda-hold-time-ns = <300>; 205 i2c-sda-falling-time-ns = <510>; 206 i2c-scl-falling-time-ns = <510>; 207 pinctrl-names = "default"; 208 pinctrl-0 = <&i2c2_pins>; 209 status = "okay"; 210}; 211 212&i2c5 { 213 clock-frequency = <100000>; 214 i2c-sda-hold-time-ns = <300>; 215 i2c-sda-falling-time-ns = <510>; 216 i2c-scl-falling-time-ns = <510>; 217 pinctrl-names = "default"; 218 pinctrl-0 = <&i2c5_pins>; 219 status = "okay"; 220 221 axp15060: pmic@36 { 222 compatible = "x-powers,axp15060"; 223 reg = <0x36>; 224 interrupt-controller; 225 #interrupt-cells = <1>; 226 227 regulators { 228 vcc_3v3: dcdc1 { 229 regulator-boot-on; 230 regulator-always-on; 231 regulator-min-microvolt = <3300000>; 232 regulator-max-microvolt = <3300000>; 233 regulator-name = "vcc_3v3"; 234 }; 235 236 vdd_cpu: dcdc2 { 237 regulator-always-on; 238 regulator-min-microvolt = <500000>; 239 regulator-max-microvolt = <1540000>; 240 regulator-name = "vdd-cpu"; 241 }; 242 243 emmc_vdd: aldo4 { 244 regulator-boot-on; 245 regulator-always-on; 246 regulator-min-microvolt = <1800000>; 247 regulator-max-microvolt = <3300000>; 248 regulator-name = "emmc_vdd"; 249 }; 250 }; 251 }; 252}; 253 254&i2c6 { 255 clock-frequency = <100000>; 256 i2c-sda-hold-time-ns = <300>; 257 i2c-sda-falling-time-ns = <510>; 258 i2c-scl-falling-time-ns = <510>; 259 pinctrl-names = "default"; 260 pinctrl-0 = <&i2c6_pins>; 261 status = "okay"; 262}; 263 264&mmc0 { 265 max-frequency = <100000000>; 266 assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO0_SDCARD>; 267 assigned-clock-rates = <50000000>; 268 bus-width = <8>; 269 cap-mmc-highspeed; 270 mmc-ddr-1_8v; 271 mmc-hs200-1_8v; 272 cap-mmc-hw-reset; 273 post-power-on-delay-ms = <200>; 274 pinctrl-names = "default"; 275 pinctrl-0 = <&mmc0_pins>; 276 vmmc-supply = <&vcc_3v3>; 277 vqmmc-supply = <&emmc_vdd>; 278 status = "okay"; 279}; 280 281&mmc1 { 282 max-frequency = <100000000>; 283 assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO1_SDCARD>; 284 assigned-clock-rates = <50000000>; 285 bus-width = <4>; 286 no-sdio; 287 no-mmc; 288 cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>; 289 disable-wp; 290 cap-sd-highspeed; 291 post-power-on-delay-ms = <200>; 292 pinctrl-names = "default"; 293 pinctrl-0 = <&mmc1_pins>; 294 status = "okay"; 295}; 296 297&pcie0 { 298 perst-gpios = <&sysgpio 26 GPIO_ACTIVE_LOW>; 299 phys = <&pciephy0>; 300 pinctrl-names = "default"; 301 pinctrl-0 = <&pcie0_pins>; 302}; 303 304&pcie1 { 305 perst-gpios = <&sysgpio 28 GPIO_ACTIVE_LOW>; 306 phys = <&pciephy1>; 307 pinctrl-names = "default"; 308 pinctrl-0 = <&pcie1_pins>; 309}; 310 311&pwmdac { 312 pinctrl-names = "default"; 313 pinctrl-0 = <&pwmdac_pins>; 314 status = "okay"; 315}; 316 317&qspi { 318 #address-cells = <1>; 319 #size-cells = <0>; 320 status = "okay"; 321 322 nor_flash: flash@0 { 323 compatible = "jedec,spi-nor"; 324 reg = <0>; 325 cdns,read-delay = <5>; 326 spi-max-frequency = <12000000>; 327 cdns,tshsl-ns = <1>; 328 cdns,tsd2d-ns = <1>; 329 cdns,tchsh-ns = <1>; 330 cdns,tslch-ns = <1>; 331 332 partitions { 333 compatible = "fixed-partitions"; 334 #address-cells = <1>; 335 #size-cells = <1>; 336 337 spl@0 { 338 reg = <0x0 0xf0000>; 339 }; 340 uboot-env@f0000 { 341 reg = <0xf0000 0x10000>; 342 }; 343 uboot@100000 { 344 reg = <0x100000 0xf00000>; 345 }; 346 }; 347 }; 348}; 349 350&pwm { 351 pinctrl-names = "default"; 352 pinctrl-0 = <&pwm_pins>; 353 status = "okay"; 354}; 355 356&spi0 { 357 pinctrl-names = "default"; 358 pinctrl-0 = <&spi0_pins>; 359 status = "okay"; 360 361 spi_dev0: spi@0 { 362 compatible = "rohm,dh2228fv"; 363 reg = <0>; 364 spi-max-frequency = <10000000>; 365 }; 366}; 367 368&sysgpio { 369 i2c0_pins: i2c0-0 { 370 i2c-pins { 371 pinmux = <GPIOMUX(57, GPOUT_LOW, 372 GPOEN_SYS_I2C0_CLK, 373 GPI_SYS_I2C0_CLK)>, 374 <GPIOMUX(58, GPOUT_LOW, 375 GPOEN_SYS_I2C0_DATA, 376 GPI_SYS_I2C0_DATA)>; 377 bias-disable; /* external pull-up */ 378 input-enable; 379 input-schmitt-enable; 380 }; 381 }; 382 383 i2c2_pins: i2c2-0 { 384 i2c-pins { 385 pinmux = <GPIOMUX(3, GPOUT_LOW, 386 GPOEN_SYS_I2C2_CLK, 387 GPI_SYS_I2C2_CLK)>, 388 <GPIOMUX(2, GPOUT_LOW, 389 GPOEN_SYS_I2C2_DATA, 390 GPI_SYS_I2C2_DATA)>; 391 bias-disable; /* external pull-up */ 392 input-enable; 393 input-schmitt-enable; 394 }; 395 }; 396 397 i2c5_pins: i2c5-0 { 398 i2c-pins { 399 pinmux = <GPIOMUX(19, GPOUT_LOW, 400 GPOEN_SYS_I2C5_CLK, 401 GPI_SYS_I2C5_CLK)>, 402 <GPIOMUX(20, GPOUT_LOW, 403 GPOEN_SYS_I2C5_DATA, 404 GPI_SYS_I2C5_DATA)>; 405 bias-disable; /* external pull-up */ 406 input-enable; 407 input-schmitt-enable; 408 }; 409 }; 410 411 i2c6_pins: i2c6-0 { 412 i2c-pins { 413 pinmux = <GPIOMUX(16, GPOUT_LOW, 414 GPOEN_SYS_I2C6_CLK, 415 GPI_SYS_I2C6_CLK)>, 416 <GPIOMUX(17, GPOUT_LOW, 417 GPOEN_SYS_I2C6_DATA, 418 GPI_SYS_I2C6_DATA)>; 419 bias-disable; /* external pull-up */ 420 input-enable; 421 input-schmitt-enable; 422 }; 423 }; 424 425 mmc0_pins: mmc0-0 { 426 rst-pins { 427 pinmux = <GPIOMUX(62, GPOUT_SYS_SDIO0_RST, 428 GPOEN_ENABLE, 429 GPI_NONE)>; 430 bias-pull-up; 431 drive-strength = <12>; 432 input-disable; 433 input-schmitt-disable; 434 slew-rate = <0>; 435 }; 436 437 mmc-pins { 438 pinmux = <PINMUX(64, 0)>, 439 <PINMUX(65, 0)>, 440 <PINMUX(66, 0)>, 441 <PINMUX(67, 0)>, 442 <PINMUX(68, 0)>, 443 <PINMUX(69, 0)>, 444 <PINMUX(70, 0)>, 445 <PINMUX(71, 0)>, 446 <PINMUX(72, 0)>, 447 <PINMUX(73, 0)>; 448 bias-pull-up; 449 drive-strength = <12>; 450 input-enable; 451 }; 452 }; 453 454 mmc1_pins: mmc1-0 { 455 clk-pins { 456 pinmux = <GPIOMUX(10, GPOUT_SYS_SDIO1_CLK, 457 GPOEN_ENABLE, 458 GPI_NONE)>; 459 bias-pull-up; 460 drive-strength = <12>; 461 input-disable; 462 input-schmitt-disable; 463 slew-rate = <0>; 464 }; 465 466 mmc-pins { 467 pinmux = <GPIOMUX(9, GPOUT_SYS_SDIO1_CMD, 468 GPOEN_SYS_SDIO1_CMD, 469 GPI_SYS_SDIO1_CMD)>, 470 <GPIOMUX(11, GPOUT_SYS_SDIO1_DATA0, 471 GPOEN_SYS_SDIO1_DATA0, 472 GPI_SYS_SDIO1_DATA0)>, 473 <GPIOMUX(12, GPOUT_SYS_SDIO1_DATA1, 474 GPOEN_SYS_SDIO1_DATA1, 475 GPI_SYS_SDIO1_DATA1)>, 476 <GPIOMUX(7, GPOUT_SYS_SDIO1_DATA2, 477 GPOEN_SYS_SDIO1_DATA2, 478 GPI_SYS_SDIO1_DATA2)>, 479 <GPIOMUX(8, GPOUT_SYS_SDIO1_DATA3, 480 GPOEN_SYS_SDIO1_DATA3, 481 GPI_SYS_SDIO1_DATA3)>; 482 bias-pull-up; 483 drive-strength = <12>; 484 input-enable; 485 input-schmitt-enable; 486 slew-rate = <0>; 487 }; 488 }; 489 490 pcie0_pins: pcie0-0 { 491 clkreq-pins { 492 pinmux = <GPIOMUX(27, GPOUT_LOW, 493 GPOEN_DISABLE, 494 GPI_NONE)>; 495 bias-pull-down; 496 drive-strength = <2>; 497 input-enable; 498 input-schmitt-disable; 499 slew-rate = <0>; 500 }; 501 502 wake-pins { 503 pinmux = <GPIOMUX(32, GPOUT_LOW, 504 GPOEN_DISABLE, 505 GPI_NONE)>; 506 bias-pull-up; 507 drive-strength = <2>; 508 input-enable; 509 input-schmitt-disable; 510 slew-rate = <0>; 511 }; 512 }; 513 514 pcie1_pins: pcie1-0 { 515 clkreq-pins { 516 pinmux = <GPIOMUX(29, GPOUT_LOW, 517 GPOEN_DISABLE, 518 GPI_NONE)>; 519 bias-pull-down; 520 drive-strength = <2>; 521 input-enable; 522 input-schmitt-disable; 523 slew-rate = <0>; 524 }; 525 526 wake-pins { 527 pinmux = <GPIOMUX(21, GPOUT_LOW, 528 GPOEN_DISABLE, 529 GPI_NONE)>; 530 bias-pull-up; 531 drive-strength = <2>; 532 input-enable; 533 input-schmitt-disable; 534 slew-rate = <0>; 535 }; 536 }; 537 538 pwmdac_pins: pwmdac-0 { 539 pwmdac-pins { 540 pinmux = <GPIOMUX(33, GPOUT_SYS_PWMDAC_LEFT, 541 GPOEN_ENABLE, 542 GPI_NONE)>, 543 <GPIOMUX(34, GPOUT_SYS_PWMDAC_RIGHT, 544 GPOEN_ENABLE, 545 GPI_NONE)>; 546 bias-disable; 547 drive-strength = <2>; 548 input-disable; 549 input-schmitt-disable; 550 slew-rate = <0>; 551 }; 552 }; 553 554 pwm_pins: pwm-0 { 555 pwm-pins { 556 pinmux = <GPIOMUX(46, GPOUT_SYS_PWM_CHANNEL0, 557 GPOEN_SYS_PWM0_CHANNEL0, 558 GPI_NONE)>, 559 <GPIOMUX(59, GPOUT_SYS_PWM_CHANNEL1, 560 GPOEN_SYS_PWM0_CHANNEL1, 561 GPI_NONE)>; 562 bias-disable; 563 drive-strength = <12>; 564 input-disable; 565 input-schmitt-disable; 566 slew-rate = <0>; 567 }; 568 }; 569 570 spi0_pins: spi0-0 { 571 mosi-pins { 572 pinmux = <GPIOMUX(52, GPOUT_SYS_SPI0_TXD, 573 GPOEN_ENABLE, 574 GPI_NONE)>; 575 bias-disable; 576 input-disable; 577 input-schmitt-disable; 578 }; 579 580 miso-pins { 581 pinmux = <GPIOMUX(53, GPOUT_LOW, 582 GPOEN_DISABLE, 583 GPI_SYS_SPI0_RXD)>; 584 bias-pull-up; 585 input-enable; 586 input-schmitt-enable; 587 }; 588 589 sck-pins { 590 pinmux = <GPIOMUX(48, GPOUT_SYS_SPI0_CLK, 591 GPOEN_ENABLE, 592 GPI_SYS_SPI0_CLK)>; 593 bias-disable; 594 input-disable; 595 input-schmitt-disable; 596 }; 597 598 ss-pins { 599 pinmux = <GPIOMUX(49, GPOUT_SYS_SPI0_FSS, 600 GPOEN_ENABLE, 601 GPI_SYS_SPI0_FSS)>; 602 bias-disable; 603 input-disable; 604 input-schmitt-disable; 605 }; 606 }; 607 608 uart0_pins: uart0-0 { 609 tx-pins { 610 pinmux = <GPIOMUX(5, GPOUT_SYS_UART0_TX, 611 GPOEN_ENABLE, 612 GPI_NONE)>; 613 bias-disable; 614 drive-strength = <12>; 615 input-disable; 616 input-schmitt-disable; 617 slew-rate = <0>; 618 }; 619 620 rx-pins { 621 pinmux = <GPIOMUX(6, GPOUT_LOW, 622 GPOEN_DISABLE, 623 GPI_SYS_UART0_RX)>; 624 bias-disable; /* external pull-up */ 625 drive-strength = <2>; 626 input-enable; 627 input-schmitt-enable; 628 slew-rate = <0>; 629 }; 630 }; 631}; 632 633&uart0 { 634 pinctrl-names = "default"; 635 pinctrl-0 = <&uart0_pins>; 636 status = "okay"; 637}; 638 639&usb0 { 640 dr_mode = "peripheral"; 641 status = "okay"; 642}; 643 644&U74_1 { 645 cpu-supply = <&vdd_cpu>; 646}; 647 648&U74_2 { 649 cpu-supply = <&vdd_cpu>; 650}; 651 652&U74_3 { 653 cpu-supply = <&vdd_cpu>; 654}; 655 656&U74_4 { 657 cpu-supply = <&vdd_cpu>; 658}; 659