xref: /linux/arch/riscv/boot/dts/microchip/mpfs-tysom-m.dts (revision fc2d791a43d3880496d1c729b8bd74d2c19cb4e7) 
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Original all-in-one devicetree:
4 * Copyright (C) 2020-2022 - Aldec
5 * Rewritten to use includes:
6 * Copyright (C) 2022 - Conor Dooley <conor.dooley@microchip.com>
7 */
8
9/dts-v1/;
10
11#include "mpfs.dtsi"
12#include "mpfs-tysom-m-fabric.dtsi"
13
14/ {
15	model = "Aldec TySOM-M-MPFS250T-REV2";
16	compatible = "aldec,tysom-m-mpfs250t-rev2", "microchip,mpfs";
17
18	aliases {
19		ethernet0 = &mac0;
20		ethernet1 = &mac1;
21		serial0 = &mmuart0;
22		serial1 = &mmuart1;
23		serial2 = &mmuart2;
24		serial3 = &mmuart3;
25		serial4 = &mmuart4;
26		gpio0 = &gpio0;
27		gpio1 = &gpio2;
28	};
29
30	chosen {
31		stdout-path = "serial1:115200n8";
32	};
33
34	ddrc_cache_lo: memory@80000000 {
35		device_type = "memory";
36		reg = <0x0 0x80000000 0x0 0x30000000>;
37		status = "okay";
38	};
39
40	ddrc_cache_hi: memory@1000000000 {
41		device_type = "memory";
42		reg = <0x10 0x00000000 0x0 0x40000000>;
43		status = "okay";
44	};
45
46	leds {
47		compatible = "gpio-leds";
48		status = "okay";
49
50		led0 {
51			gpios = <&gpio1 23 1>;
52			default-state = "on";
53			linux,default-trigger = "heartbeat";
54		};
55	};
56};
57
58&i2c0 {
59	status = "okay";
60};
61
62&i2c1 {
63	status = "okay";
64	hwmon: hwmon@45 {
65		status = "okay";
66		compatible = "ti,ina219";
67		reg = <0x45>;
68		shunt-resistor = <2000>;
69	};
70};
71
72&irqmux {
73	interrupt-map = <0 &plic 13>, <1 &plic 14>, <2 &plic 15>,
74			<3 &plic 16>, <4 &plic 17>, <5 &plic 18>,
75			<6 &plic 19>, <7 &plic 20>, <8 &plic 21>,
76			<9 &plic 22>, <10 &plic 23>, <11 &plic 24>,
77			<12 &plic 25>, <13 &plic 26>,
78
79			<32 &plic 27>, <33 &plic 28>, <34 &plic 29>,
80			<35 &plic 30>, <36 &plic 31>, <37 &plic 32>,
81			<38 &plic 33>, <39 &plic 34>, <40 &plic 35>,
82			<41 &plic 36>, <42 &plic 37>, <43 &plic 38>,
83			<44 &plic 39>, <45 &plic 40>, <46 &plic 41>,
84			<47 &plic 42>, <48 &plic 43>, <49 &plic 44>,
85			<50 &plic 45>, <51 &plic 46>, <52 &plic 47>,
86			<53 &plic 48>, <54 &plic 49>, <55 &plic 50>,
87
88			<64 &plic 53>, <65 &plic 53>, <66 &plic 53>,
89			<67 &plic 53>, <68 &plic 53>, <69 &plic 53>,
90			<70 &plic 53>, <71 &plic 53>, <72 &plic 53>,
91			<73 &plic 53>, <74 &plic 53>, <75 &plic 53>,
92			<76 &plic 53>, <77 &plic 53>, <78 &plic 53>,
93			<79 &plic 53>, <80 &plic 53>, <81 &plic 53>,
94			<82 &plic 53>, <83 &plic 53>, <84 &plic 53>,
95			<85 &plic 53>, <86 &plic 53>, <87 &plic 53>,
96			<88 &plic 53>, <89 &plic 53>, <90 &plic 53>,
97			<91 &plic 53>, <92 &plic 53>, <93 &plic 53>,
98			<94 &plic 53>, <95 &plic 53>;
99};
100
101&gpio1 {
102	status = "okay";
103};
104
105&mac0 {
106	status = "okay";
107	phy-mode = "gmii";
108	phy-handle = <&phy0>;
109
110};
111
112&mac1 {
113	status = "okay";
114	phy-mode = "gmii";
115	phy-handle = <&phy1>;
116	phy1: ethernet-phy@1 {
117		reg = <1>;
118	};
119	phy0: ethernet-phy@0 {
120		reg = <0>;
121	};
122};
123
124&mbox {
125	status = "okay";
126};
127
128&mmc {
129	max-frequency = <200000000>;
130	cap-mmc-highspeed;
131	cap-sd-highspeed;
132	no-1-8-v;
133	disable-wp;
134	status = "okay";
135};
136
137&mmuart1 {
138	status = "okay";
139};
140
141&mmuart2 {
142	status = "okay";
143};
144
145&mmuart3 {
146	status = "okay";
147};
148
149&mmuart4 {
150	status = "okay";
151};
152
153&refclk {
154	clock-frequency = <125000000>;
155};
156
157&rtc {
158	status = "okay";
159};
160
161&spi0 {
162	status = "okay";
163};
164
165&spi1 {
166	status = "okay";
167	flash@0 {
168		compatible = "micron,n25q128a11", "jedec,spi-nor";
169		reg = <0x0>;
170		spi-max-frequency = <10000000>;
171	};
172};
173
174&syscontroller {
175	status = "okay";
176};
177
178&usb {
179	status = "okay";
180	dr_mode = "host";
181};
182