xref: /linux/arch/riscv/boot/dts/microchip/mpfs-m100pfsevp.dts (revision fc2d791a43d3880496d1c729b8bd74d2c19cb4e7) 
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Original all-in-one devicetree:
4 * Copyright (C) 2021-2022 - Wolfgang Grandegger <wg@aries-embedded.de>
5 * Rewritten to use includes:
6 * Copyright (C) 2022 - Conor Dooley <conor.dooley@microchip.com>
7 */
8/dts-v1/;
9
10#include "mpfs.dtsi"
11#include "mpfs-m100pfs-fabric.dtsi"
12
13/ {
14	model = "Aries Embedded M100PFEVPS";
15	compatible = "aries,m100pfsevp", "microchip,mpfs";
16
17	aliases {
18		ethernet0 = &mac0;
19		ethernet1 = &mac1;
20		serial0 = &mmuart0;
21		serial1 = &mmuart1;
22		serial2 = &mmuart2;
23		serial3 = &mmuart3;
24		serial4 = &mmuart4;
25		gpio0 = &gpio0;
26		gpio1 = &gpio2;
27	};
28
29	chosen {
30		stdout-path = "serial1:115200n8";
31	};
32
33	ddrc_cache_lo: memory@80000000 {
34		device_type = "memory";
35		reg = <0x0 0x80000000 0x0 0x40000000>;
36	};
37	ddrc_cache_hi: memory@1040000000 {
38		device_type = "memory";
39		reg = <0x10 0x40000000 0x0 0x40000000>;
40	};
41};
42
43&can0 {
44	status = "okay";
45};
46
47&i2c0 {
48	status = "okay";
49};
50
51&i2c1 {
52	status = "okay";
53};
54
55&irqmux {
56	interrupt-map = <0 &plic 13>, <1 &plic 14>, <2 &plic 15>,
57			<3 &plic 16>, <4 &plic 17>, <5 &plic 18>,
58			<6 &plic 19>, <7 &plic 20>, <8 &plic 21>,
59			<9 &plic 22>, <10 &plic 23>, <11 &plic 24>,
60			<12 &plic 25>, <13 &plic 26>,
61
62			<32 &plic 27>, <33 &plic 28>, <34 &plic 29>,
63			<35 &plic 30>, <36 &plic 31>, <37 &plic 32>,
64			<38 &plic 33>, <39 &plic 34>, <40 &plic 35>,
65			<41 &plic 36>, <42 &plic 37>, <43 &plic 38>,
66			<44 &plic 39>, <45 &plic 40>, <46 &plic 41>,
67			<47 &plic 42>, <48 &plic 43>, <49 &plic 44>,
68			<50 &plic 45>, <51 &plic 46>, <52 &plic 47>,
69			<53 &plic 48>, <54 &plic 49>, <55 &plic 50>,
70
71			<64 &plic 53>, <65 &plic 53>, <66 &plic 53>,
72			<67 &plic 53>, <68 &plic 53>, <69 &plic 53>,
73			<70 &plic 53>, <71 &plic 53>, <72 &plic 53>,
74			<73 &plic 53>, <74 &plic 53>, <75 &plic 53>,
75			<76 &plic 53>, <77 &plic 53>, <78 &plic 53>,
76			<79 &plic 53>, <80 &plic 53>, <81 &plic 53>,
77			<82 &plic 53>, <83 &plic 53>, <84 &plic 53>,
78			<85 &plic 53>, <86 &plic 53>, <87 &plic 53>,
79			<88 &plic 53>, <89 &plic 53>, <90 &plic 53>,
80			<91 &plic 53>, <92 &plic 53>, <93 &plic 53>,
81			<94 &plic 53>, <95 &plic 53>;
82};
83
84&gpio0 {
85	ngpios = <14>;
86	status = "okay";
87
88	pmic-irq-hog {
89		gpio-hog;
90		gpios = <13 0>;
91		input;
92	};
93
94	/* Set to low for eMMC, high for SD-card */
95	mmc-sel-hog {
96		gpio-hog;
97		gpios = <12 0>;
98		output-high;
99	};
100};
101
102&gpio2 {
103	status = "okay";
104};
105
106&mac0 {
107	status = "okay";
108	phy-mode = "gmii";
109	phy-handle = <&phy0>;
110	phy0: ethernet-phy@0 {
111		reg = <0>;
112	};
113};
114
115&mac1 {
116	status = "okay";
117	phy-mode = "gmii";
118	phy-handle = <&phy1>;
119	phy1: ethernet-phy@0 {
120		reg = <0>;
121	};
122};
123
124&mbox {
125	status = "okay";
126};
127
128&mmc {
129	max-frequency = <50000000>;
130	bus-width = <4>;
131	cap-mmc-highspeed;
132	cap-sd-highspeed;
133	no-1-8-v;
134	sd-uhs-sdr12;
135	sd-uhs-sdr25;
136	sd-uhs-sdr50;
137	sd-uhs-sdr104;
138	disable-wp;
139	status = "okay";
140};
141
142&mmuart1 {
143	status = "okay";
144};
145
146&mmuart2 {
147	status = "okay";
148};
149
150&mmuart3 {
151	status = "okay";
152};
153
154&mmuart4 {
155	status = "okay";
156};
157
158&pcie {
159	status = "okay";
160};
161
162&qspi {
163	status = "okay";
164};
165
166&refclk {
167	clock-frequency = <125000000>;
168};
169
170&rtc {
171	status = "okay";
172};
173
174&spi0 {
175	status = "okay";
176};
177
178&spi1 {
179	status = "okay";
180};
181
182&syscontroller {
183	status = "okay";
184};
185
186&usb {
187	status = "okay";
188	dr_mode = "host";
189};
190