1// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2/* Copyright (c) 2020-2021 Microchip Technology Inc */ 3 4/dts-v1/; 5 6#include "mpfs-icicle-kit-common.dtsi" 7 8/ { 9 model = "Microchip PolarFire-SoC Icicle Kit"; 10 compatible = "microchip,mpfs-icicle-es-reference-rtl-v2507", 11 "microchip,mpfs-icicle-kit", 12 "microchip,mpfs"; 13}; 14 15&i2c0 { 16 pinctrl-names = "default"; 17 pinctrl-0 = <&i2c0_fabric>; 18}; 19 20/* 21 * Due to silicon errata, routing via MSS IOs doesn't work on ES devices. 22 * Instead, i2c1, appearing on B1/C1, which are normally MSS IOs, is routed 23 * via the fabric and back to B1/C1 via "fabric-test" functionality. 24 * This is done silently by Libero, so the iomux0 setting for i2c1 has to 25 * be fabric IO, despite tooling etc saying that MSS IOs are used. 26 * 27 * See Section 3.3 of https://ww1.microchip.com/downloads/aemDocuments/documents/FPGA/ProductDocuments/Errata/polarfiresoc/microsemi_polarfire_soc_fpga_egineering_samples_errata_er0219_v1.pdf 28 */ 29&i2c1 { 30 pinctrl-names = "default"; 31 pinctrl-0 = <&i2c1_fabric>; 32}; 33