xref: /linux/arch/riscv/boot/dts/microchip/mpfs-beaglev-fire.dts (revision d30c1683aaecb93d2ab95685dc4300a33d3cea7a) 
1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2/* Copyright (c) 2020-2021 Microchip Technology Inc */
3
4/dts-v1/;
5
6#include <dt-bindings/gpio/gpio.h>
7#include "mpfs.dtsi"
8#include "mpfs-beaglev-fire-fabric.dtsi"
9
10/* Clock frequency (in Hz) of MTIMER */
11#define MTIMER_FREQ		1000000
12
13/ {
14	#address-cells = <2>;
15	#size-cells = <2>;
16	model = "BeagleBoard BeagleV-Fire";
17	compatible = "beagle,beaglev-fire", "microchip,mpfs";
18
19	aliases {
20		serial0 = &mmuart0;
21		serial1 = &mmuart1;
22		serial2 = &mmuart2;
23		serial3 = &mmuart3;
24		serial4 = &mmuart4;
25	};
26
27	chosen {
28		stdout-path = "serial0:115200n8";
29	};
30
31	cpus {
32		timebase-frequency = <MTIMER_FREQ>;
33	};
34
35	ddrc_cache_lo: memory@80000000 {
36		device_type = "memory";
37		reg = <0x0 0x80000000 0x0 0x40000000>;
38		status = "okay";
39	};
40
41	reserved-memory {
42		#address-cells = <2>;
43		#size-cells = <2>;
44		ranges;
45
46		hss: hss-buffer@103fc00000 {
47			compatible = "shared-dma-pool";
48			reg = <0x10 0x3fc00000 0x0 0x400000>;
49			no-map;
50		};
51	};
52
53	imx219_clk: camera-clk {
54		compatible = "fixed-clock";
55		#clock-cells = <0>;
56		clock-frequency = <24000000>;
57	};
58
59	imx219_vana: fixedregulator-0 {
60		compatible = "regulator-fixed";
61		regulator-name = "imx219_vana";
62		regulator-min-microvolt = <2800000>;
63		regulator-max-microvolt = <2800000>;
64	};
65
66	imx219_vdig: fixedregulator-1 {
67		compatible = "regulator-fixed";
68		regulator-name = "imx219_vdig";
69		regulator-min-microvolt = <1800000>;
70		regulator-max-microvolt = <1800000>;
71	};
72
73	imx219_vddl: fixedregulator-2 {
74		compatible = "regulator-fixed";
75		regulator-name = "imx219_vddl";
76		regulator-min-microvolt = <1200000>;
77		regulator-max-microvolt = <1200000>;
78	};
79
80};
81
82&gpio0 {
83	interrupts = <13>, <14>, <15>, <16>,
84		     <17>, <18>, <19>, <20>,
85		     <21>, <22>, <23>, <24>,
86		     <25>, <26>;
87	ngpios = <14>;
88	status = "okay";
89};
90
91&gpio1 {
92	interrupts = <27>, <28>, <29>, <30>,
93		     <31>, <32>, <33>, <34>,
94		     <35>, <36>, <37>, <38>,
95		     <39>, <40>, <41>, <42>,
96		     <43>, <44>, <45>, <46>,
97		     <47>, <48>, <49>, <50>;
98	ngpios = <24>;
99	status = "okay";
100};
101
102&gpio2 {
103	interrupts = <53>, <53>, <53>, <53>,
104		     <53>, <53>, <53>, <53>,
105		     <53>, <53>, <53>, <53>,
106		     <53>, <53>, <53>, <53>,
107		     <53>, <53>, <53>, <53>,
108		     <53>, <53>, <53>, <53>,
109		     <53>, <53>, <53>, <53>,
110		     <53>, <53>, <53>, <53>;
111	ngpios = <32>;
112	gpio-line-names = "P8_PIN3_USER_LED_0", "P8_PIN4_USER_LED_1", "P8_PIN5_USER_LED_2",
113			  "P8_PIN6_USER_LED_3", "P8_PIN7_USER_LED_4", "P8_PIN8_USER_LED_5",
114			  "P8_PIN9_USER_LED_6", "P8_PIN10_USER_LED_7", "P8_PIN11_USER_LED_8",
115			  "P8_PIN12_USER_LED_9", "P8_PIN13_USER_LED_10", "P8_PIN14_USER_LED_11",
116			  "P8_PIN15", "P8_PIN16", "P8_PIN17", "P8_PIN18", "P8_PIN19", "P8_PIN20",
117			  "P8_PIN21", "P8_PIN22", "P8_PIN23", "P8_PIN24", "P8_PIN25", "P8_PIN26",
118			  "P8_PIN27", "P8_PIN28", "P8_PIN29", "P8_PIN30", "M2_W_DISABLE1",
119			  "M2_W_DISABLE2", "VIO_ENABLE", "SD_DET";
120	status = "okay";
121
122	vio-enable-hog {
123		gpio-hog;
124		gpios = <30 30>;
125		output-high;
126		line-name = "VIO_ENABLE";
127	};
128
129	sd-det-hog {
130		gpio-hog;
131		gpios = <31 31>;
132		input;
133		line-name = "SD_DET";
134	};
135};
136
137&i2c0 {
138	status = "okay";
139};
140
141&i2c1 {
142	status = "okay";
143
144	eeprom: eeprom@50 {
145		compatible = "atmel,24c32";
146		reg = <0x50>;
147	};
148
149	imx219: sensor@10 {
150		compatible = "sony,imx219";
151		reg = <0x10>;
152		clocks = <&imx219_clk>;
153		VANA-supply = <&imx219_vana>;   /* 2.8v */
154		VDIG-supply = <&imx219_vdig>;   /* 1.8v */
155		VDDL-supply = <&imx219_vddl>;   /* 1.2v */
156
157		port {
158			imx219_0: endpoint {
159				data-lanes = <1 2>;
160				clock-noncontinuous;
161				link-frequencies = /bits/ 64 <456000000>;
162			};
163		};
164	};
165};
166
167&mac0 {
168	status = "okay";
169	phy-mode = "sgmii";
170	phy-handle = <&phy0>;
171	phy0: ethernet-phy@0 {
172		reg = <0>;
173	};
174};
175
176&mbox {
177	status = "okay";
178};
179
180&mmc {
181	bus-width = <4>;
182	disable-wp;
183	cap-sd-highspeed;
184	cap-mmc-highspeed;
185	mmc-ddr-1_8v;
186	mmc-hs200-1_8v;
187	sd-uhs-sdr12;
188	sd-uhs-sdr25;
189	sd-uhs-sdr50;
190	sd-uhs-sdr104;
191	status = "okay";
192};
193
194&mmuart0 {
195	status = "okay";
196};
197
198&mmuart1 {
199	status = "okay";
200};
201
202&refclk {
203	clock-frequency = <125000000>;
204};
205
206&refclk_ccc {
207	clock-frequency = <50000000>;
208};
209
210&rtc {
211	status = "okay";
212};
213
214&spi0 {
215	status = "okay";
216};
217
218&spi1 {
219	status = "okay";
220};
221
222&qspi {
223	status = "okay";
224	cs-gpios = <&gpio1 17 GPIO_ACTIVE_LOW>, <&gpio0 12 GPIO_ACTIVE_LOW>;
225	num-cs = <2>;
226
227	adc@0 {
228		compatible = "microchip,mcp3464r";
229		reg = <0>; /* CE0 */
230		spi-cpol;
231		spi-cpha;
232		spi-max-frequency = <5000000>;
233		microchip,hw-device-address = <1>;
234		#address-cells = <1>;
235		#size-cells = <0>;
236		status = "okay";
237
238		channel@0 {
239			/* CH0 to AGND */
240			reg = <0>;
241			label = "CH0";
242		};
243
244		channel@1 {
245			/* CH1 to AGND */
246			reg = <1>;
247			label = "CH1";
248		};
249
250		channel@2 {
251			/* CH2 to AGND */
252			reg = <2>;
253			label = "CH2";
254		};
255
256		channel@3 {
257			/* CH3 to AGND */
258			reg = <3>;
259			label = "CH3";
260		};
261
262		channel@4 {
263			/* CH4 to AGND */
264			reg = <4>;
265			label = "CH4";
266		};
267
268		channel@5 {
269			/* CH5 to AGND */
270			reg = <5>;
271			label = "CH5";
272		};
273
274		channel@6 {
275			/* CH6 to AGND */
276			reg = <6>;
277			label = "CH6";
278		};
279
280		channel@7 {
281			/* CH7 is connected to AGND */
282			reg = <7>;
283			label = "CH7";
284		};
285	};
286
287	mmc@1 {
288		compatible = "mmc-spi-slot";
289		reg = <1>;
290		gpios = <&gpio2 31 1>;
291		voltage-ranges = <3300 3300>;
292		spi-max-frequency = <5000000>;
293		disable-wp;
294	};
295};
296
297
298&syscontroller {
299	microchip,bitstream-flash = <&sys_ctrl_flash>;
300	status = "okay";
301};
302
303&syscontroller_qspi {
304	status = "okay";
305
306	sys_ctrl_flash: flash@0 { // MT25QL01GBBB8ESF-0SIT
307		compatible = "jedec,spi-nor";
308		#address-cells = <1>;
309		#size-cells = <1>;
310		spi-max-frequency = <20000000>;
311		spi-rx-bus-width = <1>;
312		reg = <0>;
313	};
314};
315
316&usb {
317	status = "okay";
318	dr_mode = "otg";
319};
320