xref: /linux/arch/riscv/boot/dts/canaan/sipeed_maix_dock.dts (revision 5a4332062e9e71de8e78dc1b389d21e0dd44848b) 
1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com>
4 * Copyright (C) 2020 Western Digital Corporation or its affiliates.
5 */
6
7/dts-v1/;
8
9#include "k210.dtsi"
10
11#include <dt-bindings/gpio/gpio.h>
12#include <dt-bindings/input/input.h>
13#include <dt-bindings/leds/common.h>
14
15/ {
16	model = "SiPeed MAIX Dock";
17	compatible = "sipeed,maix-dock-m1", "sipeed,maix-dock-m1w",
18		     "canaan,kendryte-k210";
19
20	aliases {
21		serial0 = &uarths0;
22	};
23
24	chosen {
25		bootargs = "earlycon console=ttySIF0";
26		stdout-path = "serial0:115200n8";
27	};
28
29	gpio-leds {
30		compatible = "gpio-leds";
31
32		/*
33		 * Note: the board wiring drawing documents green on
34		 * gpio #4, red on gpio #5 and blue on gpio #6. However,
35		 * the board is actually wired differently as defined here.
36		 */
37		led0 {
38			color = <LED_COLOR_ID_BLUE>;
39			label = "blue";
40			gpios = <&gpio1_0 4 GPIO_ACTIVE_LOW>;
41		};
42
43		led1 {
44			color = <LED_COLOR_ID_GREEN>;
45			label = "green";
46			gpios = <&gpio1_0 5 GPIO_ACTIVE_LOW>;
47		};
48
49		led2 {
50			color = <LED_COLOR_ID_RED>;
51			label = "red";
52			gpios = <&gpio1_0 6 GPIO_ACTIVE_LOW>;
53		};
54	};
55
56	gpio-keys {
57		compatible = "gpio-keys";
58
59		key-boot {
60			label = "BOOT";
61			linux,code = <BTN_0>;
62			gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
63		};
64	};
65};
66
67&fpioa {
68	pinctrl-0 = <&jtag_pinctrl>;
69	pinctrl-names = "default";
70
71	jtag_pinctrl: jtag-pinmux {
72		pinmux = <K210_FPIOA(0, K210_PCF_JTAG_TCLK)>,
73			 <K210_FPIOA(1, K210_PCF_JTAG_TDI)>,
74			 <K210_FPIOA(2, K210_PCF_JTAG_TMS)>,
75			 <K210_FPIOA(3, K210_PCF_JTAG_TDO)>;
76	};
77
78	uarths_pinctrl: uarths-pinmux {
79		pinmux = <K210_FPIOA(4, K210_PCF_UARTHS_RX)>,
80			 <K210_FPIOA(5, K210_PCF_UARTHS_TX)>;
81	};
82
83	gpio_pinctrl: gpio-pinmux {
84		pinmux = <K210_FPIOA(8, K210_PCF_GPIO0)>,
85			 <K210_FPIOA(11, K210_PCF_GPIO3)>,
86			 <K210_FPIOA(12, K210_PCF_GPIO4)>,
87			 <K210_FPIOA(13, K210_PCF_GPIO5)>,
88			 <K210_FPIOA(14, K210_PCF_GPIO6)>,
89			 <K210_FPIOA(15, K210_PCF_GPIO7)>;
90	};
91
92	gpiohs_pinctrl: gpiohs-pinmux {
93		pinmux = <K210_FPIOA(16, K210_PCF_GPIOHS0)>,
94			 <K210_FPIOA(17, K210_PCF_GPIOHS1)>,
95			 <K210_FPIOA(21, K210_PCF_GPIOHS5)>,
96			 <K210_FPIOA(22, K210_PCF_GPIOHS6)>,
97			 <K210_FPIOA(23, K210_PCF_GPIOHS7)>,
98			 <K210_FPIOA(24, K210_PCF_GPIOHS8)>,
99			 <K210_FPIOA(25, K210_PCF_GPIOHS9)>,
100			 <K210_FPIOA(32, K210_PCF_GPIOHS16)>,
101			 <K210_FPIOA(33, K210_PCF_GPIOHS17)>,
102			 <K210_FPIOA(34, K210_PCF_GPIOHS18)>,
103			 <K210_FPIOA(35, K210_PCF_GPIOHS19)>;
104	};
105
106	i2s0_pinctrl: i2s0-pinmux {
107		pinmux = <K210_FPIOA(18, K210_PCF_I2S0_SCLK)>,
108			 <K210_FPIOA(19, K210_PCF_I2S0_WS)>,
109			 <K210_FPIOA(20, K210_PCF_I2S0_IN_D0)>;
110	};
111
112	dvp_pinctrl: dvp-pinmux {
113		pinmux = <K210_FPIOA(40, K210_PCF_SCCB_SDA)>,
114			 <K210_FPIOA(41, K210_PCF_SCCB_SCLK)>,
115			 <K210_FPIOA(42, K210_PCF_DVP_RST)>,
116			 <K210_FPIOA(43, K210_PCF_DVP_VSYNC)>,
117			 <K210_FPIOA(44, K210_PCF_DVP_PWDN)>,
118			 <K210_FPIOA(45, K210_PCF_DVP_HSYNC)>,
119			 <K210_FPIOA(46, K210_PCF_DVP_XCLK)>,
120			 <K210_FPIOA(47, K210_PCF_DVP_PCLK)>;
121	};
122
123	spi0_pinctrl: spi0-pinmux {
124		pinmux = <K210_FPIOA(36, K210_PCF_GPIOHS20)>,  /* cs */
125			 <K210_FPIOA(37, K210_PCF_GPIOHS21)>,  /* rst */
126			 <K210_FPIOA(38, K210_PCF_GPIOHS22)>,  /* dc */
127			 <K210_FPIOA(39, K210_PCF_SPI0_SCLK)>; /* wr */
128	};
129
130	spi1_pinctrl: spi1-pinmux {
131		pinmux = <K210_FPIOA(26, K210_PCF_SPI1_D1)>,
132			 <K210_FPIOA(27, K210_PCF_SPI1_SCLK)>,
133			 <K210_FPIOA(28, K210_PCF_SPI1_D0)>,
134			 <K210_FPIOA(29, K210_PCF_GPIOHS13)>; /* cs */
135	};
136
137	i2c1_pinctrl: i2c1-pinmux {
138		pinmux = <K210_FPIOA(9, K210_PCF_I2C1_SCLK)>,
139			 <K210_FPIOA(10, K210_PCF_I2C1_SDA)>;
140	};
141};
142
143&uarths0 {
144	pinctrl-0 = <&uarths_pinctrl>;
145	pinctrl-names = "default";
146	status = "okay";
147};
148
149&gpio0 {
150	pinctrl-0 = <&gpiohs_pinctrl>;
151	pinctrl-names = "default";
152	status = "okay";
153};
154
155&gpio1 {
156	pinctrl-0 = <&gpio_pinctrl>;
157	pinctrl-names = "default";
158	status = "okay";
159};
160
161&i2s0 {
162	#sound-dai-cells = <1>;
163	pinctrl-0 = <&i2s0_pinctrl>;
164	pinctrl-names = "default";
165	status = "okay";
166};
167
168&i2c1 {
169	pinctrl-0 = <&i2c1_pinctrl>;
170	pinctrl-names = "default";
171	clock-frequency = <400000>;
172	status = "okay";
173};
174
175&spi0 {
176	pinctrl-0 = <&spi0_pinctrl>;
177	pinctrl-names = "default";
178	num-cs = <1>;
179	cs-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
180	status = "okay";
181
182	panel@0 {
183		compatible = "sitronix,st7789v";
184		reg = <0>;
185		reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
186		dc-gpios = <&gpio0 22 0>;
187		spi-max-frequency = <15000000>;
188		status = "disabled";
189	};
190};
191
192&spi1 {
193	pinctrl-0 = <&spi1_pinctrl>;
194	pinctrl-names = "default";
195	num-cs = <1>;
196	cs-gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
197	status = "okay";
198
199	mmc@0 {
200		compatible = "mmc-spi-slot";
201		reg = <0>;
202		voltage-ranges = <3300 3300>;
203		spi-max-frequency = <25000000>;
204		broken-cd;
205	};
206};
207
208&spi3 {
209	flash@0 {
210		compatible = "jedec,spi-nor";
211		reg = <0>;
212		spi-max-frequency = <50000000>;
213		spi-tx-bus-width = <4>;
214		spi-rx-bus-width = <4>;
215		m25p,fast-read;
216		broken-flash-reset;
217	};
218};
219