xref: /linux/arch/powerpc/xmon/xmon.c (revision 140eb5227767c6754742020a16d2691222b9c19b)
1 /*
2  * Routines providing a simple monitor for use on the PowerMac.
3  *
4  * Copyright (C) 1996-2005 Paul Mackerras.
5  * Copyright (C) 2001 PPC64 Team, IBM Corp
6  * Copyrignt (C) 2006 Michael Ellerman, IBM Corp
7  *
8  *      This program is free software; you can redistribute it and/or
9  *      modify it under the terms of the GNU General Public License
10  *      as published by the Free Software Foundation; either version
11  *      2 of the License, or (at your option) any later version.
12  */
13 
14 #include <linux/kernel.h>
15 #include <linux/errno.h>
16 #include <linux/sched/signal.h>
17 #include <linux/smp.h>
18 #include <linux/mm.h>
19 #include <linux/reboot.h>
20 #include <linux/delay.h>
21 #include <linux/kallsyms.h>
22 #include <linux/kmsg_dump.h>
23 #include <linux/cpumask.h>
24 #include <linux/export.h>
25 #include <linux/sysrq.h>
26 #include <linux/interrupt.h>
27 #include <linux/irq.h>
28 #include <linux/bug.h>
29 #include <linux/nmi.h>
30 #include <linux/ctype.h>
31 #include <linux/highmem.h>
32 
33 #include <asm/debugfs.h>
34 #include <asm/ptrace.h>
35 #include <asm/smp.h>
36 #include <asm/string.h>
37 #include <asm/prom.h>
38 #include <asm/machdep.h>
39 #include <asm/xmon.h>
40 #include <asm/processor.h>
41 #include <asm/pgtable.h>
42 #include <asm/mmu.h>
43 #include <asm/mmu_context.h>
44 #include <asm/cputable.h>
45 #include <asm/rtas.h>
46 #include <asm/sstep.h>
47 #include <asm/irq_regs.h>
48 #include <asm/spu.h>
49 #include <asm/spu_priv1.h>
50 #include <asm/setjmp.h>
51 #include <asm/reg.h>
52 #include <asm/debug.h>
53 #include <asm/hw_breakpoint.h>
54 #include <asm/xive.h>
55 #include <asm/opal.h>
56 #include <asm/firmware.h>
57 #include <asm/code-patching.h>
58 
59 #ifdef CONFIG_PPC64
60 #include <asm/hvcall.h>
61 #include <asm/paca.h>
62 #endif
63 
64 #if defined(CONFIG_PPC_SPLPAR)
65 #include <asm/plpar_wrappers.h>
66 #else
67 static inline long plapr_set_ciabr(unsigned long ciabr) {return 0; };
68 #endif
69 
70 #include "nonstdio.h"
71 #include "dis-asm.h"
72 
73 #ifdef CONFIG_SMP
74 static cpumask_t cpus_in_xmon = CPU_MASK_NONE;
75 static unsigned long xmon_taken = 1;
76 static int xmon_owner;
77 static int xmon_gate;
78 #else
79 #define xmon_owner 0
80 #endif /* CONFIG_SMP */
81 
82 static unsigned long in_xmon __read_mostly = 0;
83 static int xmon_on = IS_ENABLED(CONFIG_XMON_DEFAULT);
84 
85 static unsigned long adrs;
86 static int size = 1;
87 #define MAX_DUMP (128 * 1024)
88 static unsigned long ndump = 64;
89 static unsigned long nidump = 16;
90 static unsigned long ncsum = 4096;
91 static int termch;
92 static char tmpstr[128];
93 static int tracing_enabled;
94 
95 static long bus_error_jmp[JMP_BUF_LEN];
96 static int catch_memory_errors;
97 static int catch_spr_faults;
98 static long *xmon_fault_jmp[NR_CPUS];
99 
100 /* Breakpoint stuff */
101 struct bpt {
102 	unsigned long	address;
103 	unsigned int	instr[2];
104 	atomic_t	ref_count;
105 	int		enabled;
106 	unsigned long	pad;
107 };
108 
109 /* Bits in bpt.enabled */
110 #define BP_CIABR	1
111 #define BP_TRAP		2
112 #define BP_DABR		4
113 
114 #define NBPTS	256
115 static struct bpt bpts[NBPTS];
116 static struct bpt dabr;
117 static struct bpt *iabr;
118 static unsigned bpinstr = 0x7fe00008;	/* trap */
119 
120 #define BP_NUM(bp)	((bp) - bpts + 1)
121 
122 /* Prototypes */
123 static int cmds(struct pt_regs *);
124 static int mread(unsigned long, void *, int);
125 static int mwrite(unsigned long, void *, int);
126 static int handle_fault(struct pt_regs *);
127 static void byterev(unsigned char *, int);
128 static void memex(void);
129 static int bsesc(void);
130 static void dump(void);
131 static void show_pte(unsigned long);
132 static void prdump(unsigned long, long);
133 static int ppc_inst_dump(unsigned long, long, int);
134 static void dump_log_buf(void);
135 
136 #ifdef CONFIG_PPC_POWERNV
137 static void dump_opal_msglog(void);
138 #else
139 static inline void dump_opal_msglog(void)
140 {
141 	printf("Machine is not running OPAL firmware.\n");
142 }
143 #endif
144 
145 static void backtrace(struct pt_regs *);
146 static void excprint(struct pt_regs *);
147 static void prregs(struct pt_regs *);
148 static void memops(int);
149 static void memlocate(void);
150 static void memzcan(void);
151 static void memdiffs(unsigned char *, unsigned char *, unsigned, unsigned);
152 int skipbl(void);
153 int scanhex(unsigned long *valp);
154 static void scannl(void);
155 static int hexdigit(int);
156 void getstring(char *, int);
157 static void flush_input(void);
158 static int inchar(void);
159 static void take_input(char *);
160 static int  read_spr(int, unsigned long *);
161 static void write_spr(int, unsigned long);
162 static void super_regs(void);
163 static void remove_bpts(void);
164 static void insert_bpts(void);
165 static void remove_cpu_bpts(void);
166 static void insert_cpu_bpts(void);
167 static struct bpt *at_breakpoint(unsigned long pc);
168 static struct bpt *in_breakpoint_table(unsigned long pc, unsigned long *offp);
169 static int  do_step(struct pt_regs *);
170 static void bpt_cmds(void);
171 static void cacheflush(void);
172 static int  cpu_cmd(void);
173 static void csum(void);
174 static void bootcmds(void);
175 static void proccall(void);
176 static void show_tasks(void);
177 void dump_segments(void);
178 static void symbol_lookup(void);
179 static void xmon_show_stack(unsigned long sp, unsigned long lr,
180 			    unsigned long pc);
181 static void xmon_print_symbol(unsigned long address, const char *mid,
182 			      const char *after);
183 static const char *getvecname(unsigned long vec);
184 
185 static int do_spu_cmd(void);
186 
187 #ifdef CONFIG_44x
188 static void dump_tlb_44x(void);
189 #endif
190 #ifdef CONFIG_PPC_BOOK3E
191 static void dump_tlb_book3e(void);
192 #endif
193 
194 #ifdef CONFIG_PPC64
195 #define REG		"%.16lx"
196 #else
197 #define REG		"%.8lx"
198 #endif
199 
200 #ifdef __LITTLE_ENDIAN__
201 #define GETWORD(v)	(((v)[3] << 24) + ((v)[2] << 16) + ((v)[1] << 8) + (v)[0])
202 #else
203 #define GETWORD(v)	(((v)[0] << 24) + ((v)[1] << 16) + ((v)[2] << 8) + (v)[3])
204 #endif
205 
206 static char *help_string = "\
207 Commands:\n\
208   b	show breakpoints\n\
209   bd	set data breakpoint\n\
210   bi	set instruction breakpoint\n\
211   bc	clear breakpoint\n"
212 #ifdef CONFIG_SMP
213   "\
214   c	print cpus stopped in xmon\n\
215   c#	try to switch to cpu number h (in hex)\n"
216 #endif
217   "\
218   C	checksum\n\
219   d	dump bytes\n\
220   d1	dump 1 byte values\n\
221   d2	dump 2 byte values\n\
222   d4	dump 4 byte values\n\
223   d8	dump 8 byte values\n\
224   di	dump instructions\n\
225   df	dump float values\n\
226   dd	dump double values\n\
227   dl    dump the kernel log buffer\n"
228 #ifdef CONFIG_PPC_POWERNV
229   "\
230   do    dump the OPAL message log\n"
231 #endif
232 #ifdef CONFIG_PPC64
233   "\
234   dp[#]	dump paca for current cpu, or cpu #\n\
235   dpa	dump paca for all possible cpus\n"
236 #endif
237   "\
238   dr	dump stream of raw bytes\n\
239   dv	dump virtual address translation \n\
240   dt	dump the tracing buffers (uses printk)\n\
241   dtc	dump the tracing buffers for current CPU (uses printk)\n\
242 "
243 #ifdef CONFIG_PPC_POWERNV
244 "  dx#   dump xive on CPU #\n\
245   dxi#  dump xive irq state #\n\
246   dxa   dump xive on all CPUs\n"
247 #endif
248 "  e	print exception information\n\
249   f	flush cache\n\
250   la	lookup symbol+offset of specified address\n\
251   ls	lookup address of specified symbol\n\
252   m	examine/change memory\n\
253   mm	move a block of memory\n\
254   ms	set a block of memory\n\
255   md	compare two blocks of memory\n\
256   ml	locate a block of memory\n\
257   mz	zero a block of memory\n\
258   mi	show information about memory allocation\n\
259   p 	call a procedure\n\
260   P 	list processes/tasks\n\
261   r	print registers\n\
262   s	single step\n"
263 #ifdef CONFIG_SPU_BASE
264 "  ss	stop execution on all spus\n\
265   sr	restore execution on stopped spus\n\
266   sf  #	dump spu fields for spu # (in hex)\n\
267   sd  #	dump spu local store for spu # (in hex)\n\
268   sdi #	disassemble spu local store for spu # (in hex)\n"
269 #endif
270 "  S	print special registers\n\
271   Sa    print all SPRs\n\
272   Sr #	read SPR #\n\
273   Sw #v write v to SPR #\n\
274   t	print backtrace\n\
275   x	exit monitor and recover\n\
276   X	exit monitor and don't recover\n"
277 #if defined(CONFIG_PPC64) && !defined(CONFIG_PPC_BOOK3E)
278 "  u	dump segment table or SLB\n"
279 #elif defined(CONFIG_PPC_STD_MMU_32)
280 "  u	dump segment registers\n"
281 #elif defined(CONFIG_44x) || defined(CONFIG_PPC_BOOK3E)
282 "  u	dump TLB\n"
283 #endif
284 "  U	show uptime information\n"
285 "  ?	help\n"
286 "  # n	limit output to n lines per page (for dp, dpa, dl)\n"
287 "  zr	reboot\n\
288   zh	halt\n"
289 ;
290 
291 static struct pt_regs *xmon_regs;
292 
293 static inline void sync(void)
294 {
295 	asm volatile("sync; isync");
296 }
297 
298 static inline void store_inst(void *p)
299 {
300 	asm volatile ("dcbst 0,%0; sync; icbi 0,%0; isync" : : "r" (p));
301 }
302 
303 static inline void cflush(void *p)
304 {
305 	asm volatile ("dcbf 0,%0; icbi 0,%0" : : "r" (p));
306 }
307 
308 static inline void cinval(void *p)
309 {
310 	asm volatile ("dcbi 0,%0; icbi 0,%0" : : "r" (p));
311 }
312 
313 /**
314  * write_ciabr() - write the CIABR SPR
315  * @ciabr:	The value to write.
316  *
317  * This function writes a value to the CIARB register either directly
318  * through mtspr instruction if the kernel is in HV privilege mode or
319  * call a hypervisor function to achieve the same in case the kernel
320  * is in supervisor privilege mode.
321  */
322 static void write_ciabr(unsigned long ciabr)
323 {
324 	if (!cpu_has_feature(CPU_FTR_ARCH_207S))
325 		return;
326 
327 	if (cpu_has_feature(CPU_FTR_HVMODE)) {
328 		mtspr(SPRN_CIABR, ciabr);
329 		return;
330 	}
331 	plapr_set_ciabr(ciabr);
332 }
333 
334 /**
335  * set_ciabr() - set the CIABR
336  * @addr:	The value to set.
337  *
338  * This function sets the correct privilege value into the the HW
339  * breakpoint address before writing it up in the CIABR register.
340  */
341 static void set_ciabr(unsigned long addr)
342 {
343 	addr &= ~CIABR_PRIV;
344 
345 	if (cpu_has_feature(CPU_FTR_HVMODE))
346 		addr |= CIABR_PRIV_HYPER;
347 	else
348 		addr |= CIABR_PRIV_SUPER;
349 	write_ciabr(addr);
350 }
351 
352 /*
353  * Disable surveillance (the service processor watchdog function)
354  * while we are in xmon.
355  * XXX we should re-enable it when we leave. :)
356  */
357 #define SURVEILLANCE_TOKEN	9000
358 
359 static inline void disable_surveillance(void)
360 {
361 #ifdef CONFIG_PPC_PSERIES
362 	/* Since this can't be a module, args should end up below 4GB. */
363 	static struct rtas_args args;
364 	int token;
365 
366 	/*
367 	 * At this point we have got all the cpus we can into
368 	 * xmon, so there is hopefully no other cpu calling RTAS
369 	 * at the moment, even though we don't take rtas.lock.
370 	 * If we did try to take rtas.lock there would be a
371 	 * real possibility of deadlock.
372 	 */
373 	token = rtas_token("set-indicator");
374 	if (token == RTAS_UNKNOWN_SERVICE)
375 		return;
376 
377 	rtas_call_unlocked(&args, token, 3, 1, NULL, SURVEILLANCE_TOKEN, 0, 0);
378 
379 #endif /* CONFIG_PPC_PSERIES */
380 }
381 
382 #ifdef CONFIG_SMP
383 static int xmon_speaker;
384 
385 static void get_output_lock(void)
386 {
387 	int me = smp_processor_id() + 0x100;
388 	int last_speaker = 0, prev;
389 	long timeout;
390 
391 	if (xmon_speaker == me)
392 		return;
393 
394 	for (;;) {
395 		last_speaker = cmpxchg(&xmon_speaker, 0, me);
396 		if (last_speaker == 0)
397 			return;
398 
399 		/*
400 		 * Wait a full second for the lock, we might be on a slow
401 		 * console, but check every 100us.
402 		 */
403 		timeout = 10000;
404 		while (xmon_speaker == last_speaker) {
405 			if (--timeout > 0) {
406 				udelay(100);
407 				continue;
408 			}
409 
410 			/* hostile takeover */
411 			prev = cmpxchg(&xmon_speaker, last_speaker, me);
412 			if (prev == last_speaker)
413 				return;
414 			break;
415 		}
416 	}
417 }
418 
419 static void release_output_lock(void)
420 {
421 	xmon_speaker = 0;
422 }
423 
424 int cpus_are_in_xmon(void)
425 {
426 	return !cpumask_empty(&cpus_in_xmon);
427 }
428 
429 static bool wait_for_other_cpus(int ncpus)
430 {
431 	unsigned long timeout;
432 
433 	/* We wait for 2s, which is a metric "little while" */
434 	for (timeout = 20000; timeout != 0; --timeout) {
435 		if (cpumask_weight(&cpus_in_xmon) >= ncpus)
436 			return true;
437 		udelay(100);
438 		barrier();
439 	}
440 
441 	return false;
442 }
443 #endif /* CONFIG_SMP */
444 
445 static inline int unrecoverable_excp(struct pt_regs *regs)
446 {
447 #if defined(CONFIG_4xx) || defined(CONFIG_PPC_BOOK3E)
448 	/* We have no MSR_RI bit on 4xx or Book3e, so we simply return false */
449 	return 0;
450 #else
451 	return ((regs->msr & MSR_RI) == 0);
452 #endif
453 }
454 
455 static int xmon_core(struct pt_regs *regs, int fromipi)
456 {
457 	int cmd = 0;
458 	struct bpt *bp;
459 	long recurse_jmp[JMP_BUF_LEN];
460 	unsigned long offset;
461 	unsigned long flags;
462 #ifdef CONFIG_SMP
463 	int cpu;
464 	int secondary;
465 #endif
466 
467 	local_irq_save(flags);
468 	hard_irq_disable();
469 
470 	tracing_enabled = tracing_is_on();
471 	tracing_off();
472 
473 	bp = in_breakpoint_table(regs->nip, &offset);
474 	if (bp != NULL) {
475 		regs->nip = bp->address + offset;
476 		atomic_dec(&bp->ref_count);
477 	}
478 
479 	remove_cpu_bpts();
480 
481 #ifdef CONFIG_SMP
482 	cpu = smp_processor_id();
483 	if (cpumask_test_cpu(cpu, &cpus_in_xmon)) {
484 		/*
485 		 * We catch SPR read/write faults here because the 0x700, 0xf60
486 		 * etc. handlers don't call debugger_fault_handler().
487 		 */
488 		if (catch_spr_faults)
489 			longjmp(bus_error_jmp, 1);
490 		get_output_lock();
491 		excprint(regs);
492 		printf("cpu 0x%x: Exception %lx %s in xmon, "
493 		       "returning to main loop\n",
494 		       cpu, regs->trap, getvecname(TRAP(regs)));
495 		release_output_lock();
496 		longjmp(xmon_fault_jmp[cpu], 1);
497 	}
498 
499 	if (setjmp(recurse_jmp) != 0) {
500 		if (!in_xmon || !xmon_gate) {
501 			get_output_lock();
502 			printf("xmon: WARNING: bad recursive fault "
503 			       "on cpu 0x%x\n", cpu);
504 			release_output_lock();
505 			goto waiting;
506 		}
507 		secondary = !(xmon_taken && cpu == xmon_owner);
508 		goto cmdloop;
509 	}
510 
511 	xmon_fault_jmp[cpu] = recurse_jmp;
512 
513 	bp = NULL;
514 	if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT))
515 		bp = at_breakpoint(regs->nip);
516 	if (bp || unrecoverable_excp(regs))
517 		fromipi = 0;
518 
519 	if (!fromipi) {
520 		get_output_lock();
521 		excprint(regs);
522 		if (bp) {
523 			printf("cpu 0x%x stopped at breakpoint 0x%lx (",
524 			       cpu, BP_NUM(bp));
525 			xmon_print_symbol(regs->nip, " ", ")\n");
526 		}
527 		if (unrecoverable_excp(regs))
528 			printf("WARNING: exception is not recoverable, "
529 			       "can't continue\n");
530 		release_output_lock();
531 	}
532 
533 	cpumask_set_cpu(cpu, &cpus_in_xmon);
534 
535  waiting:
536 	secondary = 1;
537 	spin_begin();
538 	while (secondary && !xmon_gate) {
539 		if (in_xmon == 0) {
540 			if (fromipi) {
541 				spin_end();
542 				goto leave;
543 			}
544 			secondary = test_and_set_bit(0, &in_xmon);
545 		}
546 		spin_cpu_relax();
547 		touch_nmi_watchdog();
548 	}
549 	spin_end();
550 
551 	if (!secondary && !xmon_gate) {
552 		/* we are the first cpu to come in */
553 		/* interrupt other cpu(s) */
554 		int ncpus = num_online_cpus();
555 
556 		xmon_owner = cpu;
557 		mb();
558 		if (ncpus > 1) {
559 			/*
560 			 * A system reset (trap == 0x100) can be triggered on
561 			 * all CPUs, so when we come in via 0x100 try waiting
562 			 * for the other CPUs to come in before we send the
563 			 * debugger break (IPI). This is similar to
564 			 * crash_kexec_secondary().
565 			 */
566 			if (TRAP(regs) != 0x100 || !wait_for_other_cpus(ncpus))
567 				smp_send_debugger_break();
568 
569 			wait_for_other_cpus(ncpus);
570 		}
571 		remove_bpts();
572 		disable_surveillance();
573 		/* for breakpoint or single step, print the current instr. */
574 		if (bp || TRAP(regs) == 0xd00)
575 			ppc_inst_dump(regs->nip, 1, 0);
576 		printf("enter ? for help\n");
577 		mb();
578 		xmon_gate = 1;
579 		barrier();
580 		touch_nmi_watchdog();
581 	}
582 
583  cmdloop:
584 	while (in_xmon) {
585 		if (secondary) {
586 			spin_begin();
587 			if (cpu == xmon_owner) {
588 				if (!test_and_set_bit(0, &xmon_taken)) {
589 					secondary = 0;
590 					spin_end();
591 					continue;
592 				}
593 				/* missed it */
594 				while (cpu == xmon_owner)
595 					spin_cpu_relax();
596 			}
597 			spin_cpu_relax();
598 			touch_nmi_watchdog();
599 		} else {
600 			cmd = cmds(regs);
601 			if (cmd != 0) {
602 				/* exiting xmon */
603 				insert_bpts();
604 				xmon_gate = 0;
605 				wmb();
606 				in_xmon = 0;
607 				break;
608 			}
609 			/* have switched to some other cpu */
610 			secondary = 1;
611 		}
612 	}
613  leave:
614 	cpumask_clear_cpu(cpu, &cpus_in_xmon);
615 	xmon_fault_jmp[cpu] = NULL;
616 #else
617 	/* UP is simple... */
618 	if (in_xmon) {
619 		printf("Exception %lx %s in xmon, returning to main loop\n",
620 		       regs->trap, getvecname(TRAP(regs)));
621 		longjmp(xmon_fault_jmp[0], 1);
622 	}
623 	if (setjmp(recurse_jmp) == 0) {
624 		xmon_fault_jmp[0] = recurse_jmp;
625 		in_xmon = 1;
626 
627 		excprint(regs);
628 		bp = at_breakpoint(regs->nip);
629 		if (bp) {
630 			printf("Stopped at breakpoint %lx (", BP_NUM(bp));
631 			xmon_print_symbol(regs->nip, " ", ")\n");
632 		}
633 		if (unrecoverable_excp(regs))
634 			printf("WARNING: exception is not recoverable, "
635 			       "can't continue\n");
636 		remove_bpts();
637 		disable_surveillance();
638 		/* for breakpoint or single step, print the current instr. */
639 		if (bp || TRAP(regs) == 0xd00)
640 			ppc_inst_dump(regs->nip, 1, 0);
641 		printf("enter ? for help\n");
642 	}
643 
644 	cmd = cmds(regs);
645 
646 	insert_bpts();
647 	in_xmon = 0;
648 #endif
649 
650 #ifdef CONFIG_BOOKE
651 	if (regs->msr & MSR_DE) {
652 		bp = at_breakpoint(regs->nip);
653 		if (bp != NULL) {
654 			regs->nip = (unsigned long) &bp->instr[0];
655 			atomic_inc(&bp->ref_count);
656 		}
657 	}
658 #else
659 	if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) {
660 		bp = at_breakpoint(regs->nip);
661 		if (bp != NULL) {
662 			int stepped = emulate_step(regs, bp->instr[0]);
663 			if (stepped == 0) {
664 				regs->nip = (unsigned long) &bp->instr[0];
665 				atomic_inc(&bp->ref_count);
666 			} else if (stepped < 0) {
667 				printf("Couldn't single-step %s instruction\n",
668 				    (IS_RFID(bp->instr[0])? "rfid": "mtmsrd"));
669 			}
670 		}
671 	}
672 #endif
673 	insert_cpu_bpts();
674 
675 	touch_nmi_watchdog();
676 	local_irq_restore(flags);
677 
678 	return cmd != 'X' && cmd != EOF;
679 }
680 
681 int xmon(struct pt_regs *excp)
682 {
683 	struct pt_regs regs;
684 
685 	if (excp == NULL) {
686 		ppc_save_regs(&regs);
687 		excp = &regs;
688 	}
689 
690 	return xmon_core(excp, 0);
691 }
692 EXPORT_SYMBOL(xmon);
693 
694 irqreturn_t xmon_irq(int irq, void *d)
695 {
696 	unsigned long flags;
697 	local_irq_save(flags);
698 	printf("Keyboard interrupt\n");
699 	xmon(get_irq_regs());
700 	local_irq_restore(flags);
701 	return IRQ_HANDLED;
702 }
703 
704 static int xmon_bpt(struct pt_regs *regs)
705 {
706 	struct bpt *bp;
707 	unsigned long offset;
708 
709 	if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))
710 		return 0;
711 
712 	/* Are we at the trap at bp->instr[1] for some bp? */
713 	bp = in_breakpoint_table(regs->nip, &offset);
714 	if (bp != NULL && offset == 4) {
715 		regs->nip = bp->address + 4;
716 		atomic_dec(&bp->ref_count);
717 		return 1;
718 	}
719 
720 	/* Are we at a breakpoint? */
721 	bp = at_breakpoint(regs->nip);
722 	if (!bp)
723 		return 0;
724 
725 	xmon_core(regs, 0);
726 
727 	return 1;
728 }
729 
730 static int xmon_sstep(struct pt_regs *regs)
731 {
732 	if (user_mode(regs))
733 		return 0;
734 	xmon_core(regs, 0);
735 	return 1;
736 }
737 
738 static int xmon_break_match(struct pt_regs *regs)
739 {
740 	if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))
741 		return 0;
742 	if (dabr.enabled == 0)
743 		return 0;
744 	xmon_core(regs, 0);
745 	return 1;
746 }
747 
748 static int xmon_iabr_match(struct pt_regs *regs)
749 {
750 	if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))
751 		return 0;
752 	if (iabr == NULL)
753 		return 0;
754 	xmon_core(regs, 0);
755 	return 1;
756 }
757 
758 static int xmon_ipi(struct pt_regs *regs)
759 {
760 #ifdef CONFIG_SMP
761 	if (in_xmon && !cpumask_test_cpu(smp_processor_id(), &cpus_in_xmon))
762 		xmon_core(regs, 1);
763 #endif
764 	return 0;
765 }
766 
767 static int xmon_fault_handler(struct pt_regs *regs)
768 {
769 	struct bpt *bp;
770 	unsigned long offset;
771 
772 	if (in_xmon && catch_memory_errors)
773 		handle_fault(regs);	/* doesn't return */
774 
775 	if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) {
776 		bp = in_breakpoint_table(regs->nip, &offset);
777 		if (bp != NULL) {
778 			regs->nip = bp->address + offset;
779 			atomic_dec(&bp->ref_count);
780 		}
781 	}
782 
783 	return 0;
784 }
785 
786 static struct bpt *at_breakpoint(unsigned long pc)
787 {
788 	int i;
789 	struct bpt *bp;
790 
791 	bp = bpts;
792 	for (i = 0; i < NBPTS; ++i, ++bp)
793 		if (bp->enabled && pc == bp->address)
794 			return bp;
795 	return NULL;
796 }
797 
798 static struct bpt *in_breakpoint_table(unsigned long nip, unsigned long *offp)
799 {
800 	unsigned long off;
801 
802 	off = nip - (unsigned long) bpts;
803 	if (off >= sizeof(bpts))
804 		return NULL;
805 	off %= sizeof(struct bpt);
806 	if (off != offsetof(struct bpt, instr[0])
807 	    && off != offsetof(struct bpt, instr[1]))
808 		return NULL;
809 	*offp = off - offsetof(struct bpt, instr[0]);
810 	return (struct bpt *) (nip - off);
811 }
812 
813 static struct bpt *new_breakpoint(unsigned long a)
814 {
815 	struct bpt *bp;
816 
817 	a &= ~3UL;
818 	bp = at_breakpoint(a);
819 	if (bp)
820 		return bp;
821 
822 	for (bp = bpts; bp < &bpts[NBPTS]; ++bp) {
823 		if (!bp->enabled && atomic_read(&bp->ref_count) == 0) {
824 			bp->address = a;
825 			bp->instr[1] = bpinstr;
826 			store_inst(&bp->instr[1]);
827 			return bp;
828 		}
829 	}
830 
831 	printf("Sorry, no free breakpoints.  Please clear one first.\n");
832 	return NULL;
833 }
834 
835 static void insert_bpts(void)
836 {
837 	int i;
838 	struct bpt *bp;
839 
840 	bp = bpts;
841 	for (i = 0; i < NBPTS; ++i, ++bp) {
842 		if ((bp->enabled & (BP_TRAP|BP_CIABR)) == 0)
843 			continue;
844 		if (mread(bp->address, &bp->instr[0], 4) != 4) {
845 			printf("Couldn't read instruction at %lx, "
846 			       "disabling breakpoint there\n", bp->address);
847 			bp->enabled = 0;
848 			continue;
849 		}
850 		if (IS_MTMSRD(bp->instr[0]) || IS_RFID(bp->instr[0])) {
851 			printf("Breakpoint at %lx is on an mtmsrd or rfid "
852 			       "instruction, disabling it\n", bp->address);
853 			bp->enabled = 0;
854 			continue;
855 		}
856 		store_inst(&bp->instr[0]);
857 		if (bp->enabled & BP_CIABR)
858 			continue;
859 		if (patch_instruction((unsigned int *)bp->address,
860 							bpinstr) != 0) {
861 			printf("Couldn't write instruction at %lx, "
862 			       "disabling breakpoint there\n", bp->address);
863 			bp->enabled &= ~BP_TRAP;
864 			continue;
865 		}
866 		store_inst((void *)bp->address);
867 	}
868 }
869 
870 static void insert_cpu_bpts(void)
871 {
872 	struct arch_hw_breakpoint brk;
873 
874 	if (dabr.enabled) {
875 		brk.address = dabr.address;
876 		brk.type = (dabr.enabled & HW_BRK_TYPE_DABR) | HW_BRK_TYPE_PRIV_ALL;
877 		brk.len = 8;
878 		__set_breakpoint(&brk);
879 	}
880 
881 	if (iabr)
882 		set_ciabr(iabr->address);
883 }
884 
885 static void remove_bpts(void)
886 {
887 	int i;
888 	struct bpt *bp;
889 	unsigned instr;
890 
891 	bp = bpts;
892 	for (i = 0; i < NBPTS; ++i, ++bp) {
893 		if ((bp->enabled & (BP_TRAP|BP_CIABR)) != BP_TRAP)
894 			continue;
895 		if (mread(bp->address, &instr, 4) == 4
896 		    && instr == bpinstr
897 		    && patch_instruction(
898 			(unsigned int *)bp->address, bp->instr[0]) != 0)
899 			printf("Couldn't remove breakpoint at %lx\n",
900 			       bp->address);
901 		else
902 			store_inst((void *)bp->address);
903 	}
904 }
905 
906 static void remove_cpu_bpts(void)
907 {
908 	hw_breakpoint_disable();
909 	write_ciabr(0);
910 }
911 
912 /* Based on uptime_proc_show(). */
913 static void
914 show_uptime(void)
915 {
916 	struct timespec uptime;
917 
918 	if (setjmp(bus_error_jmp) == 0) {
919 		catch_memory_errors = 1;
920 		sync();
921 
922 		get_monotonic_boottime(&uptime);
923 		printf("Uptime: %lu.%.2lu seconds\n", (unsigned long)uptime.tv_sec,
924 			((unsigned long)uptime.tv_nsec / (NSEC_PER_SEC/100)));
925 
926 		sync();
927 		__delay(200);						\
928 	}
929 	catch_memory_errors = 0;
930 }
931 
932 static void set_lpp_cmd(void)
933 {
934 	unsigned long lpp;
935 
936 	if (!scanhex(&lpp)) {
937 		printf("Invalid number.\n");
938 		lpp = 0;
939 	}
940 	xmon_set_pagination_lpp(lpp);
941 }
942 /* Command interpreting routine */
943 static char *last_cmd;
944 
945 static int
946 cmds(struct pt_regs *excp)
947 {
948 	int cmd = 0;
949 
950 	last_cmd = NULL;
951 	xmon_regs = excp;
952 
953 	xmon_show_stack(excp->gpr[1], excp->link, excp->nip);
954 
955 	for(;;) {
956 #ifdef CONFIG_SMP
957 		printf("%x:", smp_processor_id());
958 #endif /* CONFIG_SMP */
959 		printf("mon> ");
960 		flush_input();
961 		termch = 0;
962 		cmd = skipbl();
963 		if( cmd == '\n' ) {
964 			if (last_cmd == NULL)
965 				continue;
966 			take_input(last_cmd);
967 			last_cmd = NULL;
968 			cmd = inchar();
969 		}
970 		switch (cmd) {
971 		case 'm':
972 			cmd = inchar();
973 			switch (cmd) {
974 			case 'm':
975 			case 's':
976 			case 'd':
977 				memops(cmd);
978 				break;
979 			case 'l':
980 				memlocate();
981 				break;
982 			case 'z':
983 				memzcan();
984 				break;
985 			case 'i':
986 				show_mem(0, NULL);
987 				break;
988 			default:
989 				termch = cmd;
990 				memex();
991 			}
992 			break;
993 		case 'd':
994 			dump();
995 			break;
996 		case 'l':
997 			symbol_lookup();
998 			break;
999 		case 'r':
1000 			prregs(excp);	/* print regs */
1001 			break;
1002 		case 'e':
1003 			excprint(excp);
1004 			break;
1005 		case 'S':
1006 			super_regs();
1007 			break;
1008 		case 't':
1009 			backtrace(excp);
1010 			break;
1011 		case 'f':
1012 			cacheflush();
1013 			break;
1014 		case 's':
1015 			if (do_spu_cmd() == 0)
1016 				break;
1017 			if (do_step(excp))
1018 				return cmd;
1019 			break;
1020 		case 'x':
1021 		case 'X':
1022 			if (tracing_enabled)
1023 				tracing_on();
1024 			return cmd;
1025 		case EOF:
1026 			printf(" <no input ...>\n");
1027 			mdelay(2000);
1028 			return cmd;
1029 		case '?':
1030 			xmon_puts(help_string);
1031 			break;
1032 		case '#':
1033 			set_lpp_cmd();
1034 			break;
1035 		case 'b':
1036 			bpt_cmds();
1037 			break;
1038 		case 'C':
1039 			csum();
1040 			break;
1041 		case 'c':
1042 			if (cpu_cmd())
1043 				return 0;
1044 			break;
1045 		case 'z':
1046 			bootcmds();
1047 			break;
1048 		case 'p':
1049 			proccall();
1050 			break;
1051 		case 'P':
1052 			show_tasks();
1053 			break;
1054 #ifdef CONFIG_PPC_STD_MMU
1055 		case 'u':
1056 			dump_segments();
1057 			break;
1058 #elif defined(CONFIG_44x)
1059 		case 'u':
1060 			dump_tlb_44x();
1061 			break;
1062 #elif defined(CONFIG_PPC_BOOK3E)
1063 		case 'u':
1064 			dump_tlb_book3e();
1065 			break;
1066 #endif
1067 		case 'U':
1068 			show_uptime();
1069 			break;
1070 		default:
1071 			printf("Unrecognized command: ");
1072 			do {
1073 				if (' ' < cmd && cmd <= '~')
1074 					putchar(cmd);
1075 				else
1076 					printf("\\x%x", cmd);
1077 				cmd = inchar();
1078 			} while (cmd != '\n');
1079 			printf(" (type ? for help)\n");
1080 			break;
1081 		}
1082 	}
1083 }
1084 
1085 #ifdef CONFIG_BOOKE
1086 static int do_step(struct pt_regs *regs)
1087 {
1088 	regs->msr |= MSR_DE;
1089 	mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) | DBCR0_IC | DBCR0_IDM);
1090 	return 1;
1091 }
1092 #else
1093 /*
1094  * Step a single instruction.
1095  * Some instructions we emulate, others we execute with MSR_SE set.
1096  */
1097 static int do_step(struct pt_regs *regs)
1098 {
1099 	unsigned int instr;
1100 	int stepped;
1101 
1102 	/* check we are in 64-bit kernel mode, translation enabled */
1103 	if ((regs->msr & (MSR_64BIT|MSR_PR|MSR_IR)) == (MSR_64BIT|MSR_IR)) {
1104 		if (mread(regs->nip, &instr, 4) == 4) {
1105 			stepped = emulate_step(regs, instr);
1106 			if (stepped < 0) {
1107 				printf("Couldn't single-step %s instruction\n",
1108 				       (IS_RFID(instr)? "rfid": "mtmsrd"));
1109 				return 0;
1110 			}
1111 			if (stepped > 0) {
1112 				regs->trap = 0xd00 | (regs->trap & 1);
1113 				printf("stepped to ");
1114 				xmon_print_symbol(regs->nip, " ", "\n");
1115 				ppc_inst_dump(regs->nip, 1, 0);
1116 				return 0;
1117 			}
1118 		}
1119 	}
1120 	regs->msr |= MSR_SE;
1121 	return 1;
1122 }
1123 #endif
1124 
1125 static void bootcmds(void)
1126 {
1127 	int cmd;
1128 
1129 	cmd = inchar();
1130 	if (cmd == 'r')
1131 		ppc_md.restart(NULL);
1132 	else if (cmd == 'h')
1133 		ppc_md.halt();
1134 	else if (cmd == 'p')
1135 		if (pm_power_off)
1136 			pm_power_off();
1137 }
1138 
1139 static int cpu_cmd(void)
1140 {
1141 #ifdef CONFIG_SMP
1142 	unsigned long cpu, first_cpu, last_cpu;
1143 	int timeout;
1144 
1145 	if (!scanhex(&cpu)) {
1146 		/* print cpus waiting or in xmon */
1147 		printf("cpus stopped:");
1148 		last_cpu = first_cpu = NR_CPUS;
1149 		for_each_possible_cpu(cpu) {
1150 			if (cpumask_test_cpu(cpu, &cpus_in_xmon)) {
1151 				if (cpu == last_cpu + 1) {
1152 					last_cpu = cpu;
1153 				} else {
1154 					if (last_cpu != first_cpu)
1155 						printf("-0x%lx", last_cpu);
1156 					last_cpu = first_cpu = cpu;
1157 					printf(" 0x%lx", cpu);
1158 				}
1159 			}
1160 		}
1161 		if (last_cpu != first_cpu)
1162 			printf("-0x%lx", last_cpu);
1163 		printf("\n");
1164 		return 0;
1165 	}
1166 	/* try to switch to cpu specified */
1167 	if (!cpumask_test_cpu(cpu, &cpus_in_xmon)) {
1168 		printf("cpu 0x%x isn't in xmon\n", cpu);
1169 		return 0;
1170 	}
1171 	xmon_taken = 0;
1172 	mb();
1173 	xmon_owner = cpu;
1174 	timeout = 10000000;
1175 	while (!xmon_taken) {
1176 		if (--timeout == 0) {
1177 			if (test_and_set_bit(0, &xmon_taken))
1178 				break;
1179 			/* take control back */
1180 			mb();
1181 			xmon_owner = smp_processor_id();
1182 			printf("cpu 0x%x didn't take control\n", cpu);
1183 			return 0;
1184 		}
1185 		barrier();
1186 	}
1187 	return 1;
1188 #else
1189 	return 0;
1190 #endif /* CONFIG_SMP */
1191 }
1192 
1193 static unsigned short fcstab[256] = {
1194 	0x0000, 0x1189, 0x2312, 0x329b, 0x4624, 0x57ad, 0x6536, 0x74bf,
1195 	0x8c48, 0x9dc1, 0xaf5a, 0xbed3, 0xca6c, 0xdbe5, 0xe97e, 0xf8f7,
1196 	0x1081, 0x0108, 0x3393, 0x221a, 0x56a5, 0x472c, 0x75b7, 0x643e,
1197 	0x9cc9, 0x8d40, 0xbfdb, 0xae52, 0xdaed, 0xcb64, 0xf9ff, 0xe876,
1198 	0x2102, 0x308b, 0x0210, 0x1399, 0x6726, 0x76af, 0x4434, 0x55bd,
1199 	0xad4a, 0xbcc3, 0x8e58, 0x9fd1, 0xeb6e, 0xfae7, 0xc87c, 0xd9f5,
1200 	0x3183, 0x200a, 0x1291, 0x0318, 0x77a7, 0x662e, 0x54b5, 0x453c,
1201 	0xbdcb, 0xac42, 0x9ed9, 0x8f50, 0xfbef, 0xea66, 0xd8fd, 0xc974,
1202 	0x4204, 0x538d, 0x6116, 0x709f, 0x0420, 0x15a9, 0x2732, 0x36bb,
1203 	0xce4c, 0xdfc5, 0xed5e, 0xfcd7, 0x8868, 0x99e1, 0xab7a, 0xbaf3,
1204 	0x5285, 0x430c, 0x7197, 0x601e, 0x14a1, 0x0528, 0x37b3, 0x263a,
1205 	0xdecd, 0xcf44, 0xfddf, 0xec56, 0x98e9, 0x8960, 0xbbfb, 0xaa72,
1206 	0x6306, 0x728f, 0x4014, 0x519d, 0x2522, 0x34ab, 0x0630, 0x17b9,
1207 	0xef4e, 0xfec7, 0xcc5c, 0xddd5, 0xa96a, 0xb8e3, 0x8a78, 0x9bf1,
1208 	0x7387, 0x620e, 0x5095, 0x411c, 0x35a3, 0x242a, 0x16b1, 0x0738,
1209 	0xffcf, 0xee46, 0xdcdd, 0xcd54, 0xb9eb, 0xa862, 0x9af9, 0x8b70,
1210 	0x8408, 0x9581, 0xa71a, 0xb693, 0xc22c, 0xd3a5, 0xe13e, 0xf0b7,
1211 	0x0840, 0x19c9, 0x2b52, 0x3adb, 0x4e64, 0x5fed, 0x6d76, 0x7cff,
1212 	0x9489, 0x8500, 0xb79b, 0xa612, 0xd2ad, 0xc324, 0xf1bf, 0xe036,
1213 	0x18c1, 0x0948, 0x3bd3, 0x2a5a, 0x5ee5, 0x4f6c, 0x7df7, 0x6c7e,
1214 	0xa50a, 0xb483, 0x8618, 0x9791, 0xe32e, 0xf2a7, 0xc03c, 0xd1b5,
1215 	0x2942, 0x38cb, 0x0a50, 0x1bd9, 0x6f66, 0x7eef, 0x4c74, 0x5dfd,
1216 	0xb58b, 0xa402, 0x9699, 0x8710, 0xf3af, 0xe226, 0xd0bd, 0xc134,
1217 	0x39c3, 0x284a, 0x1ad1, 0x0b58, 0x7fe7, 0x6e6e, 0x5cf5, 0x4d7c,
1218 	0xc60c, 0xd785, 0xe51e, 0xf497, 0x8028, 0x91a1, 0xa33a, 0xb2b3,
1219 	0x4a44, 0x5bcd, 0x6956, 0x78df, 0x0c60, 0x1de9, 0x2f72, 0x3efb,
1220 	0xd68d, 0xc704, 0xf59f, 0xe416, 0x90a9, 0x8120, 0xb3bb, 0xa232,
1221 	0x5ac5, 0x4b4c, 0x79d7, 0x685e, 0x1ce1, 0x0d68, 0x3ff3, 0x2e7a,
1222 	0xe70e, 0xf687, 0xc41c, 0xd595, 0xa12a, 0xb0a3, 0x8238, 0x93b1,
1223 	0x6b46, 0x7acf, 0x4854, 0x59dd, 0x2d62, 0x3ceb, 0x0e70, 0x1ff9,
1224 	0xf78f, 0xe606, 0xd49d, 0xc514, 0xb1ab, 0xa022, 0x92b9, 0x8330,
1225 	0x7bc7, 0x6a4e, 0x58d5, 0x495c, 0x3de3, 0x2c6a, 0x1ef1, 0x0f78
1226 };
1227 
1228 #define FCS(fcs, c)	(((fcs) >> 8) ^ fcstab[((fcs) ^ (c)) & 0xff])
1229 
1230 static void
1231 csum(void)
1232 {
1233 	unsigned int i;
1234 	unsigned short fcs;
1235 	unsigned char v;
1236 
1237 	if (!scanhex(&adrs))
1238 		return;
1239 	if (!scanhex(&ncsum))
1240 		return;
1241 	fcs = 0xffff;
1242 	for (i = 0; i < ncsum; ++i) {
1243 		if (mread(adrs+i, &v, 1) == 0) {
1244 			printf("csum stopped at "REG"\n", adrs+i);
1245 			break;
1246 		}
1247 		fcs = FCS(fcs, v);
1248 	}
1249 	printf("%x\n", fcs);
1250 }
1251 
1252 /*
1253  * Check if this is a suitable place to put a breakpoint.
1254  */
1255 static long check_bp_loc(unsigned long addr)
1256 {
1257 	unsigned int instr;
1258 
1259 	addr &= ~3;
1260 	if (!is_kernel_addr(addr)) {
1261 		printf("Breakpoints may only be placed at kernel addresses\n");
1262 		return 0;
1263 	}
1264 	if (!mread(addr, &instr, sizeof(instr))) {
1265 		printf("Can't read instruction at address %lx\n", addr);
1266 		return 0;
1267 	}
1268 	if (IS_MTMSRD(instr) || IS_RFID(instr)) {
1269 		printf("Breakpoints may not be placed on mtmsrd or rfid "
1270 		       "instructions\n");
1271 		return 0;
1272 	}
1273 	return 1;
1274 }
1275 
1276 static char *breakpoint_help_string =
1277     "Breakpoint command usage:\n"
1278     "b                show breakpoints\n"
1279     "b <addr> [cnt]   set breakpoint at given instr addr\n"
1280     "bc               clear all breakpoints\n"
1281     "bc <n/addr>      clear breakpoint number n or at addr\n"
1282     "bi <addr> [cnt]  set hardware instr breakpoint (POWER8 only)\n"
1283     "bd <addr> [cnt]  set hardware data breakpoint\n"
1284     "";
1285 
1286 static void
1287 bpt_cmds(void)
1288 {
1289 	int cmd;
1290 	unsigned long a;
1291 	int i;
1292 	struct bpt *bp;
1293 
1294 	cmd = inchar();
1295 	switch (cmd) {
1296 #ifndef CONFIG_PPC_8xx
1297 	static const char badaddr[] = "Only kernel addresses are permitted for breakpoints\n";
1298 	int mode;
1299 	case 'd':	/* bd - hardware data breakpoint */
1300 		mode = 7;
1301 		cmd = inchar();
1302 		if (cmd == 'r')
1303 			mode = 5;
1304 		else if (cmd == 'w')
1305 			mode = 6;
1306 		else
1307 			termch = cmd;
1308 		dabr.address = 0;
1309 		dabr.enabled = 0;
1310 		if (scanhex(&dabr.address)) {
1311 			if (!is_kernel_addr(dabr.address)) {
1312 				printf(badaddr);
1313 				break;
1314 			}
1315 			dabr.address &= ~HW_BRK_TYPE_DABR;
1316 			dabr.enabled = mode | BP_DABR;
1317 		}
1318 		break;
1319 
1320 	case 'i':	/* bi - hardware instr breakpoint */
1321 		if (!cpu_has_feature(CPU_FTR_ARCH_207S)) {
1322 			printf("Hardware instruction breakpoint "
1323 			       "not supported on this cpu\n");
1324 			break;
1325 		}
1326 		if (iabr) {
1327 			iabr->enabled &= ~BP_CIABR;
1328 			iabr = NULL;
1329 		}
1330 		if (!scanhex(&a))
1331 			break;
1332 		if (!check_bp_loc(a))
1333 			break;
1334 		bp = new_breakpoint(a);
1335 		if (bp != NULL) {
1336 			bp->enabled |= BP_CIABR;
1337 			iabr = bp;
1338 		}
1339 		break;
1340 #endif
1341 
1342 	case 'c':
1343 		if (!scanhex(&a)) {
1344 			/* clear all breakpoints */
1345 			for (i = 0; i < NBPTS; ++i)
1346 				bpts[i].enabled = 0;
1347 			iabr = NULL;
1348 			dabr.enabled = 0;
1349 			printf("All breakpoints cleared\n");
1350 			break;
1351 		}
1352 
1353 		if (a <= NBPTS && a >= 1) {
1354 			/* assume a breakpoint number */
1355 			bp = &bpts[a-1];	/* bp nums are 1 based */
1356 		} else {
1357 			/* assume a breakpoint address */
1358 			bp = at_breakpoint(a);
1359 			if (bp == NULL) {
1360 				printf("No breakpoint at %lx\n", a);
1361 				break;
1362 			}
1363 		}
1364 
1365 		printf("Cleared breakpoint %lx (", BP_NUM(bp));
1366 		xmon_print_symbol(bp->address, " ", ")\n");
1367 		bp->enabled = 0;
1368 		break;
1369 
1370 	default:
1371 		termch = cmd;
1372 		cmd = skipbl();
1373 		if (cmd == '?') {
1374 			printf(breakpoint_help_string);
1375 			break;
1376 		}
1377 		termch = cmd;
1378 		if (!scanhex(&a)) {
1379 			/* print all breakpoints */
1380 			printf("   type            address\n");
1381 			if (dabr.enabled) {
1382 				printf("   data   "REG"  [", dabr.address);
1383 				if (dabr.enabled & 1)
1384 					printf("r");
1385 				if (dabr.enabled & 2)
1386 					printf("w");
1387 				printf("]\n");
1388 			}
1389 			for (bp = bpts; bp < &bpts[NBPTS]; ++bp) {
1390 				if (!bp->enabled)
1391 					continue;
1392 				printf("%2x %s   ", BP_NUM(bp),
1393 				    (bp->enabled & BP_CIABR) ? "inst": "trap");
1394 				xmon_print_symbol(bp->address, "  ", "\n");
1395 			}
1396 			break;
1397 		}
1398 
1399 		if (!check_bp_loc(a))
1400 			break;
1401 		bp = new_breakpoint(a);
1402 		if (bp != NULL)
1403 			bp->enabled |= BP_TRAP;
1404 		break;
1405 	}
1406 }
1407 
1408 /* Very cheap human name for vector lookup. */
1409 static
1410 const char *getvecname(unsigned long vec)
1411 {
1412 	char *ret;
1413 
1414 	switch (vec) {
1415 	case 0x100:	ret = "(System Reset)"; break;
1416 	case 0x200:	ret = "(Machine Check)"; break;
1417 	case 0x300:	ret = "(Data Access)"; break;
1418 	case 0x380:
1419 		if (radix_enabled())
1420 			ret = "(Data Access Out of Range)";
1421 		else
1422 			ret = "(Data SLB Access)";
1423 		break;
1424 	case 0x400:	ret = "(Instruction Access)"; break;
1425 	case 0x480:
1426 		if (radix_enabled())
1427 			ret = "(Instruction Access Out of Range)";
1428 		else
1429 			ret = "(Instruction SLB Access)";
1430 		break;
1431 	case 0x500:	ret = "(Hardware Interrupt)"; break;
1432 	case 0x600:	ret = "(Alignment)"; break;
1433 	case 0x700:	ret = "(Program Check)"; break;
1434 	case 0x800:	ret = "(FPU Unavailable)"; break;
1435 	case 0x900:	ret = "(Decrementer)"; break;
1436 	case 0x980:	ret = "(Hypervisor Decrementer)"; break;
1437 	case 0xa00:	ret = "(Doorbell)"; break;
1438 	case 0xc00:	ret = "(System Call)"; break;
1439 	case 0xd00:	ret = "(Single Step)"; break;
1440 	case 0xe40:	ret = "(Emulation Assist)"; break;
1441 	case 0xe60:	ret = "(HMI)"; break;
1442 	case 0xe80:	ret = "(Hypervisor Doorbell)"; break;
1443 	case 0xf00:	ret = "(Performance Monitor)"; break;
1444 	case 0xf20:	ret = "(Altivec Unavailable)"; break;
1445 	case 0x1300:	ret = "(Instruction Breakpoint)"; break;
1446 	case 0x1500:	ret = "(Denormalisation)"; break;
1447 	case 0x1700:	ret = "(Altivec Assist)"; break;
1448 	default: ret = "";
1449 	}
1450 	return ret;
1451 }
1452 
1453 static void get_function_bounds(unsigned long pc, unsigned long *startp,
1454 				unsigned long *endp)
1455 {
1456 	unsigned long size, offset;
1457 	const char *name;
1458 
1459 	*startp = *endp = 0;
1460 	if (pc == 0)
1461 		return;
1462 	if (setjmp(bus_error_jmp) == 0) {
1463 		catch_memory_errors = 1;
1464 		sync();
1465 		name = kallsyms_lookup(pc, &size, &offset, NULL, tmpstr);
1466 		if (name != NULL) {
1467 			*startp = pc - offset;
1468 			*endp = pc - offset + size;
1469 		}
1470 		sync();
1471 	}
1472 	catch_memory_errors = 0;
1473 }
1474 
1475 #define LRSAVE_OFFSET		(STACK_FRAME_LR_SAVE * sizeof(unsigned long))
1476 #define MARKER_OFFSET		(STACK_FRAME_MARKER * sizeof(unsigned long))
1477 
1478 static void xmon_show_stack(unsigned long sp, unsigned long lr,
1479 			    unsigned long pc)
1480 {
1481 	int max_to_print = 64;
1482 	unsigned long ip;
1483 	unsigned long newsp;
1484 	unsigned long marker;
1485 	struct pt_regs regs;
1486 
1487 	while (max_to_print--) {
1488 		if (!is_kernel_addr(sp)) {
1489 			if (sp != 0)
1490 				printf("SP (%lx) is in userspace\n", sp);
1491 			break;
1492 		}
1493 
1494 		if (!mread(sp + LRSAVE_OFFSET, &ip, sizeof(unsigned long))
1495 		    || !mread(sp, &newsp, sizeof(unsigned long))) {
1496 			printf("Couldn't read stack frame at %lx\n", sp);
1497 			break;
1498 		}
1499 
1500 		/*
1501 		 * For the first stack frame, try to work out if
1502 		 * LR and/or the saved LR value in the bottommost
1503 		 * stack frame are valid.
1504 		 */
1505 		if ((pc | lr) != 0) {
1506 			unsigned long fnstart, fnend;
1507 			unsigned long nextip;
1508 			int printip = 1;
1509 
1510 			get_function_bounds(pc, &fnstart, &fnend);
1511 			nextip = 0;
1512 			if (newsp > sp)
1513 				mread(newsp + LRSAVE_OFFSET, &nextip,
1514 				      sizeof(unsigned long));
1515 			if (lr == ip) {
1516 				if (!is_kernel_addr(lr)
1517 				    || (fnstart <= lr && lr < fnend))
1518 					printip = 0;
1519 			} else if (lr == nextip) {
1520 				printip = 0;
1521 			} else if (is_kernel_addr(lr)
1522 				   && !(fnstart <= lr && lr < fnend)) {
1523 				printf("[link register   ] ");
1524 				xmon_print_symbol(lr, " ", "\n");
1525 			}
1526 			if (printip) {
1527 				printf("["REG"] ", sp);
1528 				xmon_print_symbol(ip, " ", " (unreliable)\n");
1529 			}
1530 			pc = lr = 0;
1531 
1532 		} else {
1533 			printf("["REG"] ", sp);
1534 			xmon_print_symbol(ip, " ", "\n");
1535 		}
1536 
1537 		/* Look for "regshere" marker to see if this is
1538 		   an exception frame. */
1539 		if (mread(sp + MARKER_OFFSET, &marker, sizeof(unsigned long))
1540 		    && marker == STACK_FRAME_REGS_MARKER) {
1541 			if (mread(sp + STACK_FRAME_OVERHEAD, &regs, sizeof(regs))
1542 			    != sizeof(regs)) {
1543 				printf("Couldn't read registers at %lx\n",
1544 				       sp + STACK_FRAME_OVERHEAD);
1545 				break;
1546 			}
1547 			printf("--- Exception: %lx %s at ", regs.trap,
1548 			       getvecname(TRAP(&regs)));
1549 			pc = regs.nip;
1550 			lr = regs.link;
1551 			xmon_print_symbol(pc, " ", "\n");
1552 		}
1553 
1554 		if (newsp == 0)
1555 			break;
1556 
1557 		sp = newsp;
1558 	}
1559 }
1560 
1561 static void backtrace(struct pt_regs *excp)
1562 {
1563 	unsigned long sp;
1564 
1565 	if (scanhex(&sp))
1566 		xmon_show_stack(sp, 0, 0);
1567 	else
1568 		xmon_show_stack(excp->gpr[1], excp->link, excp->nip);
1569 	scannl();
1570 }
1571 
1572 static void print_bug_trap(struct pt_regs *regs)
1573 {
1574 #ifdef CONFIG_BUG
1575 	const struct bug_entry *bug;
1576 	unsigned long addr;
1577 
1578 	if (regs->msr & MSR_PR)
1579 		return;		/* not in kernel */
1580 	addr = regs->nip;	/* address of trap instruction */
1581 	if (!is_kernel_addr(addr))
1582 		return;
1583 	bug = find_bug(regs->nip);
1584 	if (bug == NULL)
1585 		return;
1586 	if (is_warning_bug(bug))
1587 		return;
1588 
1589 #ifdef CONFIG_DEBUG_BUGVERBOSE
1590 	printf("kernel BUG at %s:%u!\n",
1591 	       bug->file, bug->line);
1592 #else
1593 	printf("kernel BUG at %px!\n", (void *)bug->bug_addr);
1594 #endif
1595 #endif /* CONFIG_BUG */
1596 }
1597 
1598 static void excprint(struct pt_regs *fp)
1599 {
1600 	unsigned long trap;
1601 
1602 #ifdef CONFIG_SMP
1603 	printf("cpu 0x%x: ", smp_processor_id());
1604 #endif /* CONFIG_SMP */
1605 
1606 	trap = TRAP(fp);
1607 	printf("Vector: %lx %s at [%lx]\n", fp->trap, getvecname(trap), fp);
1608 	printf("    pc: ");
1609 	xmon_print_symbol(fp->nip, ": ", "\n");
1610 
1611 	printf("    lr: ", fp->link);
1612 	xmon_print_symbol(fp->link, ": ", "\n");
1613 
1614 	printf("    sp: %lx\n", fp->gpr[1]);
1615 	printf("   msr: %lx\n", fp->msr);
1616 
1617 	if (trap == 0x300 || trap == 0x380 || trap == 0x600 || trap == 0x200) {
1618 		printf("   dar: %lx\n", fp->dar);
1619 		if (trap != 0x380)
1620 			printf(" dsisr: %lx\n", fp->dsisr);
1621 	}
1622 
1623 	printf("  current = 0x%lx\n", current);
1624 #ifdef CONFIG_PPC64
1625 	printf("  paca    = 0x%lx\t softe: %d\t irq_happened: 0x%02x\n",
1626 	       local_paca, local_paca->soft_enabled, local_paca->irq_happened);
1627 #endif
1628 	if (current) {
1629 		printf("    pid   = %ld, comm = %s\n",
1630 		       current->pid, current->comm);
1631 	}
1632 
1633 	if (trap == 0x700)
1634 		print_bug_trap(fp);
1635 
1636 	printf(linux_banner);
1637 }
1638 
1639 static void prregs(struct pt_regs *fp)
1640 {
1641 	int n, trap;
1642 	unsigned long base;
1643 	struct pt_regs regs;
1644 
1645 	if (scanhex(&base)) {
1646 		if (setjmp(bus_error_jmp) == 0) {
1647 			catch_memory_errors = 1;
1648 			sync();
1649 			regs = *(struct pt_regs *)base;
1650 			sync();
1651 			__delay(200);
1652 		} else {
1653 			catch_memory_errors = 0;
1654 			printf("*** Error reading registers from "REG"\n",
1655 			       base);
1656 			return;
1657 		}
1658 		catch_memory_errors = 0;
1659 		fp = &regs;
1660 	}
1661 
1662 #ifdef CONFIG_PPC64
1663 	if (FULL_REGS(fp)) {
1664 		for (n = 0; n < 16; ++n)
1665 			printf("R%.2ld = "REG"   R%.2ld = "REG"\n",
1666 			       n, fp->gpr[n], n+16, fp->gpr[n+16]);
1667 	} else {
1668 		for (n = 0; n < 7; ++n)
1669 			printf("R%.2ld = "REG"   R%.2ld = "REG"\n",
1670 			       n, fp->gpr[n], n+7, fp->gpr[n+7]);
1671 	}
1672 #else
1673 	for (n = 0; n < 32; ++n) {
1674 		printf("R%.2d = %.8x%s", n, fp->gpr[n],
1675 		       (n & 3) == 3? "\n": "   ");
1676 		if (n == 12 && !FULL_REGS(fp)) {
1677 			printf("\n");
1678 			break;
1679 		}
1680 	}
1681 #endif
1682 	printf("pc  = ");
1683 	xmon_print_symbol(fp->nip, " ", "\n");
1684 	if (TRAP(fp) != 0xc00 && cpu_has_feature(CPU_FTR_CFAR)) {
1685 		printf("cfar= ");
1686 		xmon_print_symbol(fp->orig_gpr3, " ", "\n");
1687 	}
1688 	printf("lr  = ");
1689 	xmon_print_symbol(fp->link, " ", "\n");
1690 	printf("msr = "REG"   cr  = %.8lx\n", fp->msr, fp->ccr);
1691 	printf("ctr = "REG"   xer = "REG"   trap = %4lx\n",
1692 	       fp->ctr, fp->xer, fp->trap);
1693 	trap = TRAP(fp);
1694 	if (trap == 0x300 || trap == 0x380 || trap == 0x600)
1695 		printf("dar = "REG"   dsisr = %.8lx\n", fp->dar, fp->dsisr);
1696 }
1697 
1698 static void cacheflush(void)
1699 {
1700 	int cmd;
1701 	unsigned long nflush;
1702 
1703 	cmd = inchar();
1704 	if (cmd != 'i')
1705 		termch = cmd;
1706 	scanhex((void *)&adrs);
1707 	if (termch != '\n')
1708 		termch = 0;
1709 	nflush = 1;
1710 	scanhex(&nflush);
1711 	nflush = (nflush + L1_CACHE_BYTES - 1) / L1_CACHE_BYTES;
1712 	if (setjmp(bus_error_jmp) == 0) {
1713 		catch_memory_errors = 1;
1714 		sync();
1715 
1716 		if (cmd != 'i') {
1717 			for (; nflush > 0; --nflush, adrs += L1_CACHE_BYTES)
1718 				cflush((void *) adrs);
1719 		} else {
1720 			for (; nflush > 0; --nflush, adrs += L1_CACHE_BYTES)
1721 				cinval((void *) adrs);
1722 		}
1723 		sync();
1724 		/* wait a little while to see if we get a machine check */
1725 		__delay(200);
1726 	}
1727 	catch_memory_errors = 0;
1728 }
1729 
1730 extern unsigned long xmon_mfspr(int spr, unsigned long default_value);
1731 extern void xmon_mtspr(int spr, unsigned long value);
1732 
1733 static int
1734 read_spr(int n, unsigned long *vp)
1735 {
1736 	unsigned long ret = -1UL;
1737 	int ok = 0;
1738 
1739 	if (setjmp(bus_error_jmp) == 0) {
1740 		catch_spr_faults = 1;
1741 		sync();
1742 
1743 		ret = xmon_mfspr(n, *vp);
1744 
1745 		sync();
1746 		*vp = ret;
1747 		ok = 1;
1748 	}
1749 	catch_spr_faults = 0;
1750 
1751 	return ok;
1752 }
1753 
1754 static void
1755 write_spr(int n, unsigned long val)
1756 {
1757 	if (setjmp(bus_error_jmp) == 0) {
1758 		catch_spr_faults = 1;
1759 		sync();
1760 
1761 		xmon_mtspr(n, val);
1762 
1763 		sync();
1764 	} else {
1765 		printf("SPR 0x%03x (%4d) Faulted during write\n", n, n);
1766 	}
1767 	catch_spr_faults = 0;
1768 }
1769 
1770 static void dump_206_sprs(void)
1771 {
1772 #ifdef CONFIG_PPC64
1773 	if (!cpu_has_feature(CPU_FTR_ARCH_206))
1774 		return;
1775 
1776 	/* Actually some of these pre-date 2.06, but whatevs */
1777 
1778 	printf("srr0   = %.16lx  srr1  = %.16lx dsisr  = %.8x\n",
1779 		mfspr(SPRN_SRR0), mfspr(SPRN_SRR1), mfspr(SPRN_DSISR));
1780 	printf("dscr   = %.16lx  ppr   = %.16lx pir    = %.8x\n",
1781 		mfspr(SPRN_DSCR), mfspr(SPRN_PPR), mfspr(SPRN_PIR));
1782 	printf("amr    = %.16lx  uamor = %.16lx\n",
1783 		mfspr(SPRN_AMR), mfspr(SPRN_UAMOR));
1784 
1785 	if (!(mfmsr() & MSR_HV))
1786 		return;
1787 
1788 	printf("sdr1   = %.16lx  hdar  = %.16lx hdsisr = %.8x\n",
1789 		mfspr(SPRN_SDR1), mfspr(SPRN_HDAR), mfspr(SPRN_HDSISR));
1790 	printf("hsrr0  = %.16lx hsrr1  = %.16lx hdec   = %.16lx\n",
1791 		mfspr(SPRN_HSRR0), mfspr(SPRN_HSRR1), mfspr(SPRN_HDEC));
1792 	printf("lpcr   = %.16lx  pcr   = %.16lx lpidr  = %.8x\n",
1793 		mfspr(SPRN_LPCR), mfspr(SPRN_PCR), mfspr(SPRN_LPID));
1794 	printf("hsprg0 = %.16lx hsprg1 = %.16lx amor   = %.16lx\n",
1795 		mfspr(SPRN_HSPRG0), mfspr(SPRN_HSPRG1), mfspr(SPRN_AMOR));
1796 	printf("dabr   = %.16lx dabrx  = %.16lx\n",
1797 		mfspr(SPRN_DABR), mfspr(SPRN_DABRX));
1798 #endif
1799 }
1800 
1801 static void dump_207_sprs(void)
1802 {
1803 #ifdef CONFIG_PPC64
1804 	unsigned long msr;
1805 
1806 	if (!cpu_has_feature(CPU_FTR_ARCH_207S))
1807 		return;
1808 
1809 	printf("dpdes  = %.16lx  tir   = %.16lx cir    = %.8x\n",
1810 		mfspr(SPRN_DPDES), mfspr(SPRN_TIR), mfspr(SPRN_CIR));
1811 
1812 	printf("fscr   = %.16lx  tar   = %.16lx pspb   = %.8x\n",
1813 		mfspr(SPRN_FSCR), mfspr(SPRN_TAR), mfspr(SPRN_PSPB));
1814 
1815 	msr = mfmsr();
1816 	if (msr & MSR_TM) {
1817 		/* Only if TM has been enabled in the kernel */
1818 		printf("tfhar  = %.16lx  tfiar = %.16lx texasr = %.16lx\n",
1819 			mfspr(SPRN_TFHAR), mfspr(SPRN_TFIAR),
1820 			mfspr(SPRN_TEXASR));
1821 	}
1822 
1823 	printf("mmcr0  = %.16lx  mmcr1 = %.16lx mmcr2  = %.16lx\n",
1824 		mfspr(SPRN_MMCR0), mfspr(SPRN_MMCR1), mfspr(SPRN_MMCR2));
1825 	printf("pmc1   = %.8x pmc2 = %.8x  pmc3 = %.8x  pmc4   = %.8x\n",
1826 		mfspr(SPRN_PMC1), mfspr(SPRN_PMC2),
1827 		mfspr(SPRN_PMC3), mfspr(SPRN_PMC4));
1828 	printf("mmcra  = %.16lx   siar = %.16lx pmc5   = %.8x\n",
1829 		mfspr(SPRN_MMCRA), mfspr(SPRN_SIAR), mfspr(SPRN_PMC5));
1830 	printf("sdar   = %.16lx   sier = %.16lx pmc6   = %.8x\n",
1831 		mfspr(SPRN_SDAR), mfspr(SPRN_SIER), mfspr(SPRN_PMC6));
1832 	printf("ebbhr  = %.16lx  ebbrr = %.16lx bescr  = %.16lx\n",
1833 		mfspr(SPRN_EBBHR), mfspr(SPRN_EBBRR), mfspr(SPRN_BESCR));
1834 	printf("iamr   = %.16lx\n", mfspr(SPRN_IAMR));
1835 
1836 	if (!(msr & MSR_HV))
1837 		return;
1838 
1839 	printf("hfscr  = %.16lx  dhdes = %.16lx rpr    = %.16lx\n",
1840 		mfspr(SPRN_HFSCR), mfspr(SPRN_DHDES), mfspr(SPRN_RPR));
1841 	printf("dawr   = %.16lx  dawrx = %.16lx ciabr  = %.16lx\n",
1842 		mfspr(SPRN_DAWR), mfspr(SPRN_DAWRX), mfspr(SPRN_CIABR));
1843 #endif
1844 }
1845 
1846 static void dump_300_sprs(void)
1847 {
1848 #ifdef CONFIG_PPC64
1849 	bool hv = mfmsr() & MSR_HV;
1850 
1851 	if (!cpu_has_feature(CPU_FTR_ARCH_300))
1852 		return;
1853 
1854 	printf("pidr   = %.16lx  tidr  = %.16lx\n",
1855 		mfspr(SPRN_PID), mfspr(SPRN_TIDR));
1856 	printf("asdr   = %.16lx  psscr = %.16lx\n",
1857 		mfspr(SPRN_ASDR), hv ? mfspr(SPRN_PSSCR)
1858 					: mfspr(SPRN_PSSCR_PR));
1859 
1860 	if (!hv)
1861 		return;
1862 
1863 	printf("ptcr   = %.16lx\n",
1864 		mfspr(SPRN_PTCR));
1865 #endif
1866 }
1867 
1868 static void dump_one_spr(int spr, bool show_unimplemented)
1869 {
1870 	unsigned long val;
1871 
1872 	val = 0xdeadbeef;
1873 	if (!read_spr(spr, &val)) {
1874 		printf("SPR 0x%03x (%4d) Faulted during read\n", spr, spr);
1875 		return;
1876 	}
1877 
1878 	if (val == 0xdeadbeef) {
1879 		/* Looks like read was a nop, confirm */
1880 		val = 0x0badcafe;
1881 		if (!read_spr(spr, &val)) {
1882 			printf("SPR 0x%03x (%4d) Faulted during read\n", spr, spr);
1883 			return;
1884 		}
1885 
1886 		if (val == 0x0badcafe) {
1887 			if (show_unimplemented)
1888 				printf("SPR 0x%03x (%4d) Unimplemented\n", spr, spr);
1889 			return;
1890 		}
1891 	}
1892 
1893 	printf("SPR 0x%03x (%4d) = 0x%lx\n", spr, spr, val);
1894 }
1895 
1896 static void super_regs(void)
1897 {
1898 	static unsigned long regno;
1899 	int cmd;
1900 	int spr;
1901 
1902 	cmd = skipbl();
1903 
1904 	switch (cmd) {
1905 	case '\n': {
1906 		unsigned long sp, toc;
1907 		asm("mr %0,1" : "=r" (sp) :);
1908 		asm("mr %0,2" : "=r" (toc) :);
1909 
1910 		printf("msr    = "REG"  sprg0 = "REG"\n",
1911 		       mfmsr(), mfspr(SPRN_SPRG0));
1912 		printf("pvr    = "REG"  sprg1 = "REG"\n",
1913 		       mfspr(SPRN_PVR), mfspr(SPRN_SPRG1));
1914 		printf("dec    = "REG"  sprg2 = "REG"\n",
1915 		       mfspr(SPRN_DEC), mfspr(SPRN_SPRG2));
1916 		printf("sp     = "REG"  sprg3 = "REG"\n", sp, mfspr(SPRN_SPRG3));
1917 		printf("toc    = "REG"  dar   = "REG"\n", toc, mfspr(SPRN_DAR));
1918 
1919 		dump_206_sprs();
1920 		dump_207_sprs();
1921 		dump_300_sprs();
1922 
1923 		return;
1924 	}
1925 	case 'w': {
1926 		unsigned long val;
1927 		scanhex(&regno);
1928 		val = 0;
1929 		read_spr(regno, &val);
1930 		scanhex(&val);
1931 		write_spr(regno, val);
1932 		dump_one_spr(regno, true);
1933 		break;
1934 	}
1935 	case 'r':
1936 		scanhex(&regno);
1937 		dump_one_spr(regno, true);
1938 		break;
1939 	case 'a':
1940 		/* dump ALL SPRs */
1941 		for (spr = 1; spr < 1024; ++spr)
1942 			dump_one_spr(spr, false);
1943 		break;
1944 	}
1945 
1946 	scannl();
1947 }
1948 
1949 /*
1950  * Stuff for reading and writing memory safely
1951  */
1952 static int
1953 mread(unsigned long adrs, void *buf, int size)
1954 {
1955 	volatile int n;
1956 	char *p, *q;
1957 
1958 	n = 0;
1959 	if (setjmp(bus_error_jmp) == 0) {
1960 		catch_memory_errors = 1;
1961 		sync();
1962 		p = (char *)adrs;
1963 		q = (char *)buf;
1964 		switch (size) {
1965 		case 2:
1966 			*(u16 *)q = *(u16 *)p;
1967 			break;
1968 		case 4:
1969 			*(u32 *)q = *(u32 *)p;
1970 			break;
1971 		case 8:
1972 			*(u64 *)q = *(u64 *)p;
1973 			break;
1974 		default:
1975 			for( ; n < size; ++n) {
1976 				*q++ = *p++;
1977 				sync();
1978 			}
1979 		}
1980 		sync();
1981 		/* wait a little while to see if we get a machine check */
1982 		__delay(200);
1983 		n = size;
1984 	}
1985 	catch_memory_errors = 0;
1986 	return n;
1987 }
1988 
1989 static int
1990 mwrite(unsigned long adrs, void *buf, int size)
1991 {
1992 	volatile int n;
1993 	char *p, *q;
1994 
1995 	n = 0;
1996 	if (setjmp(bus_error_jmp) == 0) {
1997 		catch_memory_errors = 1;
1998 		sync();
1999 		p = (char *) adrs;
2000 		q = (char *) buf;
2001 		switch (size) {
2002 		case 2:
2003 			*(u16 *)p = *(u16 *)q;
2004 			break;
2005 		case 4:
2006 			*(u32 *)p = *(u32 *)q;
2007 			break;
2008 		case 8:
2009 			*(u64 *)p = *(u64 *)q;
2010 			break;
2011 		default:
2012 			for ( ; n < size; ++n) {
2013 				*p++ = *q++;
2014 				sync();
2015 			}
2016 		}
2017 		sync();
2018 		/* wait a little while to see if we get a machine check */
2019 		__delay(200);
2020 		n = size;
2021 	} else {
2022 		printf("*** Error writing address "REG"\n", adrs + n);
2023 	}
2024 	catch_memory_errors = 0;
2025 	return n;
2026 }
2027 
2028 static int fault_type;
2029 static int fault_except;
2030 static char *fault_chars[] = { "--", "**", "##" };
2031 
2032 static int handle_fault(struct pt_regs *regs)
2033 {
2034 	fault_except = TRAP(regs);
2035 	switch (TRAP(regs)) {
2036 	case 0x200:
2037 		fault_type = 0;
2038 		break;
2039 	case 0x300:
2040 	case 0x380:
2041 		fault_type = 1;
2042 		break;
2043 	default:
2044 		fault_type = 2;
2045 	}
2046 
2047 	longjmp(bus_error_jmp, 1);
2048 
2049 	return 0;
2050 }
2051 
2052 #define SWAP(a, b, t)	((t) = (a), (a) = (b), (b) = (t))
2053 
2054 static void
2055 byterev(unsigned char *val, int size)
2056 {
2057 	int t;
2058 
2059 	switch (size) {
2060 	case 2:
2061 		SWAP(val[0], val[1], t);
2062 		break;
2063 	case 4:
2064 		SWAP(val[0], val[3], t);
2065 		SWAP(val[1], val[2], t);
2066 		break;
2067 	case 8: /* is there really any use for this? */
2068 		SWAP(val[0], val[7], t);
2069 		SWAP(val[1], val[6], t);
2070 		SWAP(val[2], val[5], t);
2071 		SWAP(val[3], val[4], t);
2072 		break;
2073 	}
2074 }
2075 
2076 static int brev;
2077 static int mnoread;
2078 
2079 static char *memex_help_string =
2080     "Memory examine command usage:\n"
2081     "m [addr] [flags] examine/change memory\n"
2082     "  addr is optional.  will start where left off.\n"
2083     "  flags may include chars from this set:\n"
2084     "    b   modify by bytes (default)\n"
2085     "    w   modify by words (2 byte)\n"
2086     "    l   modify by longs (4 byte)\n"
2087     "    d   modify by doubleword (8 byte)\n"
2088     "    r   toggle reverse byte order mode\n"
2089     "    n   do not read memory (for i/o spaces)\n"
2090     "    .   ok to read (default)\n"
2091     "NOTE: flags are saved as defaults\n"
2092     "";
2093 
2094 static char *memex_subcmd_help_string =
2095     "Memory examine subcommands:\n"
2096     "  hexval   write this val to current location\n"
2097     "  'string' write chars from string to this location\n"
2098     "  '        increment address\n"
2099     "  ^        decrement address\n"
2100     "  /        increment addr by 0x10.  //=0x100, ///=0x1000, etc\n"
2101     "  \\        decrement addr by 0x10.  \\\\=0x100, \\\\\\=0x1000, etc\n"
2102     "  `        clear no-read flag\n"
2103     "  ;        stay at this addr\n"
2104     "  v        change to byte mode\n"
2105     "  w        change to word (2 byte) mode\n"
2106     "  l        change to long (4 byte) mode\n"
2107     "  u        change to doubleword (8 byte) mode\n"
2108     "  m addr   change current addr\n"
2109     "  n        toggle no-read flag\n"
2110     "  r        toggle byte reverse flag\n"
2111     "  < count  back up count bytes\n"
2112     "  > count  skip forward count bytes\n"
2113     "  x        exit this mode\n"
2114     "";
2115 
2116 static void
2117 memex(void)
2118 {
2119 	int cmd, inc, i, nslash;
2120 	unsigned long n;
2121 	unsigned char val[16];
2122 
2123 	scanhex((void *)&adrs);
2124 	cmd = skipbl();
2125 	if (cmd == '?') {
2126 		printf(memex_help_string);
2127 		return;
2128 	} else {
2129 		termch = cmd;
2130 	}
2131 	last_cmd = "m\n";
2132 	while ((cmd = skipbl()) != '\n') {
2133 		switch( cmd ){
2134 		case 'b':	size = 1;	break;
2135 		case 'w':	size = 2;	break;
2136 		case 'l':	size = 4;	break;
2137 		case 'd':	size = 8;	break;
2138 		case 'r': 	brev = !brev;	break;
2139 		case 'n':	mnoread = 1;	break;
2140 		case '.':	mnoread = 0;	break;
2141 		}
2142 	}
2143 	if( size <= 0 )
2144 		size = 1;
2145 	else if( size > 8 )
2146 		size = 8;
2147 	for(;;){
2148 		if (!mnoread)
2149 			n = mread(adrs, val, size);
2150 		printf(REG"%c", adrs, brev? 'r': ' ');
2151 		if (!mnoread) {
2152 			if (brev)
2153 				byterev(val, size);
2154 			putchar(' ');
2155 			for (i = 0; i < n; ++i)
2156 				printf("%.2x", val[i]);
2157 			for (; i < size; ++i)
2158 				printf("%s", fault_chars[fault_type]);
2159 		}
2160 		putchar(' ');
2161 		inc = size;
2162 		nslash = 0;
2163 		for(;;){
2164 			if( scanhex(&n) ){
2165 				for (i = 0; i < size; ++i)
2166 					val[i] = n >> (i * 8);
2167 				if (!brev)
2168 					byterev(val, size);
2169 				mwrite(adrs, val, size);
2170 				inc = size;
2171 			}
2172 			cmd = skipbl();
2173 			if (cmd == '\n')
2174 				break;
2175 			inc = 0;
2176 			switch (cmd) {
2177 			case '\'':
2178 				for(;;){
2179 					n = inchar();
2180 					if( n == '\\' )
2181 						n = bsesc();
2182 					else if( n == '\'' )
2183 						break;
2184 					for (i = 0; i < size; ++i)
2185 						val[i] = n >> (i * 8);
2186 					if (!brev)
2187 						byterev(val, size);
2188 					mwrite(adrs, val, size);
2189 					adrs += size;
2190 				}
2191 				adrs -= size;
2192 				inc = size;
2193 				break;
2194 			case ',':
2195 				adrs += size;
2196 				break;
2197 			case '.':
2198 				mnoread = 0;
2199 				break;
2200 			case ';':
2201 				break;
2202 			case 'x':
2203 			case EOF:
2204 				scannl();
2205 				return;
2206 			case 'b':
2207 			case 'v':
2208 				size = 1;
2209 				break;
2210 			case 'w':
2211 				size = 2;
2212 				break;
2213 			case 'l':
2214 				size = 4;
2215 				break;
2216 			case 'u':
2217 				size = 8;
2218 				break;
2219 			case '^':
2220 				adrs -= size;
2221 				break;
2222 			case '/':
2223 				if (nslash > 0)
2224 					adrs -= 1 << nslash;
2225 				else
2226 					nslash = 0;
2227 				nslash += 4;
2228 				adrs += 1 << nslash;
2229 				break;
2230 			case '\\':
2231 				if (nslash < 0)
2232 					adrs += 1 << -nslash;
2233 				else
2234 					nslash = 0;
2235 				nslash -= 4;
2236 				adrs -= 1 << -nslash;
2237 				break;
2238 			case 'm':
2239 				scanhex((void *)&adrs);
2240 				break;
2241 			case 'n':
2242 				mnoread = 1;
2243 				break;
2244 			case 'r':
2245 				brev = !brev;
2246 				break;
2247 			case '<':
2248 				n = size;
2249 				scanhex(&n);
2250 				adrs -= n;
2251 				break;
2252 			case '>':
2253 				n = size;
2254 				scanhex(&n);
2255 				adrs += n;
2256 				break;
2257 			case '?':
2258 				printf(memex_subcmd_help_string);
2259 				break;
2260 			}
2261 		}
2262 		adrs += inc;
2263 	}
2264 }
2265 
2266 static int
2267 bsesc(void)
2268 {
2269 	int c;
2270 
2271 	c = inchar();
2272 	switch( c ){
2273 	case 'n':	c = '\n';	break;
2274 	case 'r':	c = '\r';	break;
2275 	case 'b':	c = '\b';	break;
2276 	case 't':	c = '\t';	break;
2277 	}
2278 	return c;
2279 }
2280 
2281 static void xmon_rawdump (unsigned long adrs, long ndump)
2282 {
2283 	long n, m, r, nr;
2284 	unsigned char temp[16];
2285 
2286 	for (n = ndump; n > 0;) {
2287 		r = n < 16? n: 16;
2288 		nr = mread(adrs, temp, r);
2289 		adrs += nr;
2290 		for (m = 0; m < r; ++m) {
2291 			if (m < nr)
2292 				printf("%.2x", temp[m]);
2293 			else
2294 				printf("%s", fault_chars[fault_type]);
2295 		}
2296 		n -= r;
2297 		if (nr < r)
2298 			break;
2299 	}
2300 	printf("\n");
2301 }
2302 
2303 static void dump_tracing(void)
2304 {
2305 	int c;
2306 
2307 	c = inchar();
2308 	if (c == 'c')
2309 		ftrace_dump(DUMP_ORIG);
2310 	else
2311 		ftrace_dump(DUMP_ALL);
2312 }
2313 
2314 #ifdef CONFIG_PPC64
2315 static void dump_one_paca(int cpu)
2316 {
2317 	struct paca_struct *p;
2318 #ifdef CONFIG_PPC_BOOK3S_64
2319 	int i = 0;
2320 #endif
2321 
2322 	if (setjmp(bus_error_jmp) != 0) {
2323 		printf("*** Error dumping paca for cpu 0x%x!\n", cpu);
2324 		return;
2325 	}
2326 
2327 	catch_memory_errors = 1;
2328 	sync();
2329 
2330 	p = &paca[cpu];
2331 
2332 	printf("paca for cpu 0x%x @ %px:\n", cpu, p);
2333 
2334 	printf(" %-*s = %s\n", 20, "possible", cpu_possible(cpu) ? "yes" : "no");
2335 	printf(" %-*s = %s\n", 20, "present", cpu_present(cpu) ? "yes" : "no");
2336 	printf(" %-*s = %s\n", 20, "online", cpu_online(cpu) ? "yes" : "no");
2337 
2338 #define DUMP(paca, name, format) \
2339 	printf(" %-*s = %#-*"format"\t(0x%lx)\n", 20, #name, 18, paca->name, \
2340 		offsetof(struct paca_struct, name));
2341 
2342 	DUMP(p, lock_token, "x");
2343 	DUMP(p, paca_index, "x");
2344 	DUMP(p, kernel_toc, "lx");
2345 	DUMP(p, kernelbase, "lx");
2346 	DUMP(p, kernel_msr, "lx");
2347 	DUMP(p, emergency_sp, "px");
2348 #ifdef CONFIG_PPC_BOOK3S_64
2349 	DUMP(p, nmi_emergency_sp, "px");
2350 	DUMP(p, mc_emergency_sp, "px");
2351 	DUMP(p, in_nmi, "x");
2352 	DUMP(p, in_mce, "x");
2353 	DUMP(p, hmi_event_available, "x");
2354 #endif
2355 	DUMP(p, data_offset, "lx");
2356 	DUMP(p, hw_cpu_id, "x");
2357 	DUMP(p, cpu_start, "x");
2358 	DUMP(p, kexec_state, "x");
2359 #ifdef CONFIG_PPC_BOOK3S_64
2360 	for (i = 0; i < SLB_NUM_BOLTED; i++) {
2361 		u64 esid, vsid;
2362 
2363 		if (!p->slb_shadow_ptr)
2364 			continue;
2365 
2366 		esid = be64_to_cpu(p->slb_shadow_ptr->save_area[i].esid);
2367 		vsid = be64_to_cpu(p->slb_shadow_ptr->save_area[i].vsid);
2368 
2369 		if (esid || vsid) {
2370 			printf(" slb_shadow[%d]:       = 0x%016lx 0x%016lx\n",
2371 				i, esid, vsid);
2372 		}
2373 	}
2374 	DUMP(p, vmalloc_sllp, "x");
2375 	DUMP(p, slb_cache_ptr, "x");
2376 	for (i = 0; i < SLB_CACHE_ENTRIES; i++)
2377 		printf(" slb_cache[%d]:        = 0x%016lx\n", i, p->slb_cache[i]);
2378 
2379 	DUMP(p, rfi_flush_fallback_area, "px");
2380 	DUMP(p, l1d_flush_congruence, "llx");
2381 	DUMP(p, l1d_flush_sets, "llx");
2382 #endif
2383 	DUMP(p, dscr_default, "llx");
2384 #ifdef CONFIG_PPC_BOOK3E
2385 	DUMP(p, pgd, "px");
2386 	DUMP(p, kernel_pgd, "px");
2387 	DUMP(p, tcd_ptr, "px");
2388 	DUMP(p, mc_kstack, "px");
2389 	DUMP(p, crit_kstack, "px");
2390 	DUMP(p, dbg_kstack, "px");
2391 #endif
2392 	DUMP(p, __current, "px");
2393 	DUMP(p, kstack, "lx");
2394 	printf(" kstack_base          = 0x%016lx\n", p->kstack & ~(THREAD_SIZE - 1));
2395 	DUMP(p, stab_rr, "lx");
2396 	DUMP(p, saved_r1, "lx");
2397 	DUMP(p, trap_save, "x");
2398 	DUMP(p, soft_enabled, "x");
2399 	DUMP(p, irq_happened, "x");
2400 	DUMP(p, io_sync, "x");
2401 	DUMP(p, irq_work_pending, "x");
2402 	DUMP(p, nap_state_lost, "x");
2403 	DUMP(p, sprg_vdso, "llx");
2404 
2405 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
2406 	DUMP(p, tm_scratch, "llx");
2407 #endif
2408 
2409 #ifdef CONFIG_PPC_POWERNV
2410 	DUMP(p, core_idle_state_ptr, "px");
2411 	DUMP(p, thread_idle_state, "x");
2412 	DUMP(p, thread_mask, "x");
2413 	DUMP(p, subcore_sibling_mask, "x");
2414 #endif
2415 
2416 	DUMP(p, accounting.utime, "llx");
2417 	DUMP(p, accounting.stime, "llx");
2418 	DUMP(p, accounting.utime_scaled, "llx");
2419 	DUMP(p, accounting.starttime, "llx");
2420 	DUMP(p, accounting.starttime_user, "llx");
2421 	DUMP(p, accounting.startspurr, "llx");
2422 	DUMP(p, accounting.utime_sspurr, "llx");
2423 	DUMP(p, accounting.steal_time, "llx");
2424 #undef DUMP
2425 
2426 	catch_memory_errors = 0;
2427 	sync();
2428 }
2429 
2430 static void dump_all_pacas(void)
2431 {
2432 	int cpu;
2433 
2434 	if (num_possible_cpus() == 0) {
2435 		printf("No possible cpus, use 'dp #' to dump individual cpus\n");
2436 		return;
2437 	}
2438 
2439 	for_each_possible_cpu(cpu)
2440 		dump_one_paca(cpu);
2441 }
2442 
2443 static void dump_pacas(void)
2444 {
2445 	unsigned long num;
2446 	int c;
2447 
2448 	c = inchar();
2449 	if (c == 'a') {
2450 		dump_all_pacas();
2451 		return;
2452 	}
2453 
2454 	termch = c;	/* Put c back, it wasn't 'a' */
2455 
2456 	if (scanhex(&num))
2457 		dump_one_paca(num);
2458 	else
2459 		dump_one_paca(xmon_owner);
2460 }
2461 #endif
2462 
2463 #ifdef CONFIG_PPC_POWERNV
2464 static void dump_one_xive(int cpu)
2465 {
2466 	unsigned int hwid = get_hard_smp_processor_id(cpu);
2467 
2468 	opal_xive_dump(XIVE_DUMP_TM_HYP, hwid);
2469 	opal_xive_dump(XIVE_DUMP_TM_POOL, hwid);
2470 	opal_xive_dump(XIVE_DUMP_TM_OS, hwid);
2471 	opal_xive_dump(XIVE_DUMP_TM_USER, hwid);
2472 	opal_xive_dump(XIVE_DUMP_VP, hwid);
2473 	opal_xive_dump(XIVE_DUMP_EMU_STATE, hwid);
2474 
2475 	if (setjmp(bus_error_jmp) != 0) {
2476 		catch_memory_errors = 0;
2477 		printf("*** Error dumping xive on cpu %d\n", cpu);
2478 		return;
2479 	}
2480 
2481 	catch_memory_errors = 1;
2482 	sync();
2483 	xmon_xive_do_dump(cpu);
2484 	sync();
2485 	__delay(200);
2486 	catch_memory_errors = 0;
2487 }
2488 
2489 static void dump_all_xives(void)
2490 {
2491 	int cpu;
2492 
2493 	if (num_possible_cpus() == 0) {
2494 		printf("No possible cpus, use 'dx #' to dump individual cpus\n");
2495 		return;
2496 	}
2497 
2498 	for_each_possible_cpu(cpu)
2499 		dump_one_xive(cpu);
2500 }
2501 
2502 static void dump_one_xive_irq(u32 num)
2503 {
2504 	s64 rc;
2505 	__be64 vp;
2506 	u8 prio;
2507 	__be32 lirq;
2508 
2509 	rc = opal_xive_get_irq_config(num, &vp, &prio, &lirq);
2510 	xmon_printf("IRQ 0x%x config: vp=0x%llx prio=%d lirq=0x%x (rc=%lld)\n",
2511 		    num, be64_to_cpu(vp), prio, be32_to_cpu(lirq), rc);
2512 }
2513 
2514 static void dump_xives(void)
2515 {
2516 	unsigned long num;
2517 	int c;
2518 
2519 	if (!xive_enabled()) {
2520 		printf("Xive disabled on this system\n");
2521 		return;
2522 	}
2523 
2524 	c = inchar();
2525 	if (c == 'a') {
2526 		dump_all_xives();
2527 		return;
2528 	} else if (c == 'i') {
2529 		if (scanhex(&num))
2530 			dump_one_xive_irq(num);
2531 		return;
2532 	}
2533 
2534 	termch = c;	/* Put c back, it wasn't 'a' */
2535 
2536 	if (scanhex(&num))
2537 		dump_one_xive(num);
2538 	else
2539 		dump_one_xive(xmon_owner);
2540 }
2541 #endif /* CONFIG_PPC_POWERNV */
2542 
2543 static void dump_by_size(unsigned long addr, long count, int size)
2544 {
2545 	unsigned char temp[16];
2546 	int i, j;
2547 	u64 val;
2548 
2549 	count = ALIGN(count, 16);
2550 
2551 	for (i = 0; i < count; i += 16, addr += 16) {
2552 		printf(REG, addr);
2553 
2554 		if (mread(addr, temp, 16) != 16) {
2555 			printf("\nFaulted reading %d bytes from 0x"REG"\n", 16, addr);
2556 			return;
2557 		}
2558 
2559 		for (j = 0; j < 16; j += size) {
2560 			putchar(' ');
2561 			switch (size) {
2562 			case 1: val = temp[j]; break;
2563 			case 2: val = *(u16 *)&temp[j]; break;
2564 			case 4: val = *(u32 *)&temp[j]; break;
2565 			case 8: val = *(u64 *)&temp[j]; break;
2566 			default: val = 0;
2567 			}
2568 
2569 			printf("%0*lx", size * 2, val);
2570 		}
2571 		printf("\n");
2572 	}
2573 }
2574 
2575 static void
2576 dump(void)
2577 {
2578 	static char last[] = { "d?\n" };
2579 	int c;
2580 
2581 	c = inchar();
2582 
2583 #ifdef CONFIG_PPC64
2584 	if (c == 'p') {
2585 		xmon_start_pagination();
2586 		dump_pacas();
2587 		xmon_end_pagination();
2588 		return;
2589 	}
2590 #endif
2591 #ifdef CONFIG_PPC_POWERNV
2592 	if (c == 'x') {
2593 		xmon_start_pagination();
2594 		dump_xives();
2595 		xmon_end_pagination();
2596 		return;
2597 	}
2598 #endif
2599 
2600 	if (c == 't') {
2601 		dump_tracing();
2602 		return;
2603 	}
2604 
2605 	if (c == '\n')
2606 		termch = c;
2607 
2608 	scanhex((void *)&adrs);
2609 	if (termch != '\n')
2610 		termch = 0;
2611 	if (c == 'i') {
2612 		scanhex(&nidump);
2613 		if (nidump == 0)
2614 			nidump = 16;
2615 		else if (nidump > MAX_DUMP)
2616 			nidump = MAX_DUMP;
2617 		adrs += ppc_inst_dump(adrs, nidump, 1);
2618 		last_cmd = "di\n";
2619 	} else if (c == 'l') {
2620 		dump_log_buf();
2621 	} else if (c == 'o') {
2622 		dump_opal_msglog();
2623 	} else if (c == 'v') {
2624 		/* dump virtual to physical translation */
2625 		show_pte(adrs);
2626 	} else if (c == 'r') {
2627 		scanhex(&ndump);
2628 		if (ndump == 0)
2629 			ndump = 64;
2630 		xmon_rawdump(adrs, ndump);
2631 		adrs += ndump;
2632 		last_cmd = "dr\n";
2633 	} else {
2634 		scanhex(&ndump);
2635 		if (ndump == 0)
2636 			ndump = 64;
2637 		else if (ndump > MAX_DUMP)
2638 			ndump = MAX_DUMP;
2639 
2640 		switch (c) {
2641 		case '8':
2642 		case '4':
2643 		case '2':
2644 		case '1':
2645 			ndump = ALIGN(ndump, 16);
2646 			dump_by_size(adrs, ndump, c - '0');
2647 			last[1] = c;
2648 			last_cmd = last;
2649 			break;
2650 		default:
2651 			prdump(adrs, ndump);
2652 			last_cmd = "d\n";
2653 		}
2654 
2655 		adrs += ndump;
2656 	}
2657 }
2658 
2659 static void
2660 prdump(unsigned long adrs, long ndump)
2661 {
2662 	long n, m, c, r, nr;
2663 	unsigned char temp[16];
2664 
2665 	for (n = ndump; n > 0;) {
2666 		printf(REG, adrs);
2667 		putchar(' ');
2668 		r = n < 16? n: 16;
2669 		nr = mread(adrs, temp, r);
2670 		adrs += nr;
2671 		for (m = 0; m < r; ++m) {
2672 			if ((m & (sizeof(long) - 1)) == 0 && m > 0)
2673 				putchar(' ');
2674 			if (m < nr)
2675 				printf("%.2x", temp[m]);
2676 			else
2677 				printf("%s", fault_chars[fault_type]);
2678 		}
2679 		for (; m < 16; ++m) {
2680 			if ((m & (sizeof(long) - 1)) == 0)
2681 				putchar(' ');
2682 			printf("  ");
2683 		}
2684 		printf("  |");
2685 		for (m = 0; m < r; ++m) {
2686 			if (m < nr) {
2687 				c = temp[m];
2688 				putchar(' ' <= c && c <= '~'? c: '.');
2689 			} else
2690 				putchar(' ');
2691 		}
2692 		n -= r;
2693 		for (; m < 16; ++m)
2694 			putchar(' ');
2695 		printf("|\n");
2696 		if (nr < r)
2697 			break;
2698 	}
2699 }
2700 
2701 typedef int (*instruction_dump_func)(unsigned long inst, unsigned long addr);
2702 
2703 static int
2704 generic_inst_dump(unsigned long adr, long count, int praddr,
2705 			instruction_dump_func dump_func)
2706 {
2707 	int nr, dotted;
2708 	unsigned long first_adr;
2709 	unsigned long inst, last_inst = 0;
2710 	unsigned char val[4];
2711 
2712 	dotted = 0;
2713 	for (first_adr = adr; count > 0; --count, adr += 4) {
2714 		nr = mread(adr, val, 4);
2715 		if (nr == 0) {
2716 			if (praddr) {
2717 				const char *x = fault_chars[fault_type];
2718 				printf(REG"  %s%s%s%s\n", adr, x, x, x, x);
2719 			}
2720 			break;
2721 		}
2722 		inst = GETWORD(val);
2723 		if (adr > first_adr && inst == last_inst) {
2724 			if (!dotted) {
2725 				printf(" ...\n");
2726 				dotted = 1;
2727 			}
2728 			continue;
2729 		}
2730 		dotted = 0;
2731 		last_inst = inst;
2732 		if (praddr)
2733 			printf(REG"  %.8x", adr, inst);
2734 		printf("\t");
2735 		dump_func(inst, adr);
2736 		printf("\n");
2737 	}
2738 	return adr - first_adr;
2739 }
2740 
2741 static int
2742 ppc_inst_dump(unsigned long adr, long count, int praddr)
2743 {
2744 	return generic_inst_dump(adr, count, praddr, print_insn_powerpc);
2745 }
2746 
2747 void
2748 print_address(unsigned long addr)
2749 {
2750 	xmon_print_symbol(addr, "\t# ", "");
2751 }
2752 
2753 void
2754 dump_log_buf(void)
2755 {
2756 	struct kmsg_dumper dumper = { .active = 1 };
2757 	unsigned char buf[128];
2758 	size_t len;
2759 
2760 	if (setjmp(bus_error_jmp) != 0) {
2761 		printf("Error dumping printk buffer!\n");
2762 		return;
2763 	}
2764 
2765 	catch_memory_errors = 1;
2766 	sync();
2767 
2768 	kmsg_dump_rewind_nolock(&dumper);
2769 	xmon_start_pagination();
2770 	while (kmsg_dump_get_line_nolock(&dumper, false, buf, sizeof(buf), &len)) {
2771 		buf[len] = '\0';
2772 		printf("%s", buf);
2773 	}
2774 	xmon_end_pagination();
2775 
2776 	sync();
2777 	/* wait a little while to see if we get a machine check */
2778 	__delay(200);
2779 	catch_memory_errors = 0;
2780 }
2781 
2782 #ifdef CONFIG_PPC_POWERNV
2783 static void dump_opal_msglog(void)
2784 {
2785 	unsigned char buf[128];
2786 	ssize_t res;
2787 	loff_t pos = 0;
2788 
2789 	if (!firmware_has_feature(FW_FEATURE_OPAL)) {
2790 		printf("Machine is not running OPAL firmware.\n");
2791 		return;
2792 	}
2793 
2794 	if (setjmp(bus_error_jmp) != 0) {
2795 		printf("Error dumping OPAL msglog!\n");
2796 		return;
2797 	}
2798 
2799 	catch_memory_errors = 1;
2800 	sync();
2801 
2802 	xmon_start_pagination();
2803 	while ((res = opal_msglog_copy(buf, pos, sizeof(buf) - 1))) {
2804 		if (res < 0) {
2805 			printf("Error dumping OPAL msglog! Error: %zd\n", res);
2806 			break;
2807 		}
2808 		buf[res] = '\0';
2809 		printf("%s", buf);
2810 		pos += res;
2811 	}
2812 	xmon_end_pagination();
2813 
2814 	sync();
2815 	/* wait a little while to see if we get a machine check */
2816 	__delay(200);
2817 	catch_memory_errors = 0;
2818 }
2819 #endif
2820 
2821 /*
2822  * Memory operations - move, set, print differences
2823  */
2824 static unsigned long mdest;		/* destination address */
2825 static unsigned long msrc;		/* source address */
2826 static unsigned long mval;		/* byte value to set memory to */
2827 static unsigned long mcount;		/* # bytes to affect */
2828 static unsigned long mdiffs;		/* max # differences to print */
2829 
2830 static void
2831 memops(int cmd)
2832 {
2833 	scanhex((void *)&mdest);
2834 	if( termch != '\n' )
2835 		termch = 0;
2836 	scanhex((void *)(cmd == 's'? &mval: &msrc));
2837 	if( termch != '\n' )
2838 		termch = 0;
2839 	scanhex((void *)&mcount);
2840 	switch( cmd ){
2841 	case 'm':
2842 		memmove((void *)mdest, (void *)msrc, mcount);
2843 		break;
2844 	case 's':
2845 		memset((void *)mdest, mval, mcount);
2846 		break;
2847 	case 'd':
2848 		if( termch != '\n' )
2849 			termch = 0;
2850 		scanhex((void *)&mdiffs);
2851 		memdiffs((unsigned char *)mdest, (unsigned char *)msrc, mcount, mdiffs);
2852 		break;
2853 	}
2854 }
2855 
2856 static void
2857 memdiffs(unsigned char *p1, unsigned char *p2, unsigned nb, unsigned maxpr)
2858 {
2859 	unsigned n, prt;
2860 
2861 	prt = 0;
2862 	for( n = nb; n > 0; --n )
2863 		if( *p1++ != *p2++ )
2864 			if( ++prt <= maxpr )
2865 				printf("%.16x %.2x # %.16x %.2x\n", p1 - 1,
2866 					p1[-1], p2 - 1, p2[-1]);
2867 	if( prt > maxpr )
2868 		printf("Total of %d differences\n", prt);
2869 }
2870 
2871 static unsigned mend;
2872 static unsigned mask;
2873 
2874 static void
2875 memlocate(void)
2876 {
2877 	unsigned a, n;
2878 	unsigned char val[4];
2879 
2880 	last_cmd = "ml";
2881 	scanhex((void *)&mdest);
2882 	if (termch != '\n') {
2883 		termch = 0;
2884 		scanhex((void *)&mend);
2885 		if (termch != '\n') {
2886 			termch = 0;
2887 			scanhex((void *)&mval);
2888 			mask = ~0;
2889 			if (termch != '\n') termch = 0;
2890 			scanhex((void *)&mask);
2891 		}
2892 	}
2893 	n = 0;
2894 	for (a = mdest; a < mend; a += 4) {
2895 		if (mread(a, val, 4) == 4
2896 			&& ((GETWORD(val) ^ mval) & mask) == 0) {
2897 			printf("%.16x:  %.16x\n", a, GETWORD(val));
2898 			if (++n >= 10)
2899 				break;
2900 		}
2901 	}
2902 }
2903 
2904 static unsigned long mskip = 0x1000;
2905 static unsigned long mlim = 0xffffffff;
2906 
2907 static void
2908 memzcan(void)
2909 {
2910 	unsigned char v;
2911 	unsigned a;
2912 	int ok, ook;
2913 
2914 	scanhex(&mdest);
2915 	if (termch != '\n') termch = 0;
2916 	scanhex(&mskip);
2917 	if (termch != '\n') termch = 0;
2918 	scanhex(&mlim);
2919 	ook = 0;
2920 	for (a = mdest; a < mlim; a += mskip) {
2921 		ok = mread(a, &v, 1);
2922 		if (ok && !ook) {
2923 			printf("%.8x .. ", a);
2924 		} else if (!ok && ook)
2925 			printf("%.8x\n", a - mskip);
2926 		ook = ok;
2927 		if (a + mskip < a)
2928 			break;
2929 	}
2930 	if (ook)
2931 		printf("%.8x\n", a - mskip);
2932 }
2933 
2934 static void show_task(struct task_struct *tsk)
2935 {
2936 	char state;
2937 
2938 	/*
2939 	 * Cloned from kdb_task_state_char(), which is not entirely
2940 	 * appropriate for calling from xmon. This could be moved
2941 	 * to a common, generic, routine used by both.
2942 	 */
2943 	state = (tsk->state == 0) ? 'R' :
2944 		(tsk->state < 0) ? 'U' :
2945 		(tsk->state & TASK_UNINTERRUPTIBLE) ? 'D' :
2946 		(tsk->state & TASK_STOPPED) ? 'T' :
2947 		(tsk->state & TASK_TRACED) ? 'C' :
2948 		(tsk->exit_state & EXIT_ZOMBIE) ? 'Z' :
2949 		(tsk->exit_state & EXIT_DEAD) ? 'E' :
2950 		(tsk->state & TASK_INTERRUPTIBLE) ? 'S' : '?';
2951 
2952 	printf("%px %016lx %6d %6d %c %2d %s\n", tsk,
2953 		tsk->thread.ksp,
2954 		tsk->pid, tsk->parent->pid,
2955 		state, task_thread_info(tsk)->cpu,
2956 		tsk->comm);
2957 }
2958 
2959 #ifdef CONFIG_PPC_BOOK3S_64
2960 void format_pte(void *ptep, unsigned long pte)
2961 {
2962 	printf("ptep @ 0x%016lx = 0x%016lx\n", (unsigned long)ptep, pte);
2963 	printf("Maps physical address = 0x%016lx\n", pte & PTE_RPN_MASK);
2964 
2965 	printf("Flags = %s%s%s%s%s\n",
2966 	       (pte & _PAGE_ACCESSED) ? "Accessed " : "",
2967 	       (pte & _PAGE_DIRTY)    ? "Dirty " : "",
2968 	       (pte & _PAGE_READ)     ? "Read " : "",
2969 	       (pte & _PAGE_WRITE)    ? "Write " : "",
2970 	       (pte & _PAGE_EXEC)     ? "Exec " : "");
2971 }
2972 
2973 static void show_pte(unsigned long addr)
2974 {
2975 	unsigned long tskv = 0;
2976 	struct task_struct *tsk = NULL;
2977 	struct mm_struct *mm;
2978 	pgd_t *pgdp, *pgdir;
2979 	pud_t *pudp;
2980 	pmd_t *pmdp;
2981 	pte_t *ptep;
2982 
2983 	if (!scanhex(&tskv))
2984 		mm = &init_mm;
2985 	else
2986 		tsk = (struct task_struct *)tskv;
2987 
2988 	if (tsk == NULL)
2989 		mm = &init_mm;
2990 	else
2991 		mm = tsk->active_mm;
2992 
2993 	if (setjmp(bus_error_jmp) != 0) {
2994 		catch_memory_errors = 0;
2995 		printf("*** Error dumping pte for task %px\n", tsk);
2996 		return;
2997 	}
2998 
2999 	catch_memory_errors = 1;
3000 	sync();
3001 
3002 	if (mm == &init_mm) {
3003 		pgdp = pgd_offset_k(addr);
3004 		pgdir = pgd_offset_k(0);
3005 	} else {
3006 		pgdp = pgd_offset(mm, addr);
3007 		pgdir = pgd_offset(mm, 0);
3008 	}
3009 
3010 	if (pgd_none(*pgdp)) {
3011 		printf("no linux page table for address\n");
3012 		return;
3013 	}
3014 
3015 	printf("pgd  @ 0x%016lx\n", pgdir);
3016 
3017 	if (pgd_huge(*pgdp)) {
3018 		format_pte(pgdp, pgd_val(*pgdp));
3019 		return;
3020 	}
3021 	printf("pgdp @ 0x%016lx = 0x%016lx\n", pgdp, pgd_val(*pgdp));
3022 
3023 	pudp = pud_offset(pgdp, addr);
3024 
3025 	if (pud_none(*pudp)) {
3026 		printf("No valid PUD\n");
3027 		return;
3028 	}
3029 
3030 	if (pud_huge(*pudp)) {
3031 		format_pte(pudp, pud_val(*pudp));
3032 		return;
3033 	}
3034 
3035 	printf("pudp @ 0x%016lx = 0x%016lx\n", pudp, pud_val(*pudp));
3036 
3037 	pmdp = pmd_offset(pudp, addr);
3038 
3039 	if (pmd_none(*pmdp)) {
3040 		printf("No valid PMD\n");
3041 		return;
3042 	}
3043 
3044 	if (pmd_huge(*pmdp)) {
3045 		format_pte(pmdp, pmd_val(*pmdp));
3046 		return;
3047 	}
3048 	printf("pmdp @ 0x%016lx = 0x%016lx\n", pmdp, pmd_val(*pmdp));
3049 
3050 	ptep = pte_offset_map(pmdp, addr);
3051 	if (pte_none(*ptep)) {
3052 		printf("no valid PTE\n");
3053 		return;
3054 	}
3055 
3056 	format_pte(ptep, pte_val(*ptep));
3057 
3058 	sync();
3059 	__delay(200);
3060 	catch_memory_errors = 0;
3061 }
3062 #else
3063 static void show_pte(unsigned long addr)
3064 {
3065 	printf("show_pte not yet implemented\n");
3066 }
3067 #endif /* CONFIG_PPC_BOOK3S_64 */
3068 
3069 static void show_tasks(void)
3070 {
3071 	unsigned long tskv;
3072 	struct task_struct *tsk = NULL;
3073 
3074 	printf("     task_struct     ->thread.ksp    PID   PPID S  P CMD\n");
3075 
3076 	if (scanhex(&tskv))
3077 		tsk = (struct task_struct *)tskv;
3078 
3079 	if (setjmp(bus_error_jmp) != 0) {
3080 		catch_memory_errors = 0;
3081 		printf("*** Error dumping task %px\n", tsk);
3082 		return;
3083 	}
3084 
3085 	catch_memory_errors = 1;
3086 	sync();
3087 
3088 	if (tsk)
3089 		show_task(tsk);
3090 	else
3091 		for_each_process(tsk)
3092 			show_task(tsk);
3093 
3094 	sync();
3095 	__delay(200);
3096 	catch_memory_errors = 0;
3097 }
3098 
3099 static void proccall(void)
3100 {
3101 	unsigned long args[8];
3102 	unsigned long ret;
3103 	int i;
3104 	typedef unsigned long (*callfunc_t)(unsigned long, unsigned long,
3105 			unsigned long, unsigned long, unsigned long,
3106 			unsigned long, unsigned long, unsigned long);
3107 	callfunc_t func;
3108 
3109 	if (!scanhex(&adrs))
3110 		return;
3111 	if (termch != '\n')
3112 		termch = 0;
3113 	for (i = 0; i < 8; ++i)
3114 		args[i] = 0;
3115 	for (i = 0; i < 8; ++i) {
3116 		if (!scanhex(&args[i]) || termch == '\n')
3117 			break;
3118 		termch = 0;
3119 	}
3120 	func = (callfunc_t) adrs;
3121 	ret = 0;
3122 	if (setjmp(bus_error_jmp) == 0) {
3123 		catch_memory_errors = 1;
3124 		sync();
3125 		ret = func(args[0], args[1], args[2], args[3],
3126 			   args[4], args[5], args[6], args[7]);
3127 		sync();
3128 		printf("return value is 0x%lx\n", ret);
3129 	} else {
3130 		printf("*** %x exception occurred\n", fault_except);
3131 	}
3132 	catch_memory_errors = 0;
3133 }
3134 
3135 /* Input scanning routines */
3136 int
3137 skipbl(void)
3138 {
3139 	int c;
3140 
3141 	if( termch != 0 ){
3142 		c = termch;
3143 		termch = 0;
3144 	} else
3145 		c = inchar();
3146 	while( c == ' ' || c == '\t' )
3147 		c = inchar();
3148 	return c;
3149 }
3150 
3151 #define N_PTREGS	44
3152 static char *regnames[N_PTREGS] = {
3153 	"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3154 	"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
3155 	"r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
3156 	"r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
3157 	"pc", "msr", "or3", "ctr", "lr", "xer", "ccr",
3158 #ifdef CONFIG_PPC64
3159 	"softe",
3160 #else
3161 	"mq",
3162 #endif
3163 	"trap", "dar", "dsisr", "res"
3164 };
3165 
3166 int
3167 scanhex(unsigned long *vp)
3168 {
3169 	int c, d;
3170 	unsigned long v;
3171 
3172 	c = skipbl();
3173 	if (c == '%') {
3174 		/* parse register name */
3175 		char regname[8];
3176 		int i;
3177 
3178 		for (i = 0; i < sizeof(regname) - 1; ++i) {
3179 			c = inchar();
3180 			if (!isalnum(c)) {
3181 				termch = c;
3182 				break;
3183 			}
3184 			regname[i] = c;
3185 		}
3186 		regname[i] = 0;
3187 		for (i = 0; i < N_PTREGS; ++i) {
3188 			if (strcmp(regnames[i], regname) == 0) {
3189 				if (xmon_regs == NULL) {
3190 					printf("regs not available\n");
3191 					return 0;
3192 				}
3193 				*vp = ((unsigned long *)xmon_regs)[i];
3194 				return 1;
3195 			}
3196 		}
3197 		printf("invalid register name '%%%s'\n", regname);
3198 		return 0;
3199 	}
3200 
3201 	/* skip leading "0x" if any */
3202 
3203 	if (c == '0') {
3204 		c = inchar();
3205 		if (c == 'x') {
3206 			c = inchar();
3207 		} else {
3208 			d = hexdigit(c);
3209 			if (d == EOF) {
3210 				termch = c;
3211 				*vp = 0;
3212 				return 1;
3213 			}
3214 		}
3215 	} else if (c == '$') {
3216 		int i;
3217 		for (i=0; i<63; i++) {
3218 			c = inchar();
3219 			if (isspace(c) || c == '\0') {
3220 				termch = c;
3221 				break;
3222 			}
3223 			tmpstr[i] = c;
3224 		}
3225 		tmpstr[i++] = 0;
3226 		*vp = 0;
3227 		if (setjmp(bus_error_jmp) == 0) {
3228 			catch_memory_errors = 1;
3229 			sync();
3230 			*vp = kallsyms_lookup_name(tmpstr);
3231 			sync();
3232 		}
3233 		catch_memory_errors = 0;
3234 		if (!(*vp)) {
3235 			printf("unknown symbol '%s'\n", tmpstr);
3236 			return 0;
3237 		}
3238 		return 1;
3239 	}
3240 
3241 	d = hexdigit(c);
3242 	if (d == EOF) {
3243 		termch = c;
3244 		return 0;
3245 	}
3246 	v = 0;
3247 	do {
3248 		v = (v << 4) + d;
3249 		c = inchar();
3250 		d = hexdigit(c);
3251 	} while (d != EOF);
3252 	termch = c;
3253 	*vp = v;
3254 	return 1;
3255 }
3256 
3257 static void
3258 scannl(void)
3259 {
3260 	int c;
3261 
3262 	c = termch;
3263 	termch = 0;
3264 	while( c != '\n' )
3265 		c = inchar();
3266 }
3267 
3268 static int hexdigit(int c)
3269 {
3270 	if( '0' <= c && c <= '9' )
3271 		return c - '0';
3272 	if( 'A' <= c && c <= 'F' )
3273 		return c - ('A' - 10);
3274 	if( 'a' <= c && c <= 'f' )
3275 		return c - ('a' - 10);
3276 	return EOF;
3277 }
3278 
3279 void
3280 getstring(char *s, int size)
3281 {
3282 	int c;
3283 
3284 	c = skipbl();
3285 	do {
3286 		if( size > 1 ){
3287 			*s++ = c;
3288 			--size;
3289 		}
3290 		c = inchar();
3291 	} while( c != ' ' && c != '\t' && c != '\n' );
3292 	termch = c;
3293 	*s = 0;
3294 }
3295 
3296 static char line[256];
3297 static char *lineptr;
3298 
3299 static void
3300 flush_input(void)
3301 {
3302 	lineptr = NULL;
3303 }
3304 
3305 static int
3306 inchar(void)
3307 {
3308 	if (lineptr == NULL || *lineptr == 0) {
3309 		if (xmon_gets(line, sizeof(line)) == NULL) {
3310 			lineptr = NULL;
3311 			return EOF;
3312 		}
3313 		lineptr = line;
3314 	}
3315 	return *lineptr++;
3316 }
3317 
3318 static void
3319 take_input(char *str)
3320 {
3321 	lineptr = str;
3322 }
3323 
3324 
3325 static void
3326 symbol_lookup(void)
3327 {
3328 	int type = inchar();
3329 	unsigned long addr;
3330 	static char tmp[64];
3331 
3332 	switch (type) {
3333 	case 'a':
3334 		if (scanhex(&addr))
3335 			xmon_print_symbol(addr, ": ", "\n");
3336 		termch = 0;
3337 		break;
3338 	case 's':
3339 		getstring(tmp, 64);
3340 		if (setjmp(bus_error_jmp) == 0) {
3341 			catch_memory_errors = 1;
3342 			sync();
3343 			addr = kallsyms_lookup_name(tmp);
3344 			if (addr)
3345 				printf("%s: %lx\n", tmp, addr);
3346 			else
3347 				printf("Symbol '%s' not found.\n", tmp);
3348 			sync();
3349 		}
3350 		catch_memory_errors = 0;
3351 		termch = 0;
3352 		break;
3353 	}
3354 }
3355 
3356 
3357 /* Print an address in numeric and symbolic form (if possible) */
3358 static void xmon_print_symbol(unsigned long address, const char *mid,
3359 			      const char *after)
3360 {
3361 	char *modname;
3362 	const char *name = NULL;
3363 	unsigned long offset, size;
3364 
3365 	printf(REG, address);
3366 	if (setjmp(bus_error_jmp) == 0) {
3367 		catch_memory_errors = 1;
3368 		sync();
3369 		name = kallsyms_lookup(address, &size, &offset, &modname,
3370 				       tmpstr);
3371 		sync();
3372 		/* wait a little while to see if we get a machine check */
3373 		__delay(200);
3374 	}
3375 
3376 	catch_memory_errors = 0;
3377 
3378 	if (name) {
3379 		printf("%s%s+%#lx/%#lx", mid, name, offset, size);
3380 		if (modname)
3381 			printf(" [%s]", modname);
3382 	}
3383 	printf("%s", after);
3384 }
3385 
3386 #ifdef CONFIG_PPC_BOOK3S_64
3387 void dump_segments(void)
3388 {
3389 	int i;
3390 	unsigned long esid,vsid;
3391 	unsigned long llp;
3392 
3393 	printf("SLB contents of cpu 0x%x\n", smp_processor_id());
3394 
3395 	for (i = 0; i < mmu_slb_size; i++) {
3396 		asm volatile("slbmfee  %0,%1" : "=r" (esid) : "r" (i));
3397 		asm volatile("slbmfev  %0,%1" : "=r" (vsid) : "r" (i));
3398 
3399 		if (!esid && !vsid)
3400 			continue;
3401 
3402 		printf("%02d %016lx %016lx", i, esid, vsid);
3403 
3404 		if (!(esid & SLB_ESID_V)) {
3405 			printf("\n");
3406 			continue;
3407 		}
3408 
3409 		llp = vsid & SLB_VSID_LLP;
3410 		if (vsid & SLB_VSID_B_1T) {
3411 			printf("  1T  ESID=%9lx  VSID=%13lx LLP:%3lx \n",
3412 				GET_ESID_1T(esid),
3413 				(vsid & ~SLB_VSID_B) >> SLB_VSID_SHIFT_1T,
3414 				llp);
3415 		} else {
3416 			printf(" 256M ESID=%9lx  VSID=%13lx LLP:%3lx \n",
3417 				GET_ESID(esid),
3418 				(vsid & ~SLB_VSID_B) >> SLB_VSID_SHIFT,
3419 				llp);
3420 		}
3421 	}
3422 }
3423 #endif
3424 
3425 #ifdef CONFIG_PPC_STD_MMU_32
3426 void dump_segments(void)
3427 {
3428 	int i;
3429 
3430 	printf("sr0-15 =");
3431 	for (i = 0; i < 16; ++i)
3432 		printf(" %x", mfsrin(i));
3433 	printf("\n");
3434 }
3435 #endif
3436 
3437 #ifdef CONFIG_44x
3438 static void dump_tlb_44x(void)
3439 {
3440 	int i;
3441 
3442 	for (i = 0; i < PPC44x_TLB_SIZE; i++) {
3443 		unsigned long w0,w1,w2;
3444 		asm volatile("tlbre  %0,%1,0" : "=r" (w0) : "r" (i));
3445 		asm volatile("tlbre  %0,%1,1" : "=r" (w1) : "r" (i));
3446 		asm volatile("tlbre  %0,%1,2" : "=r" (w2) : "r" (i));
3447 		printf("[%02x] %08x %08x %08x ", i, w0, w1, w2);
3448 		if (w0 & PPC44x_TLB_VALID) {
3449 			printf("V %08x -> %01x%08x %c%c%c%c%c",
3450 			       w0 & PPC44x_TLB_EPN_MASK,
3451 			       w1 & PPC44x_TLB_ERPN_MASK,
3452 			       w1 & PPC44x_TLB_RPN_MASK,
3453 			       (w2 & PPC44x_TLB_W) ? 'W' : 'w',
3454 			       (w2 & PPC44x_TLB_I) ? 'I' : 'i',
3455 			       (w2 & PPC44x_TLB_M) ? 'M' : 'm',
3456 			       (w2 & PPC44x_TLB_G) ? 'G' : 'g',
3457 			       (w2 & PPC44x_TLB_E) ? 'E' : 'e');
3458 		}
3459 		printf("\n");
3460 	}
3461 }
3462 #endif /* CONFIG_44x */
3463 
3464 #ifdef CONFIG_PPC_BOOK3E
3465 static void dump_tlb_book3e(void)
3466 {
3467 	u32 mmucfg, pidmask, lpidmask;
3468 	u64 ramask;
3469 	int i, tlb, ntlbs, pidsz, lpidsz, rasz, lrat = 0;
3470 	int mmu_version;
3471 	static const char *pgsz_names[] = {
3472 		"  1K",
3473 		"  2K",
3474 		"  4K",
3475 		"  8K",
3476 		" 16K",
3477 		" 32K",
3478 		" 64K",
3479 		"128K",
3480 		"256K",
3481 		"512K",
3482 		"  1M",
3483 		"  2M",
3484 		"  4M",
3485 		"  8M",
3486 		" 16M",
3487 		" 32M",
3488 		" 64M",
3489 		"128M",
3490 		"256M",
3491 		"512M",
3492 		"  1G",
3493 		"  2G",
3494 		"  4G",
3495 		"  8G",
3496 		" 16G",
3497 		" 32G",
3498 		" 64G",
3499 		"128G",
3500 		"256G",
3501 		"512G",
3502 		"  1T",
3503 		"  2T",
3504 	};
3505 
3506 	/* Gather some infos about the MMU */
3507 	mmucfg = mfspr(SPRN_MMUCFG);
3508 	mmu_version = (mmucfg & 3) + 1;
3509 	ntlbs = ((mmucfg >> 2) & 3) + 1;
3510 	pidsz = ((mmucfg >> 6) & 0x1f) + 1;
3511 	lpidsz = (mmucfg >> 24) & 0xf;
3512 	rasz = (mmucfg >> 16) & 0x7f;
3513 	if ((mmu_version > 1) && (mmucfg & 0x10000))
3514 		lrat = 1;
3515 	printf("Book3E MMU MAV=%d.0,%d TLBs,%d-bit PID,%d-bit LPID,%d-bit RA\n",
3516 	       mmu_version, ntlbs, pidsz, lpidsz, rasz);
3517 	pidmask = (1ul << pidsz) - 1;
3518 	lpidmask = (1ul << lpidsz) - 1;
3519 	ramask = (1ull << rasz) - 1;
3520 
3521 	for (tlb = 0; tlb < ntlbs; tlb++) {
3522 		u32 tlbcfg;
3523 		int nent, assoc, new_cc = 1;
3524 		printf("TLB %d:\n------\n", tlb);
3525 		switch(tlb) {
3526 		case 0:
3527 			tlbcfg = mfspr(SPRN_TLB0CFG);
3528 			break;
3529 		case 1:
3530 			tlbcfg = mfspr(SPRN_TLB1CFG);
3531 			break;
3532 		case 2:
3533 			tlbcfg = mfspr(SPRN_TLB2CFG);
3534 			break;
3535 		case 3:
3536 			tlbcfg = mfspr(SPRN_TLB3CFG);
3537 			break;
3538 		default:
3539 			printf("Unsupported TLB number !\n");
3540 			continue;
3541 		}
3542 		nent = tlbcfg & 0xfff;
3543 		assoc = (tlbcfg >> 24) & 0xff;
3544 		for (i = 0; i < nent; i++) {
3545 			u32 mas0 = MAS0_TLBSEL(tlb);
3546 			u32 mas1 = MAS1_TSIZE(BOOK3E_PAGESZ_4K);
3547 			u64 mas2 = 0;
3548 			u64 mas7_mas3;
3549 			int esel = i, cc = i;
3550 
3551 			if (assoc != 0) {
3552 				cc = i / assoc;
3553 				esel = i % assoc;
3554 				mas2 = cc * 0x1000;
3555 			}
3556 
3557 			mas0 |= MAS0_ESEL(esel);
3558 			mtspr(SPRN_MAS0, mas0);
3559 			mtspr(SPRN_MAS1, mas1);
3560 			mtspr(SPRN_MAS2, mas2);
3561 			asm volatile("tlbre  0,0,0" : : : "memory");
3562 			mas1 = mfspr(SPRN_MAS1);
3563 			mas2 = mfspr(SPRN_MAS2);
3564 			mas7_mas3 = mfspr(SPRN_MAS7_MAS3);
3565 			if (assoc && (i % assoc) == 0)
3566 				new_cc = 1;
3567 			if (!(mas1 & MAS1_VALID))
3568 				continue;
3569 			if (assoc == 0)
3570 				printf("%04x- ", i);
3571 			else if (new_cc)
3572 				printf("%04x-%c", cc, 'A' + esel);
3573 			else
3574 				printf("    |%c", 'A' + esel);
3575 			new_cc = 0;
3576 			printf(" %016llx %04x %s %c%c AS%c",
3577 			       mas2 & ~0x3ffull,
3578 			       (mas1 >> 16) & 0x3fff,
3579 			       pgsz_names[(mas1 >> 7) & 0x1f],
3580 			       mas1 & MAS1_IND ? 'I' : ' ',
3581 			       mas1 & MAS1_IPROT ? 'P' : ' ',
3582 			       mas1 & MAS1_TS ? '1' : '0');
3583 			printf(" %c%c%c%c%c%c%c",
3584 			       mas2 & MAS2_X0 ? 'a' : ' ',
3585 			       mas2 & MAS2_X1 ? 'v' : ' ',
3586 			       mas2 & MAS2_W  ? 'w' : ' ',
3587 			       mas2 & MAS2_I  ? 'i' : ' ',
3588 			       mas2 & MAS2_M  ? 'm' : ' ',
3589 			       mas2 & MAS2_G  ? 'g' : ' ',
3590 			       mas2 & MAS2_E  ? 'e' : ' ');
3591 			printf(" %016llx", mas7_mas3 & ramask & ~0x7ffull);
3592 			if (mas1 & MAS1_IND)
3593 				printf(" %s\n",
3594 				       pgsz_names[(mas7_mas3 >> 1) & 0x1f]);
3595 			else
3596 				printf(" U%c%c%c S%c%c%c\n",
3597 				       mas7_mas3 & MAS3_UX ? 'x' : ' ',
3598 				       mas7_mas3 & MAS3_UW ? 'w' : ' ',
3599 				       mas7_mas3 & MAS3_UR ? 'r' : ' ',
3600 				       mas7_mas3 & MAS3_SX ? 'x' : ' ',
3601 				       mas7_mas3 & MAS3_SW ? 'w' : ' ',
3602 				       mas7_mas3 & MAS3_SR ? 'r' : ' ');
3603 		}
3604 	}
3605 }
3606 #endif /* CONFIG_PPC_BOOK3E */
3607 
3608 static void xmon_init(int enable)
3609 {
3610 	if (enable) {
3611 		__debugger = xmon;
3612 		__debugger_ipi = xmon_ipi;
3613 		__debugger_bpt = xmon_bpt;
3614 		__debugger_sstep = xmon_sstep;
3615 		__debugger_iabr_match = xmon_iabr_match;
3616 		__debugger_break_match = xmon_break_match;
3617 		__debugger_fault_handler = xmon_fault_handler;
3618 	} else {
3619 		__debugger = NULL;
3620 		__debugger_ipi = NULL;
3621 		__debugger_bpt = NULL;
3622 		__debugger_sstep = NULL;
3623 		__debugger_iabr_match = NULL;
3624 		__debugger_break_match = NULL;
3625 		__debugger_fault_handler = NULL;
3626 	}
3627 }
3628 
3629 #ifdef CONFIG_MAGIC_SYSRQ
3630 static void sysrq_handle_xmon(int key)
3631 {
3632 	/* ensure xmon is enabled */
3633 	xmon_init(1);
3634 	debugger(get_irq_regs());
3635 	if (!xmon_on)
3636 		xmon_init(0);
3637 }
3638 
3639 static struct sysrq_key_op sysrq_xmon_op = {
3640 	.handler =	sysrq_handle_xmon,
3641 	.help_msg =	"xmon(x)",
3642 	.action_msg =	"Entering xmon",
3643 };
3644 
3645 static int __init setup_xmon_sysrq(void)
3646 {
3647 	register_sysrq_key('x', &sysrq_xmon_op);
3648 	return 0;
3649 }
3650 device_initcall(setup_xmon_sysrq);
3651 #endif /* CONFIG_MAGIC_SYSRQ */
3652 
3653 #ifdef CONFIG_DEBUG_FS
3654 static int xmon_dbgfs_set(void *data, u64 val)
3655 {
3656 	xmon_on = !!val;
3657 	xmon_init(xmon_on);
3658 
3659 	return 0;
3660 }
3661 
3662 static int xmon_dbgfs_get(void *data, u64 *val)
3663 {
3664 	*val = xmon_on;
3665 	return 0;
3666 }
3667 
3668 DEFINE_SIMPLE_ATTRIBUTE(xmon_dbgfs_ops, xmon_dbgfs_get,
3669 			xmon_dbgfs_set, "%llu\n");
3670 
3671 static int __init setup_xmon_dbgfs(void)
3672 {
3673 	debugfs_create_file("xmon", 0600, powerpc_debugfs_root, NULL,
3674 				&xmon_dbgfs_ops);
3675 	return 0;
3676 }
3677 device_initcall(setup_xmon_dbgfs);
3678 #endif /* CONFIG_DEBUG_FS */
3679 
3680 static int xmon_early __initdata;
3681 
3682 static int __init early_parse_xmon(char *p)
3683 {
3684 	if (!p || strncmp(p, "early", 5) == 0) {
3685 		/* just "xmon" is equivalent to "xmon=early" */
3686 		xmon_init(1);
3687 		xmon_early = 1;
3688 		xmon_on = 1;
3689 	} else if (strncmp(p, "on", 2) == 0) {
3690 		xmon_init(1);
3691 		xmon_on = 1;
3692 	} else if (strncmp(p, "off", 3) == 0)
3693 		xmon_on = 0;
3694 	else
3695 		return 1;
3696 
3697 	return 0;
3698 }
3699 early_param("xmon", early_parse_xmon);
3700 
3701 void __init xmon_setup(void)
3702 {
3703 	if (xmon_on)
3704 		xmon_init(1);
3705 	if (xmon_early)
3706 		debugger(NULL);
3707 }
3708 
3709 #ifdef CONFIG_SPU_BASE
3710 
3711 struct spu_info {
3712 	struct spu *spu;
3713 	u64 saved_mfc_sr1_RW;
3714 	u32 saved_spu_runcntl_RW;
3715 	unsigned long dump_addr;
3716 	u8 stopped_ok;
3717 };
3718 
3719 #define XMON_NUM_SPUS	16	/* Enough for current hardware */
3720 
3721 static struct spu_info spu_info[XMON_NUM_SPUS];
3722 
3723 void xmon_register_spus(struct list_head *list)
3724 {
3725 	struct spu *spu;
3726 
3727 	list_for_each_entry(spu, list, full_list) {
3728 		if (spu->number >= XMON_NUM_SPUS) {
3729 			WARN_ON(1);
3730 			continue;
3731 		}
3732 
3733 		spu_info[spu->number].spu = spu;
3734 		spu_info[spu->number].stopped_ok = 0;
3735 		spu_info[spu->number].dump_addr = (unsigned long)
3736 				spu_info[spu->number].spu->local_store;
3737 	}
3738 }
3739 
3740 static void stop_spus(void)
3741 {
3742 	struct spu *spu;
3743 	int i;
3744 	u64 tmp;
3745 
3746 	for (i = 0; i < XMON_NUM_SPUS; i++) {
3747 		if (!spu_info[i].spu)
3748 			continue;
3749 
3750 		if (setjmp(bus_error_jmp) == 0) {
3751 			catch_memory_errors = 1;
3752 			sync();
3753 
3754 			spu = spu_info[i].spu;
3755 
3756 			spu_info[i].saved_spu_runcntl_RW =
3757 				in_be32(&spu->problem->spu_runcntl_RW);
3758 
3759 			tmp = spu_mfc_sr1_get(spu);
3760 			spu_info[i].saved_mfc_sr1_RW = tmp;
3761 
3762 			tmp &= ~MFC_STATE1_MASTER_RUN_CONTROL_MASK;
3763 			spu_mfc_sr1_set(spu, tmp);
3764 
3765 			sync();
3766 			__delay(200);
3767 
3768 			spu_info[i].stopped_ok = 1;
3769 
3770 			printf("Stopped spu %.2d (was %s)\n", i,
3771 					spu_info[i].saved_spu_runcntl_RW ?
3772 					"running" : "stopped");
3773 		} else {
3774 			catch_memory_errors = 0;
3775 			printf("*** Error stopping spu %.2d\n", i);
3776 		}
3777 		catch_memory_errors = 0;
3778 	}
3779 }
3780 
3781 static void restart_spus(void)
3782 {
3783 	struct spu *spu;
3784 	int i;
3785 
3786 	for (i = 0; i < XMON_NUM_SPUS; i++) {
3787 		if (!spu_info[i].spu)
3788 			continue;
3789 
3790 		if (!spu_info[i].stopped_ok) {
3791 			printf("*** Error, spu %d was not successfully stopped"
3792 					", not restarting\n", i);
3793 			continue;
3794 		}
3795 
3796 		if (setjmp(bus_error_jmp) == 0) {
3797 			catch_memory_errors = 1;
3798 			sync();
3799 
3800 			spu = spu_info[i].spu;
3801 			spu_mfc_sr1_set(spu, spu_info[i].saved_mfc_sr1_RW);
3802 			out_be32(&spu->problem->spu_runcntl_RW,
3803 					spu_info[i].saved_spu_runcntl_RW);
3804 
3805 			sync();
3806 			__delay(200);
3807 
3808 			printf("Restarted spu %.2d\n", i);
3809 		} else {
3810 			catch_memory_errors = 0;
3811 			printf("*** Error restarting spu %.2d\n", i);
3812 		}
3813 		catch_memory_errors = 0;
3814 	}
3815 }
3816 
3817 #define DUMP_WIDTH	23
3818 #define DUMP_VALUE(format, field, value)				\
3819 do {									\
3820 	if (setjmp(bus_error_jmp) == 0) {				\
3821 		catch_memory_errors = 1;				\
3822 		sync();							\
3823 		printf("  %-*s = "format"\n", DUMP_WIDTH,		\
3824 				#field, value);				\
3825 		sync();							\
3826 		__delay(200);						\
3827 	} else {							\
3828 		catch_memory_errors = 0;				\
3829 		printf("  %-*s = *** Error reading field.\n",		\
3830 					DUMP_WIDTH, #field);		\
3831 	}								\
3832 	catch_memory_errors = 0;					\
3833 } while (0)
3834 
3835 #define DUMP_FIELD(obj, format, field)	\
3836 	DUMP_VALUE(format, field, obj->field)
3837 
3838 static void dump_spu_fields(struct spu *spu)
3839 {
3840 	printf("Dumping spu fields at address %p:\n", spu);
3841 
3842 	DUMP_FIELD(spu, "0x%x", number);
3843 	DUMP_FIELD(spu, "%s", name);
3844 	DUMP_FIELD(spu, "0x%lx", local_store_phys);
3845 	DUMP_FIELD(spu, "0x%p", local_store);
3846 	DUMP_FIELD(spu, "0x%lx", ls_size);
3847 	DUMP_FIELD(spu, "0x%x", node);
3848 	DUMP_FIELD(spu, "0x%lx", flags);
3849 	DUMP_FIELD(spu, "%d", class_0_pending);
3850 	DUMP_FIELD(spu, "0x%lx", class_0_dar);
3851 	DUMP_FIELD(spu, "0x%lx", class_1_dar);
3852 	DUMP_FIELD(spu, "0x%lx", class_1_dsisr);
3853 	DUMP_FIELD(spu, "0x%lx", irqs[0]);
3854 	DUMP_FIELD(spu, "0x%lx", irqs[1]);
3855 	DUMP_FIELD(spu, "0x%lx", irqs[2]);
3856 	DUMP_FIELD(spu, "0x%x", slb_replace);
3857 	DUMP_FIELD(spu, "%d", pid);
3858 	DUMP_FIELD(spu, "0x%p", mm);
3859 	DUMP_FIELD(spu, "0x%p", ctx);
3860 	DUMP_FIELD(spu, "0x%p", rq);
3861 	DUMP_FIELD(spu, "0x%p", timestamp);
3862 	DUMP_FIELD(spu, "0x%lx", problem_phys);
3863 	DUMP_FIELD(spu, "0x%p", problem);
3864 	DUMP_VALUE("0x%x", problem->spu_runcntl_RW,
3865 			in_be32(&spu->problem->spu_runcntl_RW));
3866 	DUMP_VALUE("0x%x", problem->spu_status_R,
3867 			in_be32(&spu->problem->spu_status_R));
3868 	DUMP_VALUE("0x%x", problem->spu_npc_RW,
3869 			in_be32(&spu->problem->spu_npc_RW));
3870 	DUMP_FIELD(spu, "0x%p", priv2);
3871 	DUMP_FIELD(spu, "0x%p", pdata);
3872 }
3873 
3874 int
3875 spu_inst_dump(unsigned long adr, long count, int praddr)
3876 {
3877 	return generic_inst_dump(adr, count, praddr, print_insn_spu);
3878 }
3879 
3880 static void dump_spu_ls(unsigned long num, int subcmd)
3881 {
3882 	unsigned long offset, addr, ls_addr;
3883 
3884 	if (setjmp(bus_error_jmp) == 0) {
3885 		catch_memory_errors = 1;
3886 		sync();
3887 		ls_addr = (unsigned long)spu_info[num].spu->local_store;
3888 		sync();
3889 		__delay(200);
3890 	} else {
3891 		catch_memory_errors = 0;
3892 		printf("*** Error: accessing spu info for spu %d\n", num);
3893 		return;
3894 	}
3895 	catch_memory_errors = 0;
3896 
3897 	if (scanhex(&offset))
3898 		addr = ls_addr + offset;
3899 	else
3900 		addr = spu_info[num].dump_addr;
3901 
3902 	if (addr >= ls_addr + LS_SIZE) {
3903 		printf("*** Error: address outside of local store\n");
3904 		return;
3905 	}
3906 
3907 	switch (subcmd) {
3908 	case 'i':
3909 		addr += spu_inst_dump(addr, 16, 1);
3910 		last_cmd = "sdi\n";
3911 		break;
3912 	default:
3913 		prdump(addr, 64);
3914 		addr += 64;
3915 		last_cmd = "sd\n";
3916 		break;
3917 	}
3918 
3919 	spu_info[num].dump_addr = addr;
3920 }
3921 
3922 static int do_spu_cmd(void)
3923 {
3924 	static unsigned long num = 0;
3925 	int cmd, subcmd = 0;
3926 
3927 	cmd = inchar();
3928 	switch (cmd) {
3929 	case 's':
3930 		stop_spus();
3931 		break;
3932 	case 'r':
3933 		restart_spus();
3934 		break;
3935 	case 'd':
3936 		subcmd = inchar();
3937 		if (isxdigit(subcmd) || subcmd == '\n')
3938 			termch = subcmd;
3939 	case 'f':
3940 		scanhex(&num);
3941 		if (num >= XMON_NUM_SPUS || !spu_info[num].spu) {
3942 			printf("*** Error: invalid spu number\n");
3943 			return 0;
3944 		}
3945 
3946 		switch (cmd) {
3947 		case 'f':
3948 			dump_spu_fields(spu_info[num].spu);
3949 			break;
3950 		default:
3951 			dump_spu_ls(num, subcmd);
3952 			break;
3953 		}
3954 
3955 		break;
3956 	default:
3957 		return -1;
3958 	}
3959 
3960 	return 0;
3961 }
3962 #else /* ! CONFIG_SPU_BASE */
3963 static int do_spu_cmd(void)
3964 {
3965 	return -1;
3966 }
3967 #endif
3968