1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * ICS backend for OPAL managed interrupts. 4 * 5 * Copyright 2011 IBM Corp. 6 */ 7 8 //#define DEBUG 9 10 #include <linux/types.h> 11 #include <linux/kernel.h> 12 #include <linux/irq.h> 13 #include <linux/smp.h> 14 #include <linux/interrupt.h> 15 #include <linux/init.h> 16 #include <linux/cpu.h> 17 #include <linux/of.h> 18 #include <linux/spinlock.h> 19 #include <linux/msi.h> 20 #include <linux/list.h> 21 22 #include <asm/smp.h> 23 #include <asm/machdep.h> 24 #include <asm/irq.h> 25 #include <asm/errno.h> 26 #include <asm/xics.h> 27 #include <asm/opal.h> 28 #include <asm/firmware.h> 29 30 struct ics_native { 31 struct ics ics; 32 struct device_node *node; 33 void __iomem *base; 34 u32 ibase; 35 u32 icount; 36 }; 37 #define to_ics_native(_ics) container_of(_ics, struct ics_native, ics) 38 39 static void __iomem *ics_native_xive(struct ics_native *in, unsigned int vec) 40 { 41 return in->base + 0x800 + ((vec - in->ibase) << 2); 42 } 43 44 static void ics_native_unmask_irq(struct irq_data *d) 45 { 46 unsigned int vec = (unsigned int)irqd_to_hwirq(d); 47 struct ics *ics = irq_data_get_irq_chip_data(d); 48 struct ics_native *in = to_ics_native(ics); 49 unsigned int server; 50 51 pr_devel("ics-native: unmask virq %d [hw 0x%x]\n", d->irq, vec); 52 53 if (vec < in->ibase || vec >= (in->ibase + in->icount)) 54 return; 55 56 server = xics_get_irq_server(d->irq, irq_data_get_affinity_mask(d), 0); 57 out_be32(ics_native_xive(in, vec), (server << 8) | DEFAULT_PRIORITY); 58 } 59 60 static unsigned int ics_native_startup(struct irq_data *d) 61 { 62 #ifdef CONFIG_PCI_MSI 63 /* 64 * The generic MSI code returns with the interrupt disabled on the 65 * card, using the MSI mask bits. Firmware doesn't appear to unmask 66 * at that level, so we do it here by hand. 67 */ 68 if (irq_data_get_msi_desc(d)) 69 pci_msi_unmask_irq(d); 70 #endif 71 72 /* unmask it */ 73 ics_native_unmask_irq(d); 74 return 0; 75 } 76 77 static void ics_native_do_mask(struct ics_native *in, unsigned int vec) 78 { 79 out_be32(ics_native_xive(in, vec), 0xff); 80 } 81 82 static void ics_native_mask_irq(struct irq_data *d) 83 { 84 unsigned int vec = (unsigned int)irqd_to_hwirq(d); 85 struct ics *ics = irq_data_get_irq_chip_data(d); 86 struct ics_native *in = to_ics_native(ics); 87 88 pr_devel("ics-native: mask virq %d [hw 0x%x]\n", d->irq, vec); 89 90 if (vec < in->ibase || vec >= (in->ibase + in->icount)) 91 return; 92 ics_native_do_mask(in, vec); 93 } 94 95 static int ics_native_set_affinity(struct irq_data *d, 96 const struct cpumask *cpumask, 97 bool force) 98 { 99 unsigned int vec = (unsigned int)irqd_to_hwirq(d); 100 struct ics *ics = irq_data_get_irq_chip_data(d); 101 struct ics_native *in = to_ics_native(ics); 102 int server; 103 u32 xive; 104 105 if (vec < in->ibase || vec >= (in->ibase + in->icount)) 106 return -EINVAL; 107 108 server = xics_get_irq_server(d->irq, cpumask, 1); 109 if (server == -1) { 110 pr_warn("%s: No online cpus in the mask %*pb for irq %d\n", 111 __func__, cpumask_pr_args(cpumask), d->irq); 112 return -1; 113 } 114 115 xive = in_be32(ics_native_xive(in, vec)); 116 xive = (xive & 0xff) | (server << 8); 117 out_be32(ics_native_xive(in, vec), xive); 118 119 return IRQ_SET_MASK_OK; 120 } 121 122 static struct irq_chip ics_native_irq_chip = { 123 .name = "ICS", 124 .irq_startup = ics_native_startup, 125 .irq_mask = ics_native_mask_irq, 126 .irq_unmask = ics_native_unmask_irq, 127 .irq_eoi = NULL, /* Patched at init time */ 128 .irq_set_affinity = ics_native_set_affinity, 129 .irq_set_type = xics_set_irq_type, 130 .irq_retrigger = xics_retrigger, 131 }; 132 133 static int ics_native_check(struct ics *ics, unsigned int hw_irq) 134 { 135 struct ics_native *in = to_ics_native(ics); 136 137 pr_devel("%s: hw_irq=0x%x\n", __func__, hw_irq); 138 139 if (hw_irq < in->ibase || hw_irq >= (in->ibase + in->icount)) 140 return -EINVAL; 141 142 return 0; 143 } 144 145 static void ics_native_mask_unknown(struct ics *ics, unsigned long vec) 146 { 147 struct ics_native *in = to_ics_native(ics); 148 149 if (vec < in->ibase || vec >= (in->ibase + in->icount)) 150 return; 151 152 ics_native_do_mask(in, vec); 153 } 154 155 static long ics_native_get_server(struct ics *ics, unsigned long vec) 156 { 157 struct ics_native *in = to_ics_native(ics); 158 u32 xive; 159 160 if (vec < in->ibase || vec >= (in->ibase + in->icount)) 161 return -EINVAL; 162 163 xive = in_be32(ics_native_xive(in, vec)); 164 return (xive >> 8) & 0xfff; 165 } 166 167 static int ics_native_host_match(struct ics *ics, struct device_node *node) 168 { 169 struct ics_native *in = to_ics_native(ics); 170 171 return in->node == node; 172 } 173 174 static struct ics ics_native_template = { 175 .check = ics_native_check, 176 .mask_unknown = ics_native_mask_unknown, 177 .get_server = ics_native_get_server, 178 .host_match = ics_native_host_match, 179 .chip = &ics_native_irq_chip, 180 }; 181 182 static int __init ics_native_add_one(struct device_node *np) 183 { 184 struct ics_native *ics; 185 u32 ranges[2]; 186 int rc, count; 187 188 ics = kzalloc(sizeof(struct ics_native), GFP_KERNEL); 189 if (!ics) 190 return -ENOMEM; 191 ics->node = of_node_get(np); 192 memcpy(&ics->ics, &ics_native_template, sizeof(struct ics)); 193 194 ics->base = of_iomap(np, 0); 195 if (!ics->base) { 196 pr_err("Failed to map %pOFP\n", np); 197 rc = -ENOMEM; 198 goto fail; 199 } 200 201 count = of_property_count_u32_elems(np, "interrupt-ranges"); 202 if (count < 2 || count & 1) { 203 pr_err("Failed to read interrupt-ranges of %pOFP\n", np); 204 rc = -EINVAL; 205 goto fail; 206 } 207 if (count > 2) { 208 pr_warn("ICS %pOFP has %d ranges, only one supported\n", 209 np, count >> 1); 210 } 211 rc = of_property_read_u32_array(np, "interrupt-ranges", 212 ranges, 2); 213 if (rc) { 214 pr_err("Failed to read interrupt-ranges of %pOFP\n", np); 215 goto fail; 216 } 217 ics->ibase = ranges[0]; 218 ics->icount = ranges[1]; 219 220 pr_info("ICS native initialized for sources %d..%d\n", 221 ics->ibase, ics->ibase + ics->icount - 1); 222 223 /* Register ourselves */ 224 xics_register_ics(&ics->ics); 225 226 return 0; 227 fail: 228 of_node_put(ics->node); 229 kfree(ics); 230 return rc; 231 } 232 233 int __init ics_native_init(void) 234 { 235 struct device_node *ics; 236 bool found_one = false; 237 238 /* We need to patch our irq chip's EOI to point to the 239 * right ICP 240 */ 241 ics_native_irq_chip.irq_eoi = icp_ops->eoi; 242 243 /* Find native ICS in the device-tree */ 244 for_each_compatible_node(ics, NULL, "openpower,xics-sources") { 245 if (ics_native_add_one(ics) == 0) 246 found_one = true; 247 } 248 249 if (found_one) 250 pr_info("ICS native backend registered\n"); 251 252 return found_one ? 0 : -ENODEV; 253 } 254