1 /* 2 * Copyright 2006, Segher Boessenkool, IBM Corporation. 3 * Copyright 2006-2007, Michael Ellerman, IBM Corporation. 4 * 5 * This program is free software; you can redistribute it and/or 6 * modify it under the terms of the GNU General Public License 7 * as published by the Free Software Foundation; version 2 of the 8 * License. 9 * 10 */ 11 12 #include <linux/irq.h> 13 #include <linux/msi.h> 14 #include <asm/mpic.h> 15 #include <asm/prom.h> 16 #include <asm/hw_irq.h> 17 #include <asm/ppc-pci.h> 18 #include <asm/msi_bitmap.h> 19 20 #include "mpic.h" 21 22 /* A bit ugly, can we get this from the pci_dev somehow? */ 23 static struct mpic *msi_mpic; 24 25 static void mpic_u3msi_mask_irq(struct irq_data *data) 26 { 27 mask_msi_irq(data); 28 mpic_mask_irq(data); 29 } 30 31 static void mpic_u3msi_unmask_irq(struct irq_data *data) 32 { 33 mpic_unmask_irq(data); 34 unmask_msi_irq(data); 35 } 36 37 static struct irq_chip mpic_u3msi_chip = { 38 .irq_shutdown = mpic_u3msi_mask_irq, 39 .irq_mask = mpic_u3msi_mask_irq, 40 .irq_unmask = mpic_u3msi_unmask_irq, 41 .irq_eoi = mpic_end_irq, 42 .irq_set_type = mpic_set_irq_type, 43 .irq_set_affinity = mpic_set_affinity, 44 .name = "MPIC-U3MSI", 45 }; 46 47 static u64 read_ht_magic_addr(struct pci_dev *pdev, unsigned int pos) 48 { 49 u8 flags; 50 u32 tmp; 51 u64 addr; 52 53 pci_read_config_byte(pdev, pos + HT_MSI_FLAGS, &flags); 54 55 if (flags & HT_MSI_FLAGS_FIXED) 56 return HT_MSI_FIXED_ADDR; 57 58 pci_read_config_dword(pdev, pos + HT_MSI_ADDR_LO, &tmp); 59 addr = tmp & HT_MSI_ADDR_LO_MASK; 60 pci_read_config_dword(pdev, pos + HT_MSI_ADDR_HI, &tmp); 61 addr = addr | ((u64)tmp << 32); 62 63 return addr; 64 } 65 66 static u64 find_ht_magic_addr(struct pci_dev *pdev, unsigned int hwirq) 67 { 68 struct pci_bus *bus; 69 unsigned int pos; 70 71 for (bus = pdev->bus; bus && bus->self; bus = bus->parent) { 72 pos = pci_find_ht_capability(bus->self, HT_CAPTYPE_MSI_MAPPING); 73 if (pos) 74 return read_ht_magic_addr(bus->self, pos); 75 } 76 77 return 0; 78 } 79 80 static u64 find_u4_magic_addr(struct pci_dev *pdev, unsigned int hwirq) 81 { 82 struct pci_controller *hose = pci_bus_to_host(pdev->bus); 83 84 /* U4 PCIe MSIs need to write to the special register in 85 * the bridge that generates interrupts. There should be 86 * theorically a register at 0xf8005000 where you just write 87 * the MSI number and that triggers the right interrupt, but 88 * unfortunately, this is busted in HW, the bridge endian swaps 89 * the value and hits the wrong nibble in the register. 90 * 91 * So instead we use another register set which is used normally 92 * for converting HT interrupts to MPIC interrupts, which decodes 93 * the interrupt number as part of the low address bits 94 * 95 * This will not work if we ever use more than one legacy MSI in 96 * a block but we never do. For one MSI or multiple MSI-X where 97 * each interrupt address can be specified separately, it works 98 * just fine. 99 */ 100 if (of_device_is_compatible(hose->dn, "u4-pcie") || 101 of_device_is_compatible(hose->dn, "U4-pcie")) 102 return 0xf8004000 | (hwirq << 4); 103 104 return 0; 105 } 106 107 static void u3msi_teardown_msi_irqs(struct pci_dev *pdev) 108 { 109 struct msi_desc *entry; 110 111 list_for_each_entry(entry, &pdev->msi_list, list) { 112 if (entry->irq == NO_IRQ) 113 continue; 114 115 irq_set_msi_desc(entry->irq, NULL); 116 msi_bitmap_free_hwirqs(&msi_mpic->msi_bitmap, 117 virq_to_hw(entry->irq), 1); 118 irq_dispose_mapping(entry->irq); 119 } 120 121 return; 122 } 123 124 static int u3msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) 125 { 126 unsigned int virq; 127 struct msi_desc *entry; 128 struct msi_msg msg; 129 u64 addr; 130 int hwirq; 131 132 if (type == PCI_CAP_ID_MSIX) 133 pr_debug("u3msi: MSI-X untested, trying anyway.\n"); 134 135 /* If we can't find a magic address then MSI ain't gonna work */ 136 if (find_ht_magic_addr(pdev, 0) == 0 && 137 find_u4_magic_addr(pdev, 0) == 0) { 138 pr_debug("u3msi: no magic address found for %s\n", 139 pci_name(pdev)); 140 return -ENXIO; 141 } 142 143 list_for_each_entry(entry, &pdev->msi_list, list) { 144 hwirq = msi_bitmap_alloc_hwirqs(&msi_mpic->msi_bitmap, 1); 145 if (hwirq < 0) { 146 pr_debug("u3msi: failed allocating hwirq\n"); 147 return hwirq; 148 } 149 150 addr = find_ht_magic_addr(pdev, hwirq); 151 if (addr == 0) 152 addr = find_u4_magic_addr(pdev, hwirq); 153 msg.address_lo = addr & 0xFFFFFFFF; 154 msg.address_hi = addr >> 32; 155 156 virq = irq_create_mapping(msi_mpic->irqhost, hwirq); 157 if (virq == NO_IRQ) { 158 pr_debug("u3msi: failed mapping hwirq 0x%x\n", hwirq); 159 msi_bitmap_free_hwirqs(&msi_mpic->msi_bitmap, hwirq, 1); 160 return -ENOSPC; 161 } 162 163 irq_set_msi_desc(virq, entry); 164 irq_set_chip(virq, &mpic_u3msi_chip); 165 irq_set_irq_type(virq, IRQ_TYPE_EDGE_RISING); 166 167 pr_debug("u3msi: allocated virq 0x%x (hw 0x%x) addr 0x%lx\n", 168 virq, hwirq, (unsigned long)addr); 169 170 printk("u3msi: allocated virq 0x%x (hw 0x%x) addr 0x%lx\n", 171 virq, hwirq, (unsigned long)addr); 172 msg.data = hwirq; 173 write_msi_msg(virq, &msg); 174 175 hwirq++; 176 } 177 178 return 0; 179 } 180 181 int mpic_u3msi_init(struct mpic *mpic) 182 { 183 int rc; 184 185 rc = mpic_msi_init_allocator(mpic); 186 if (rc) { 187 pr_debug("u3msi: Error allocating bitmap!\n"); 188 return rc; 189 } 190 191 pr_debug("u3msi: Registering MPIC U3 MSI callbacks.\n"); 192 193 BUG_ON(msi_mpic); 194 msi_mpic = mpic; 195 196 WARN_ON(ppc_md.setup_msi_irqs); 197 ppc_md.setup_msi_irqs = u3msi_setup_msi_irqs; 198 ppc_md.teardown_msi_irqs = u3msi_teardown_msi_irqs; 199 200 return 0; 201 } 202