xref: /linux/arch/powerpc/sysdev/indirect_pci.c (revision 8b4a40809e5330c9da5d20107d693d92d73b31dc)
1 /*
2  * Support for indirect PCI bridges.
3  *
4  * Copyright (C) 1998 Gabriel Paubert.
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License
8  * as published by the Free Software Foundation; either version
9  * 2 of the License, or (at your option) any later version.
10  */
11 
12 #include <linux/kernel.h>
13 #include <linux/pci.h>
14 #include <linux/delay.h>
15 #include <linux/string.h>
16 #include <linux/init.h>
17 
18 #include <asm/io.h>
19 #include <asm/prom.h>
20 #include <asm/pci-bridge.h>
21 #include <asm/machdep.h>
22 
23 #ifdef CONFIG_PPC_INDIRECT_PCI_BE
24 #define PCI_CFG_OUT out_be32
25 #else
26 #define PCI_CFG_OUT out_le32
27 #endif
28 
29 static int
30 indirect_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
31 		     int len, u32 *val)
32 {
33 	struct pci_controller *hose = bus->sysdata;
34 	volatile void __iomem *cfg_data;
35 	u8 cfg_type = 0;
36 	u32 bus_no, reg;
37 
38 	if (ppc_md.pci_exclude_device)
39 		if (ppc_md.pci_exclude_device(hose, bus->number, devfn))
40 			return PCIBIOS_DEVICE_NOT_FOUND;
41 
42 	if (hose->indirect_type & PPC_INDIRECT_TYPE_SET_CFG_TYPE)
43 		if (bus->number != hose->first_busno)
44 			cfg_type = 1;
45 
46 	bus_no = (bus->number == hose->first_busno) ?
47 			hose->self_busno : bus->number;
48 
49 	if (hose->indirect_type & PPC_INDIRECT_TYPE_EXT_REG)
50 		reg = ((offset & 0xf00) << 16) | (offset & 0xfc);
51 	else
52 		reg = offset & 0xfc;
53 
54 	PCI_CFG_OUT(hose->cfg_addr,
55 		 (0x80000000 | (bus_no << 16)
56 		  | (devfn << 8) | reg | cfg_type));
57 
58 	/*
59 	 * Note: the caller has already checked that offset is
60 	 * suitably aligned and that len is 1, 2 or 4.
61 	 */
62 	cfg_data = hose->cfg_data + (offset & 3);
63 	switch (len) {
64 	case 1:
65 		*val = in_8(cfg_data);
66 		break;
67 	case 2:
68 		*val = in_le16(cfg_data);
69 		break;
70 	default:
71 		*val = in_le32(cfg_data);
72 		break;
73 	}
74 	return PCIBIOS_SUCCESSFUL;
75 }
76 
77 static int
78 indirect_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
79 		      int len, u32 val)
80 {
81 	struct pci_controller *hose = bus->sysdata;
82 	volatile void __iomem *cfg_data;
83 	u8 cfg_type = 0;
84 	u32 bus_no, reg;
85 
86 	if (ppc_md.pci_exclude_device)
87 		if (ppc_md.pci_exclude_device(hose, bus->number, devfn))
88 			return PCIBIOS_DEVICE_NOT_FOUND;
89 
90 	if (hose->indirect_type & PPC_INDIRECT_TYPE_SET_CFG_TYPE)
91 		if (bus->number != hose->first_busno)
92 			cfg_type = 1;
93 
94 	bus_no = (bus->number == hose->first_busno) ?
95 			hose->self_busno : bus->number;
96 
97 	if (hose->indirect_type & PPC_INDIRECT_TYPE_EXT_REG)
98 		reg = ((offset & 0xf00) << 16) | (offset & 0xfc);
99 	else
100 		reg = offset & 0xfc;
101 
102 	PCI_CFG_OUT(hose->cfg_addr,
103 		 (0x80000000 | (bus_no << 16)
104 		  | (devfn << 8) | reg | cfg_type));
105 
106 	/* surpress setting of PCI_PRIMARY_BUS */
107 	if (hose->indirect_type & PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS)
108 		if ((offset == PCI_PRIMARY_BUS) &&
109 			(bus->number == hose->first_busno))
110 		val &= 0xffffff00;
111 
112 	/*
113 	 * Note: the caller has already checked that offset is
114 	 * suitably aligned and that len is 1, 2 or 4.
115 	 */
116 	cfg_data = hose->cfg_data + (offset & 3);
117 	switch (len) {
118 	case 1:
119 		out_8(cfg_data, val);
120 		break;
121 	case 2:
122 		out_le16(cfg_data, val);
123 		break;
124 	default:
125 		out_le32(cfg_data, val);
126 		break;
127 	}
128 	return PCIBIOS_SUCCESSFUL;
129 }
130 
131 static struct pci_ops indirect_pci_ops =
132 {
133 	indirect_read_config,
134 	indirect_write_config
135 };
136 
137 void __init
138 setup_indirect_pci_nomap(struct pci_controller* hose, void __iomem * cfg_addr,
139 	void __iomem * cfg_data)
140 {
141 	hose->cfg_addr = cfg_addr;
142 	hose->cfg_data = cfg_data;
143 	hose->ops = &indirect_pci_ops;
144 }
145 
146 void __init
147 setup_indirect_pci(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data)
148 {
149 	unsigned long base = cfg_addr & PAGE_MASK;
150 	void __iomem *mbase, *addr, *data;
151 
152 	mbase = ioremap(base, PAGE_SIZE);
153 	addr = mbase + (cfg_addr & ~PAGE_MASK);
154 	if ((cfg_data & PAGE_MASK) != base)
155 		mbase = ioremap(cfg_data & PAGE_MASK, PAGE_SIZE);
156 	data = mbase + (cfg_data & ~PAGE_MASK);
157 	setup_indirect_pci_nomap(hose, addr, data);
158 }
159