1 /* 2 * FSL SoC setup code 3 * 4 * Maintained by Kumar Gala (see MAINTAINERS for contact information) 5 * 6 * 2006 (c) MontaVista Software, Inc. 7 * Vitaly Bordug <vbordug@ru.mvista.com> 8 * 9 * This program is free software; you can redistribute it and/or modify it 10 * under the terms of the GNU General Public License as published by the 11 * Free Software Foundation; either version 2 of the License, or (at your 12 * option) any later version. 13 */ 14 15 #include <linux/stddef.h> 16 #include <linux/kernel.h> 17 #include <linux/init.h> 18 #include <linux/errno.h> 19 #include <linux/major.h> 20 #include <linux/delay.h> 21 #include <linux/irq.h> 22 #include <linux/module.h> 23 #include <linux/device.h> 24 #include <linux/platform_device.h> 25 #include <linux/of_platform.h> 26 #include <linux/phy.h> 27 #include <linux/phy_fixed.h> 28 #include <linux/spi/spi.h> 29 #include <linux/fsl_devices.h> 30 #include <linux/fs_enet_pd.h> 31 #include <linux/fs_uart_pd.h> 32 33 #include <asm/system.h> 34 #include <asm/atomic.h> 35 #include <asm/io.h> 36 #include <asm/irq.h> 37 #include <asm/time.h> 38 #include <asm/prom.h> 39 #include <sysdev/fsl_soc.h> 40 #include <mm/mmu_decl.h> 41 #include <asm/cpm2.h> 42 43 extern void init_fcc_ioports(struct fs_platform_info*); 44 extern void init_fec_ioports(struct fs_platform_info*); 45 extern void init_smc_ioports(struct fs_uart_platform_info*); 46 static phys_addr_t immrbase = -1; 47 48 phys_addr_t get_immrbase(void) 49 { 50 struct device_node *soc; 51 52 if (immrbase != -1) 53 return immrbase; 54 55 soc = of_find_node_by_type(NULL, "soc"); 56 if (soc) { 57 int size; 58 u32 naddr; 59 const u32 *prop = of_get_property(soc, "#address-cells", &size); 60 61 if (prop && size == 4) 62 naddr = *prop; 63 else 64 naddr = 2; 65 66 prop = of_get_property(soc, "ranges", &size); 67 if (prop) 68 immrbase = of_translate_address(soc, prop + naddr); 69 70 of_node_put(soc); 71 } 72 73 return immrbase; 74 } 75 76 EXPORT_SYMBOL(get_immrbase); 77 78 static u32 sysfreq = -1; 79 80 u32 fsl_get_sys_freq(void) 81 { 82 struct device_node *soc; 83 const u32 *prop; 84 int size; 85 86 if (sysfreq != -1) 87 return sysfreq; 88 89 soc = of_find_node_by_type(NULL, "soc"); 90 if (!soc) 91 return -1; 92 93 prop = of_get_property(soc, "clock-frequency", &size); 94 if (!prop || size != sizeof(*prop) || *prop == 0) 95 prop = of_get_property(soc, "bus-frequency", &size); 96 97 if (prop && size == sizeof(*prop)) 98 sysfreq = *prop; 99 100 of_node_put(soc); 101 return sysfreq; 102 } 103 EXPORT_SYMBOL(fsl_get_sys_freq); 104 105 #if defined(CONFIG_CPM2) || defined(CONFIG_QUICC_ENGINE) || defined(CONFIG_8xx) 106 107 static u32 brgfreq = -1; 108 109 u32 get_brgfreq(void) 110 { 111 struct device_node *node; 112 const unsigned int *prop; 113 int size; 114 115 if (brgfreq != -1) 116 return brgfreq; 117 118 node = of_find_compatible_node(NULL, NULL, "fsl,cpm-brg"); 119 if (node) { 120 prop = of_get_property(node, "clock-frequency", &size); 121 if (prop && size == 4) 122 brgfreq = *prop; 123 124 of_node_put(node); 125 return brgfreq; 126 } 127 128 /* Legacy device binding -- will go away when no users are left. */ 129 node = of_find_node_by_type(NULL, "cpm"); 130 if (!node) 131 node = of_find_compatible_node(NULL, NULL, "fsl,qe"); 132 if (!node) 133 node = of_find_node_by_type(NULL, "qe"); 134 135 if (node) { 136 prop = of_get_property(node, "brg-frequency", &size); 137 if (prop && size == 4) 138 brgfreq = *prop; 139 140 if (brgfreq == -1 || brgfreq == 0) { 141 prop = of_get_property(node, "bus-frequency", &size); 142 if (prop && size == 4) 143 brgfreq = *prop / 2; 144 } 145 of_node_put(node); 146 } 147 148 return brgfreq; 149 } 150 151 EXPORT_SYMBOL(get_brgfreq); 152 153 static u32 fs_baudrate = -1; 154 155 u32 get_baudrate(void) 156 { 157 struct device_node *node; 158 159 if (fs_baudrate != -1) 160 return fs_baudrate; 161 162 node = of_find_node_by_type(NULL, "serial"); 163 if (node) { 164 int size; 165 const unsigned int *prop = of_get_property(node, 166 "current-speed", &size); 167 168 if (prop) 169 fs_baudrate = *prop; 170 of_node_put(node); 171 } 172 173 return fs_baudrate; 174 } 175 176 EXPORT_SYMBOL(get_baudrate); 177 #endif /* CONFIG_CPM2 */ 178 179 #ifdef CONFIG_FIXED_PHY 180 static int __init of_add_fixed_phys(void) 181 { 182 int ret; 183 struct device_node *np; 184 u32 *fixed_link; 185 struct fixed_phy_status status = {}; 186 187 for_each_node_by_name(np, "ethernet") { 188 fixed_link = (u32 *)of_get_property(np, "fixed-link", NULL); 189 if (!fixed_link) 190 continue; 191 192 status.link = 1; 193 status.duplex = fixed_link[1]; 194 status.speed = fixed_link[2]; 195 status.pause = fixed_link[3]; 196 status.asym_pause = fixed_link[4]; 197 198 ret = fixed_phy_add(PHY_POLL, fixed_link[0], &status); 199 if (ret) { 200 of_node_put(np); 201 return ret; 202 } 203 } 204 205 return 0; 206 } 207 arch_initcall(of_add_fixed_phys); 208 #endif /* CONFIG_FIXED_PHY */ 209 210 static int __init gfar_mdio_of_init(void) 211 { 212 struct device_node *np = NULL; 213 struct platform_device *mdio_dev; 214 struct resource res; 215 int ret; 216 217 np = of_find_compatible_node(np, NULL, "fsl,gianfar-mdio"); 218 219 /* try the deprecated version */ 220 if (!np) 221 np = of_find_compatible_node(np, "mdio", "gianfar"); 222 223 if (np) { 224 int k; 225 struct device_node *child = NULL; 226 struct gianfar_mdio_data mdio_data; 227 228 memset(&res, 0, sizeof(res)); 229 memset(&mdio_data, 0, sizeof(mdio_data)); 230 231 ret = of_address_to_resource(np, 0, &res); 232 if (ret) 233 goto err; 234 235 mdio_dev = 236 platform_device_register_simple("fsl-gianfar_mdio", 237 res.start, &res, 1); 238 if (IS_ERR(mdio_dev)) { 239 ret = PTR_ERR(mdio_dev); 240 goto err; 241 } 242 243 for (k = 0; k < 32; k++) 244 mdio_data.irq[k] = PHY_POLL; 245 246 while ((child = of_get_next_child(np, child)) != NULL) { 247 int irq = irq_of_parse_and_map(child, 0); 248 if (irq != NO_IRQ) { 249 const u32 *id = of_get_property(child, 250 "reg", NULL); 251 mdio_data.irq[*id] = irq; 252 } 253 } 254 255 ret = 256 platform_device_add_data(mdio_dev, &mdio_data, 257 sizeof(struct gianfar_mdio_data)); 258 if (ret) 259 goto unreg; 260 } 261 262 of_node_put(np); 263 return 0; 264 265 unreg: 266 platform_device_unregister(mdio_dev); 267 err: 268 of_node_put(np); 269 return ret; 270 } 271 272 arch_initcall(gfar_mdio_of_init); 273 274 static const char *gfar_tx_intr = "tx"; 275 static const char *gfar_rx_intr = "rx"; 276 static const char *gfar_err_intr = "error"; 277 278 static int __init gfar_of_init(void) 279 { 280 struct device_node *np; 281 unsigned int i; 282 struct platform_device *gfar_dev; 283 struct resource res; 284 int ret; 285 286 for (np = NULL, i = 0; 287 (np = of_find_compatible_node(np, "network", "gianfar")) != NULL; 288 i++) { 289 struct resource r[4]; 290 struct device_node *phy, *mdio; 291 struct gianfar_platform_data gfar_data; 292 const unsigned int *id; 293 const char *model; 294 const char *ctype; 295 const void *mac_addr; 296 const phandle *ph; 297 int n_res = 2; 298 299 memset(r, 0, sizeof(r)); 300 memset(&gfar_data, 0, sizeof(gfar_data)); 301 302 ret = of_address_to_resource(np, 0, &r[0]); 303 if (ret) 304 goto err; 305 306 of_irq_to_resource(np, 0, &r[1]); 307 308 model = of_get_property(np, "model", NULL); 309 310 /* If we aren't the FEC we have multiple interrupts */ 311 if (model && strcasecmp(model, "FEC")) { 312 r[1].name = gfar_tx_intr; 313 314 r[2].name = gfar_rx_intr; 315 of_irq_to_resource(np, 1, &r[2]); 316 317 r[3].name = gfar_err_intr; 318 of_irq_to_resource(np, 2, &r[3]); 319 320 n_res += 2; 321 } 322 323 gfar_dev = 324 platform_device_register_simple("fsl-gianfar", i, &r[0], 325 n_res); 326 327 if (IS_ERR(gfar_dev)) { 328 ret = PTR_ERR(gfar_dev); 329 goto err; 330 } 331 332 mac_addr = of_get_mac_address(np); 333 if (mac_addr) 334 memcpy(gfar_data.mac_addr, mac_addr, 6); 335 336 if (model && !strcasecmp(model, "TSEC")) 337 gfar_data.device_flags = 338 FSL_GIANFAR_DEV_HAS_GIGABIT | 339 FSL_GIANFAR_DEV_HAS_COALESCE | 340 FSL_GIANFAR_DEV_HAS_RMON | 341 FSL_GIANFAR_DEV_HAS_MULTI_INTR; 342 if (model && !strcasecmp(model, "eTSEC")) 343 gfar_data.device_flags = 344 FSL_GIANFAR_DEV_HAS_GIGABIT | 345 FSL_GIANFAR_DEV_HAS_COALESCE | 346 FSL_GIANFAR_DEV_HAS_RMON | 347 FSL_GIANFAR_DEV_HAS_MULTI_INTR | 348 FSL_GIANFAR_DEV_HAS_CSUM | 349 FSL_GIANFAR_DEV_HAS_VLAN | 350 FSL_GIANFAR_DEV_HAS_EXTENDED_HASH; 351 352 ctype = of_get_property(np, "phy-connection-type", NULL); 353 354 /* We only care about rgmii-id. The rest are autodetected */ 355 if (ctype && !strcmp(ctype, "rgmii-id")) 356 gfar_data.interface = PHY_INTERFACE_MODE_RGMII_ID; 357 else 358 gfar_data.interface = PHY_INTERFACE_MODE_MII; 359 360 ph = of_get_property(np, "phy-handle", NULL); 361 if (ph == NULL) { 362 u32 *fixed_link; 363 364 fixed_link = (u32 *)of_get_property(np, "fixed-link", 365 NULL); 366 if (!fixed_link) { 367 ret = -ENODEV; 368 goto unreg; 369 } 370 371 snprintf(gfar_data.bus_id, MII_BUS_ID_SIZE, "0"); 372 gfar_data.phy_id = fixed_link[0]; 373 } else { 374 phy = of_find_node_by_phandle(*ph); 375 376 if (phy == NULL) { 377 ret = -ENODEV; 378 goto unreg; 379 } 380 381 mdio = of_get_parent(phy); 382 383 id = of_get_property(phy, "reg", NULL); 384 ret = of_address_to_resource(mdio, 0, &res); 385 if (ret) { 386 of_node_put(phy); 387 of_node_put(mdio); 388 goto unreg; 389 } 390 391 gfar_data.phy_id = *id; 392 snprintf(gfar_data.bus_id, MII_BUS_ID_SIZE, "%llx", 393 (unsigned long long)res.start); 394 395 of_node_put(phy); 396 of_node_put(mdio); 397 } 398 399 ret = 400 platform_device_add_data(gfar_dev, &gfar_data, 401 sizeof(struct 402 gianfar_platform_data)); 403 if (ret) 404 goto unreg; 405 } 406 407 return 0; 408 409 unreg: 410 platform_device_unregister(gfar_dev); 411 err: 412 return ret; 413 } 414 415 arch_initcall(gfar_of_init); 416 417 418 #ifdef CONFIG_PPC_83xx 419 static int __init mpc83xx_wdt_init(void) 420 { 421 struct resource r; 422 struct device_node *np; 423 struct platform_device *dev; 424 u32 freq = fsl_get_sys_freq(); 425 int ret; 426 427 np = of_find_compatible_node(NULL, "watchdog", "mpc83xx_wdt"); 428 429 if (!np) { 430 ret = -ENODEV; 431 goto nodev; 432 } 433 434 memset(&r, 0, sizeof(r)); 435 436 ret = of_address_to_resource(np, 0, &r); 437 if (ret) 438 goto err; 439 440 dev = platform_device_register_simple("mpc83xx_wdt", 0, &r, 1); 441 if (IS_ERR(dev)) { 442 ret = PTR_ERR(dev); 443 goto err; 444 } 445 446 ret = platform_device_add_data(dev, &freq, sizeof(freq)); 447 if (ret) 448 goto unreg; 449 450 of_node_put(np); 451 return 0; 452 453 unreg: 454 platform_device_unregister(dev); 455 err: 456 of_node_put(np); 457 nodev: 458 return ret; 459 } 460 461 arch_initcall(mpc83xx_wdt_init); 462 #endif 463 464 static enum fsl_usb2_phy_modes determine_usb_phy(const char *phy_type) 465 { 466 if (!phy_type) 467 return FSL_USB2_PHY_NONE; 468 if (!strcasecmp(phy_type, "ulpi")) 469 return FSL_USB2_PHY_ULPI; 470 if (!strcasecmp(phy_type, "utmi")) 471 return FSL_USB2_PHY_UTMI; 472 if (!strcasecmp(phy_type, "utmi_wide")) 473 return FSL_USB2_PHY_UTMI_WIDE; 474 if (!strcasecmp(phy_type, "serial")) 475 return FSL_USB2_PHY_SERIAL; 476 477 return FSL_USB2_PHY_NONE; 478 } 479 480 static int __init fsl_usb_of_init(void) 481 { 482 struct device_node *np; 483 unsigned int i = 0; 484 struct platform_device *usb_dev_mph = NULL, *usb_dev_dr_host = NULL, 485 *usb_dev_dr_client = NULL; 486 int ret; 487 488 for_each_compatible_node(np, NULL, "fsl-usb2-mph") { 489 struct resource r[2]; 490 struct fsl_usb2_platform_data usb_data; 491 const unsigned char *prop = NULL; 492 493 memset(&r, 0, sizeof(r)); 494 memset(&usb_data, 0, sizeof(usb_data)); 495 496 ret = of_address_to_resource(np, 0, &r[0]); 497 if (ret) 498 goto err; 499 500 of_irq_to_resource(np, 0, &r[1]); 501 502 usb_dev_mph = 503 platform_device_register_simple("fsl-ehci", i, r, 2); 504 if (IS_ERR(usb_dev_mph)) { 505 ret = PTR_ERR(usb_dev_mph); 506 goto err; 507 } 508 509 usb_dev_mph->dev.coherent_dma_mask = 0xffffffffUL; 510 usb_dev_mph->dev.dma_mask = &usb_dev_mph->dev.coherent_dma_mask; 511 512 usb_data.operating_mode = FSL_USB2_MPH_HOST; 513 514 prop = of_get_property(np, "port0", NULL); 515 if (prop) 516 usb_data.port_enables |= FSL_USB2_PORT0_ENABLED; 517 518 prop = of_get_property(np, "port1", NULL); 519 if (prop) 520 usb_data.port_enables |= FSL_USB2_PORT1_ENABLED; 521 522 prop = of_get_property(np, "phy_type", NULL); 523 usb_data.phy_mode = determine_usb_phy(prop); 524 525 ret = 526 platform_device_add_data(usb_dev_mph, &usb_data, 527 sizeof(struct 528 fsl_usb2_platform_data)); 529 if (ret) 530 goto unreg_mph; 531 i++; 532 } 533 534 for_each_compatible_node(np, NULL, "fsl-usb2-dr") { 535 struct resource r[2]; 536 struct fsl_usb2_platform_data usb_data; 537 const unsigned char *prop = NULL; 538 539 memset(&r, 0, sizeof(r)); 540 memset(&usb_data, 0, sizeof(usb_data)); 541 542 ret = of_address_to_resource(np, 0, &r[0]); 543 if (ret) 544 goto unreg_mph; 545 546 of_irq_to_resource(np, 0, &r[1]); 547 548 prop = of_get_property(np, "dr_mode", NULL); 549 550 if (!prop || !strcmp(prop, "host")) { 551 usb_data.operating_mode = FSL_USB2_DR_HOST; 552 usb_dev_dr_host = platform_device_register_simple( 553 "fsl-ehci", i, r, 2); 554 if (IS_ERR(usb_dev_dr_host)) { 555 ret = PTR_ERR(usb_dev_dr_host); 556 goto err; 557 } 558 } else if (prop && !strcmp(prop, "peripheral")) { 559 usb_data.operating_mode = FSL_USB2_DR_DEVICE; 560 usb_dev_dr_client = platform_device_register_simple( 561 "fsl-usb2-udc", i, r, 2); 562 if (IS_ERR(usb_dev_dr_client)) { 563 ret = PTR_ERR(usb_dev_dr_client); 564 goto err; 565 } 566 } else if (prop && !strcmp(prop, "otg")) { 567 usb_data.operating_mode = FSL_USB2_DR_OTG; 568 usb_dev_dr_host = platform_device_register_simple( 569 "fsl-ehci", i, r, 2); 570 if (IS_ERR(usb_dev_dr_host)) { 571 ret = PTR_ERR(usb_dev_dr_host); 572 goto err; 573 } 574 usb_dev_dr_client = platform_device_register_simple( 575 "fsl-usb2-udc", i, r, 2); 576 if (IS_ERR(usb_dev_dr_client)) { 577 ret = PTR_ERR(usb_dev_dr_client); 578 goto err; 579 } 580 } else { 581 ret = -EINVAL; 582 goto err; 583 } 584 585 prop = of_get_property(np, "phy_type", NULL); 586 usb_data.phy_mode = determine_usb_phy(prop); 587 588 if (usb_dev_dr_host) { 589 usb_dev_dr_host->dev.coherent_dma_mask = 0xffffffffUL; 590 usb_dev_dr_host->dev.dma_mask = &usb_dev_dr_host-> 591 dev.coherent_dma_mask; 592 if ((ret = platform_device_add_data(usb_dev_dr_host, 593 &usb_data, sizeof(struct 594 fsl_usb2_platform_data)))) 595 goto unreg_dr; 596 } 597 if (usb_dev_dr_client) { 598 usb_dev_dr_client->dev.coherent_dma_mask = 0xffffffffUL; 599 usb_dev_dr_client->dev.dma_mask = &usb_dev_dr_client-> 600 dev.coherent_dma_mask; 601 if ((ret = platform_device_add_data(usb_dev_dr_client, 602 &usb_data, sizeof(struct 603 fsl_usb2_platform_data)))) 604 goto unreg_dr; 605 } 606 i++; 607 } 608 return 0; 609 610 unreg_dr: 611 if (usb_dev_dr_host) 612 platform_device_unregister(usb_dev_dr_host); 613 if (usb_dev_dr_client) 614 platform_device_unregister(usb_dev_dr_client); 615 unreg_mph: 616 if (usb_dev_mph) 617 platform_device_unregister(usb_dev_mph); 618 err: 619 return ret; 620 } 621 622 arch_initcall(fsl_usb_of_init); 623 624 static int __init of_fsl_spi_probe(char *type, char *compatible, u32 sysclk, 625 struct spi_board_info *board_infos, 626 unsigned int num_board_infos, 627 void (*activate_cs)(u8 cs, u8 polarity), 628 void (*deactivate_cs)(u8 cs, u8 polarity)) 629 { 630 struct device_node *np; 631 unsigned int i = 0; 632 633 for_each_compatible_node(np, type, compatible) { 634 int ret; 635 unsigned int j; 636 const void *prop; 637 struct resource res[2]; 638 struct platform_device *pdev; 639 struct fsl_spi_platform_data pdata = { 640 .activate_cs = activate_cs, 641 .deactivate_cs = deactivate_cs, 642 }; 643 644 memset(res, 0, sizeof(res)); 645 646 pdata.sysclk = sysclk; 647 648 prop = of_get_property(np, "reg", NULL); 649 if (!prop) 650 goto err; 651 pdata.bus_num = *(u32 *)prop; 652 653 prop = of_get_property(np, "cell-index", NULL); 654 if (prop) 655 i = *(u32 *)prop; 656 657 prop = of_get_property(np, "mode", NULL); 658 if (prop && !strcmp(prop, "cpu-qe")) 659 pdata.qe_mode = 1; 660 661 for (j = 0; j < num_board_infos; j++) { 662 if (board_infos[j].bus_num == pdata.bus_num) 663 pdata.max_chipselect++; 664 } 665 666 if (!pdata.max_chipselect) 667 continue; 668 669 ret = of_address_to_resource(np, 0, &res[0]); 670 if (ret) 671 goto err; 672 673 ret = of_irq_to_resource(np, 0, &res[1]); 674 if (ret == NO_IRQ) 675 goto err; 676 677 pdev = platform_device_alloc("mpc83xx_spi", i); 678 if (!pdev) 679 goto err; 680 681 ret = platform_device_add_data(pdev, &pdata, sizeof(pdata)); 682 if (ret) 683 goto unreg; 684 685 ret = platform_device_add_resources(pdev, res, 686 ARRAY_SIZE(res)); 687 if (ret) 688 goto unreg; 689 690 ret = platform_device_add(pdev); 691 if (ret) 692 goto unreg; 693 694 goto next; 695 unreg: 696 platform_device_del(pdev); 697 err: 698 pr_err("%s: registration failed\n", np->full_name); 699 next: 700 i++; 701 } 702 703 return i; 704 } 705 706 int __init fsl_spi_init(struct spi_board_info *board_infos, 707 unsigned int num_board_infos, 708 void (*activate_cs)(u8 cs, u8 polarity), 709 void (*deactivate_cs)(u8 cs, u8 polarity)) 710 { 711 u32 sysclk = -1; 712 int ret; 713 714 #ifdef CONFIG_QUICC_ENGINE 715 /* SPI controller is either clocked from QE or SoC clock */ 716 sysclk = get_brgfreq(); 717 #endif 718 if (sysclk == -1) { 719 sysclk = fsl_get_sys_freq(); 720 if (sysclk == -1) 721 return -ENODEV; 722 } 723 724 ret = of_fsl_spi_probe(NULL, "fsl,spi", sysclk, board_infos, 725 num_board_infos, activate_cs, deactivate_cs); 726 if (!ret) 727 of_fsl_spi_probe("spi", "fsl_spi", sysclk, board_infos, 728 num_board_infos, activate_cs, deactivate_cs); 729 730 return spi_register_board_info(board_infos, num_board_infos); 731 } 732 733 #if defined(CONFIG_PPC_85xx) || defined(CONFIG_PPC_86xx) 734 static __be32 __iomem *rstcr; 735 736 static int __init setup_rstcr(void) 737 { 738 struct device_node *np; 739 np = of_find_node_by_name(NULL, "global-utilities"); 740 if ((np && of_get_property(np, "fsl,has-rstcr", NULL))) { 741 const u32 *prop = of_get_property(np, "reg", NULL); 742 if (prop) { 743 /* map reset control register 744 * 0xE00B0 is offset of reset control register 745 */ 746 rstcr = ioremap(get_immrbase() + *prop + 0xB0, 0xff); 747 if (!rstcr) 748 printk (KERN_EMERG "Error: reset control " 749 "register not mapped!\n"); 750 } 751 } else 752 printk (KERN_INFO "rstcr compatible register does not exist!\n"); 753 if (np) 754 of_node_put(np); 755 return 0; 756 } 757 758 arch_initcall(setup_rstcr); 759 760 void fsl_rstcr_restart(char *cmd) 761 { 762 local_irq_disable(); 763 if (rstcr) 764 /* set reset control register */ 765 out_be32(rstcr, 0x2); /* HRESET_REQ */ 766 767 while (1) ; 768 } 769 #endif 770 771 #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE) 772 struct platform_diu_data_ops diu_ops = { 773 .diu_size = 1280 * 1024 * 4, /* default one 1280x1024 buffer */ 774 }; 775 EXPORT_SYMBOL(diu_ops); 776 777 int __init preallocate_diu_videomemory(void) 778 { 779 pr_debug("diu_size=%lu\n", diu_ops.diu_size); 780 781 diu_ops.diu_mem = __alloc_bootmem(diu_ops.diu_size, 8, 0); 782 if (!diu_ops.diu_mem) { 783 printk(KERN_ERR "fsl-diu: cannot allocate %lu bytes\n", 784 diu_ops.diu_size); 785 return -ENOMEM; 786 } 787 788 pr_debug("diu_mem=%p\n", diu_ops.diu_mem); 789 790 rh_init(&diu_ops.diu_rh_info, 4096, ARRAY_SIZE(diu_ops.diu_rh_block), 791 diu_ops.diu_rh_block); 792 return rh_attach_region(&diu_ops.diu_rh_info, 793 (unsigned long) diu_ops.diu_mem, 794 diu_ops.diu_size); 795 } 796 797 static int __init early_parse_diufb(char *p) 798 { 799 if (!p) 800 return 1; 801 802 diu_ops.diu_size = _ALIGN_UP(memparse(p, &p), 8); 803 804 pr_debug("diu_size=%lu\n", diu_ops.diu_size); 805 806 return 0; 807 } 808 early_param("diufb", early_parse_diufb); 809 810 #endif 811