1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * 64-bit pSeries and RS/6000 setup code. 4 * 5 * Copyright (C) 1995 Linus Torvalds 6 * Adapted from 'alpha' version by Gary Thomas 7 * Modified by Cort Dougan (cort@cs.nmt.edu) 8 * Modified by PPC64 Team, IBM Corp 9 */ 10 11 /* 12 * bootup setup stuff.. 13 */ 14 15 #include <linux/cpu.h> 16 #include <linux/errno.h> 17 #include <linux/platform_device.h> 18 #include <linux/sched.h> 19 #include <linux/kernel.h> 20 #include <linux/mm.h> 21 #include <linux/stddef.h> 22 #include <linux/unistd.h> 23 #include <linux/user.h> 24 #include <linux/tty.h> 25 #include <linux/major.h> 26 #include <linux/interrupt.h> 27 #include <linux/reboot.h> 28 #include <linux/init.h> 29 #include <linux/ioport.h> 30 #include <linux/console.h> 31 #include <linux/pci.h> 32 #include <linux/utsname.h> 33 #include <linux/adb.h> 34 #include <linux/export.h> 35 #include <linux/delay.h> 36 #include <linux/irq.h> 37 #include <linux/seq_file.h> 38 #include <linux/root_dev.h> 39 #include <linux/of.h> 40 #include <linux/of_irq.h> 41 #include <linux/of_pci.h> 42 #include <linux/memblock.h> 43 #include <linux/swiotlb.h> 44 #include <linux/seq_buf.h> 45 #include <linux/sched/cputime.h> 46 47 #include <asm/mmu.h> 48 #include <asm/processor.h> 49 #include <asm/io.h> 50 #include <asm/rtas.h> 51 #include <asm/pci-bridge.h> 52 #include <asm/iommu.h> 53 #include <asm/dma.h> 54 #include <asm/machdep.h> 55 #include <asm/irq.h> 56 #include <asm/time.h> 57 #include <asm/nvram.h> 58 #include <asm/pmc.h> 59 #include <asm/xics.h> 60 #include <asm/xive.h> 61 #include <asm/papr-sysparm.h> 62 #include <asm/ppc-pci.h> 63 #include <asm/i8259.h> 64 #include <asm/udbg.h> 65 #include <asm/smp.h> 66 #include <asm/firmware.h> 67 #include <asm/eeh.h> 68 #include <asm/reg.h> 69 #include <asm/plpar_wrappers.h> 70 #include <asm/kexec.h> 71 #include <asm/isa-bridge.h> 72 #include <asm/security_features.h> 73 #include <asm/asm-const.h> 74 #include <asm/idle.h> 75 #include <asm/swiotlb.h> 76 #include <asm/svm.h> 77 #include <asm/dtl.h> 78 #include <asm/hvconsole.h> 79 #include <asm/setup.h> 80 #include <asm/papr-watchdog.h> 81 82 #include "pseries.h" 83 84 DEFINE_STATIC_KEY_FALSE(shared_processor); 85 EXPORT_SYMBOL(shared_processor); 86 87 #ifdef CONFIG_PARAVIRT_TIME_ACCOUNTING 88 static bool steal_acc = true; 89 static int __init parse_no_stealacc(char *arg) 90 { 91 steal_acc = false; 92 return 0; 93 } 94 95 early_param("no-steal-acc", parse_no_stealacc); 96 #endif 97 98 int CMO_PrPSP = -1; 99 int CMO_SecPSP = -1; 100 unsigned long CMO_PageSize = (ASM_CONST(1) << IOMMU_PAGE_SHIFT_4K); 101 EXPORT_SYMBOL(CMO_PageSize); 102 103 int fwnmi_active; /* TRUE if an FWNMI handler is present */ 104 int ibm_nmi_interlock_token; 105 u32 pseries_security_flavor; 106 107 static void pSeries_show_cpuinfo(struct seq_file *m) 108 { 109 struct device_node *root; 110 const char *model = ""; 111 112 root = of_find_node_by_path("/"); 113 if (root) 114 model = of_get_property(root, "model", NULL); 115 seq_printf(m, "machine\t\t: CHRP %s\n", model); 116 of_node_put(root); 117 if (radix_enabled()) 118 seq_printf(m, "MMU\t\t: Radix\n"); 119 else 120 seq_printf(m, "MMU\t\t: Hash\n"); 121 } 122 123 /* Initialize firmware assisted non-maskable interrupts if 124 * the firmware supports this feature. 125 */ 126 static void __init fwnmi_init(void) 127 { 128 unsigned long system_reset_addr, machine_check_addr; 129 u8 *mce_data_buf; 130 unsigned int i; 131 int nr_cpus = num_possible_cpus(); 132 #ifdef CONFIG_PPC_64S_HASH_MMU 133 struct slb_entry *slb_ptr; 134 size_t size; 135 #endif 136 int ibm_nmi_register_token; 137 138 ibm_nmi_register_token = rtas_function_token(RTAS_FN_IBM_NMI_REGISTER); 139 if (ibm_nmi_register_token == RTAS_UNKNOWN_SERVICE) 140 return; 141 142 ibm_nmi_interlock_token = rtas_function_token(RTAS_FN_IBM_NMI_INTERLOCK); 143 if (WARN_ON(ibm_nmi_interlock_token == RTAS_UNKNOWN_SERVICE)) 144 return; 145 146 /* If the kernel's not linked at zero we point the firmware at low 147 * addresses anyway, and use a trampoline to get to the real code. */ 148 system_reset_addr = __pa(system_reset_fwnmi) - PHYSICAL_START; 149 machine_check_addr = __pa(machine_check_fwnmi) - PHYSICAL_START; 150 151 if (0 == rtas_call(ibm_nmi_register_token, 2, 1, NULL, 152 system_reset_addr, machine_check_addr)) 153 fwnmi_active = 1; 154 155 /* 156 * Allocate a chunk for per cpu buffer to hold rtas errorlog. 157 * It will be used in real mode mce handler, hence it needs to be 158 * below RMA. 159 */ 160 mce_data_buf = memblock_alloc_try_nid_raw(RTAS_ERROR_LOG_MAX * nr_cpus, 161 RTAS_ERROR_LOG_MAX, MEMBLOCK_LOW_LIMIT, 162 ppc64_rma_size, NUMA_NO_NODE); 163 if (!mce_data_buf) 164 panic("Failed to allocate %d bytes below %pa for MCE buffer\n", 165 RTAS_ERROR_LOG_MAX * nr_cpus, &ppc64_rma_size); 166 167 for_each_possible_cpu(i) { 168 paca_ptrs[i]->mce_data_buf = mce_data_buf + 169 (RTAS_ERROR_LOG_MAX * i); 170 } 171 172 #ifdef CONFIG_PPC_64S_HASH_MMU 173 if (!radix_enabled()) { 174 /* Allocate per cpu area to save old slb contents during MCE */ 175 size = sizeof(struct slb_entry) * mmu_slb_size * nr_cpus; 176 slb_ptr = memblock_alloc_try_nid_raw(size, 177 sizeof(struct slb_entry), MEMBLOCK_LOW_LIMIT, 178 ppc64_rma_size, NUMA_NO_NODE); 179 if (!slb_ptr) 180 panic("Failed to allocate %zu bytes below %pa for slb area\n", 181 size, &ppc64_rma_size); 182 183 for_each_possible_cpu(i) 184 paca_ptrs[i]->mce_faulty_slbs = slb_ptr + (mmu_slb_size * i); 185 } 186 #endif 187 } 188 189 static void pseries_crash_stop_watchdogs(void) 190 { 191 long rc; 192 193 rc = plpar_hcall_norets_notrace(H_WATCHDOG, PSERIES_WDTF_OP_STOP, 194 PSERIES_WDT_NUM_ALL); 195 if (rc != H_SUCCESS && rc != H_NOOP) 196 pr_warn("Could not stop watchdogs before kdump rc=%ld\n", rc); 197 } 198 199 /* 200 * Affix a device for the first timer to the platform bus if 201 * we have firmware support for the H_WATCHDOG hypercall. 202 */ 203 static __init int pseries_wdt_init(void) 204 { 205 struct platform_device *pdev; 206 207 if (!firmware_has_feature(FW_FEATURE_WATCHDOG)) 208 return 0; 209 210 pdev = platform_device_register_simple("pseries-wdt", 0, NULL, 0); 211 212 if (IS_ERR(pdev)) { 213 pr_err("Failed to register pseries-wdt platform device\n"); 214 return PTR_ERR(pdev); 215 } 216 217 if (crash_shutdown_register(pseries_crash_stop_watchdogs)) 218 pr_warn("Could not register watchdog crash shutdown handler\n"); 219 220 return 0; 221 } 222 machine_subsys_initcall(pseries, pseries_wdt_init); 223 224 static void pseries_8259_cascade(struct irq_desc *desc) 225 { 226 struct irq_chip *chip = irq_desc_get_chip(desc); 227 unsigned int cascade_irq = i8259_irq(); 228 229 if (cascade_irq) 230 generic_handle_irq(cascade_irq); 231 232 chip->irq_eoi(&desc->irq_data); 233 } 234 235 static void __init pseries_setup_i8259_cascade(void) 236 { 237 struct device_node *np, *old, *found = NULL; 238 unsigned int cascade; 239 const u32 *addrp; 240 unsigned long intack = 0; 241 int naddr; 242 243 for_each_node_by_type(np, "interrupt-controller") { 244 if (of_device_is_compatible(np, "chrp,iic")) { 245 found = np; 246 break; 247 } 248 } 249 250 if (found == NULL) { 251 printk(KERN_DEBUG "pic: no ISA interrupt controller\n"); 252 return; 253 } 254 255 cascade = irq_of_parse_and_map(found, 0); 256 if (!cascade) { 257 printk(KERN_ERR "pic: failed to map cascade interrupt"); 258 return; 259 } 260 pr_debug("pic: cascade mapped to irq %d\n", cascade); 261 262 for (old = of_node_get(found); old != NULL ; old = np) { 263 np = of_get_parent(old); 264 of_node_put(old); 265 if (np == NULL) 266 break; 267 if (!of_node_name_eq(np, "pci")) 268 continue; 269 addrp = of_get_property(np, "8259-interrupt-acknowledge", NULL); 270 if (addrp == NULL) 271 continue; 272 naddr = of_n_addr_cells(np); 273 intack = addrp[naddr-1]; 274 if (naddr > 1) 275 intack |= ((unsigned long)addrp[naddr-2]) << 32; 276 } 277 if (intack) 278 printk(KERN_DEBUG "pic: PCI 8259 intack at 0x%016lx\n", intack); 279 i8259_init(found, intack); 280 of_node_put(found); 281 irq_set_chained_handler(cascade, pseries_8259_cascade); 282 } 283 284 static void __init pseries_init_irq(void) 285 { 286 /* Try using a XIVE if available, otherwise use a XICS */ 287 if (!xive_spapr_init()) { 288 xics_init(); 289 pseries_setup_i8259_cascade(); 290 } 291 } 292 293 static void pseries_lpar_enable_pmcs(void) 294 { 295 unsigned long set, reset; 296 297 set = 1UL << 63; 298 reset = 0; 299 plpar_hcall_norets(H_PERFMON, set, reset); 300 } 301 302 static int pci_dn_reconfig_notifier(struct notifier_block *nb, unsigned long action, void *data) 303 { 304 struct of_reconfig_data *rd = data; 305 struct device_node *parent, *np = rd->dn; 306 struct pci_dn *pdn; 307 int err = NOTIFY_OK; 308 309 switch (action) { 310 case OF_RECONFIG_ATTACH_NODE: 311 parent = of_get_parent(np); 312 pdn = parent ? PCI_DN(parent) : NULL; 313 if (pdn) 314 pci_add_device_node_info(pdn->phb, np); 315 316 of_node_put(parent); 317 break; 318 case OF_RECONFIG_DETACH_NODE: 319 pdn = PCI_DN(np); 320 if (pdn) 321 list_del(&pdn->list); 322 break; 323 default: 324 err = NOTIFY_DONE; 325 break; 326 } 327 return err; 328 } 329 330 static struct notifier_block pci_dn_reconfig_nb = { 331 .notifier_call = pci_dn_reconfig_notifier, 332 }; 333 334 struct kmem_cache *dtl_cache; 335 336 #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE 337 /* 338 * Allocate space for the dispatch trace log for all possible cpus 339 * and register the buffers with the hypervisor. This is used for 340 * computing time stolen by the hypervisor. 341 */ 342 static int alloc_dispatch_logs(void) 343 { 344 if (!firmware_has_feature(FW_FEATURE_SPLPAR)) 345 return 0; 346 347 if (!dtl_cache) 348 return 0; 349 350 alloc_dtl_buffers(0); 351 352 /* Register the DTL for the current (boot) cpu */ 353 register_dtl_buffer(smp_processor_id()); 354 355 return 0; 356 } 357 #else /* !CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */ 358 static inline int alloc_dispatch_logs(void) 359 { 360 return 0; 361 } 362 #endif /* CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */ 363 364 static int alloc_dispatch_log_kmem_cache(void) 365 { 366 void (*ctor)(void *) = get_dtl_cache_ctor(); 367 368 dtl_cache = kmem_cache_create_usercopy("dtl", DISPATCH_LOG_BYTES, 369 DISPATCH_LOG_BYTES, 0, 0, DISPATCH_LOG_BYTES, ctor); 370 if (!dtl_cache) { 371 pr_warn("Failed to create dispatch trace log buffer cache\n"); 372 pr_warn("Stolen time statistics will be unreliable\n"); 373 return 0; 374 } 375 376 return alloc_dispatch_logs(); 377 } 378 machine_early_initcall(pseries, alloc_dispatch_log_kmem_cache); 379 380 DEFINE_PER_CPU(u64, idle_spurr_cycles); 381 DEFINE_PER_CPU(u64, idle_entry_purr_snap); 382 DEFINE_PER_CPU(u64, idle_entry_spurr_snap); 383 static void pseries_lpar_idle(void) 384 { 385 /* 386 * Default handler to go into low thread priority and possibly 387 * low power mode by ceding processor to hypervisor 388 */ 389 390 if (!prep_irq_for_idle()) 391 return; 392 393 /* Indicate to hypervisor that we are idle. */ 394 pseries_idle_prolog(); 395 396 /* 397 * Yield the processor to the hypervisor. We return if 398 * an external interrupt occurs (which are driven prior 399 * to returning here) or if a prod occurs from another 400 * processor. When returning here, external interrupts 401 * are enabled. 402 */ 403 cede_processor(); 404 405 pseries_idle_epilog(); 406 } 407 408 static bool pseries_reloc_on_exception_enabled; 409 410 bool pseries_reloc_on_exception(void) 411 { 412 return pseries_reloc_on_exception_enabled; 413 } 414 EXPORT_SYMBOL_GPL(pseries_reloc_on_exception); 415 416 /* 417 * Enable relocation on during exceptions. This has partition wide scope and 418 * may take a while to complete, if it takes longer than one second we will 419 * just give up rather than wasting any more time on this - if that turns out 420 * to ever be a problem in practice we can move this into a kernel thread to 421 * finish off the process later in boot. 422 */ 423 bool pseries_enable_reloc_on_exc(void) 424 { 425 long rc; 426 unsigned int delay, total_delay = 0; 427 428 while (1) { 429 rc = enable_reloc_on_exceptions(); 430 if (!H_IS_LONG_BUSY(rc)) { 431 if (rc == H_P2) { 432 pr_info("Relocation on exceptions not" 433 " supported\n"); 434 return false; 435 } else if (rc != H_SUCCESS) { 436 pr_warn("Unable to enable relocation" 437 " on exceptions: %ld\n", rc); 438 return false; 439 } 440 pseries_reloc_on_exception_enabled = true; 441 return true; 442 } 443 444 delay = get_longbusy_msecs(rc); 445 total_delay += delay; 446 if (total_delay > 1000) { 447 pr_warn("Warning: Giving up waiting to enable " 448 "relocation on exceptions (%u msec)!\n", 449 total_delay); 450 return false; 451 } 452 453 mdelay(delay); 454 } 455 } 456 EXPORT_SYMBOL(pseries_enable_reloc_on_exc); 457 458 void pseries_disable_reloc_on_exc(void) 459 { 460 long rc; 461 462 while (1) { 463 rc = disable_reloc_on_exceptions(); 464 if (!H_IS_LONG_BUSY(rc)) 465 break; 466 mdelay(get_longbusy_msecs(rc)); 467 } 468 if (rc == H_SUCCESS) 469 pseries_reloc_on_exception_enabled = false; 470 else 471 pr_warn("Warning: Failed to disable relocation on exceptions: %ld\n", 472 rc); 473 } 474 EXPORT_SYMBOL(pseries_disable_reloc_on_exc); 475 476 #ifdef __LITTLE_ENDIAN__ 477 void pseries_big_endian_exceptions(void) 478 { 479 long rc; 480 481 while (1) { 482 rc = enable_big_endian_exceptions(); 483 if (!H_IS_LONG_BUSY(rc)) 484 break; 485 mdelay(get_longbusy_msecs(rc)); 486 } 487 488 /* 489 * At this point it is unlikely panic() will get anything 490 * out to the user, since this is called very late in kexec 491 * but at least this will stop us from continuing on further 492 * and creating an even more difficult to debug situation. 493 * 494 * There is a known problem when kdump'ing, if cpus are offline 495 * the above call will fail. Rather than panicking again, keep 496 * going and hope the kdump kernel is also little endian, which 497 * it usually is. 498 */ 499 if (rc && !kdump_in_progress()) 500 panic("Could not enable big endian exceptions"); 501 } 502 503 void __init pseries_little_endian_exceptions(void) 504 { 505 long rc; 506 507 while (1) { 508 rc = enable_little_endian_exceptions(); 509 if (!H_IS_LONG_BUSY(rc)) 510 break; 511 mdelay(get_longbusy_msecs(rc)); 512 } 513 if (rc) { 514 ppc_md.progress("H_SET_MODE LE exception fail", 0); 515 panic("Could not enable little endian exceptions"); 516 } 517 } 518 #endif 519 520 static void __init pSeries_discover_phbs(void) 521 { 522 struct device_node *node; 523 struct pci_controller *phb; 524 struct device_node *root = of_find_node_by_path("/"); 525 526 for_each_child_of_node(root, node) { 527 if (!of_node_is_type(node, "pci") && 528 !of_node_is_type(node, "pciex")) 529 continue; 530 531 phb = pcibios_alloc_controller(node); 532 if (!phb) 533 continue; 534 rtas_setup_phb(phb); 535 pci_process_bridge_OF_ranges(phb, node, 0); 536 isa_bridge_find_early(phb); 537 phb->controller_ops = pseries_pci_controller_ops; 538 539 /* create pci_dn's for DT nodes under this PHB */ 540 pci_devs_phb_init_dynamic(phb); 541 542 pseries_msi_allocate_domains(phb); 543 } 544 545 of_node_put(root); 546 547 /* 548 * PCI_PROBE_ONLY and PCI_REASSIGN_ALL_BUS can be set via properties 549 * in chosen. 550 */ 551 of_pci_check_probe_only(); 552 } 553 554 static void init_cpu_char_feature_flags(struct h_cpu_char_result *result) 555 { 556 /* 557 * The features below are disabled by default, so we instead look to see 558 * if firmware has *enabled* them, and set them if so. 559 */ 560 if (result->character & H_CPU_CHAR_SPEC_BAR_ORI31) 561 security_ftr_set(SEC_FTR_SPEC_BAR_ORI31); 562 563 if (result->character & H_CPU_CHAR_BCCTRL_SERIALISED) 564 security_ftr_set(SEC_FTR_BCCTRL_SERIALISED); 565 566 if (result->character & H_CPU_CHAR_L1D_FLUSH_ORI30) 567 security_ftr_set(SEC_FTR_L1D_FLUSH_ORI30); 568 569 if (result->character & H_CPU_CHAR_L1D_FLUSH_TRIG2) 570 security_ftr_set(SEC_FTR_L1D_FLUSH_TRIG2); 571 572 if (result->character & H_CPU_CHAR_L1D_THREAD_PRIV) 573 security_ftr_set(SEC_FTR_L1D_THREAD_PRIV); 574 575 if (result->character & H_CPU_CHAR_COUNT_CACHE_DISABLED) 576 security_ftr_set(SEC_FTR_COUNT_CACHE_DISABLED); 577 578 if (result->character & H_CPU_CHAR_BCCTR_FLUSH_ASSIST) 579 security_ftr_set(SEC_FTR_BCCTR_FLUSH_ASSIST); 580 581 if (result->character & H_CPU_CHAR_BCCTR_LINK_FLUSH_ASSIST) 582 security_ftr_set(SEC_FTR_BCCTR_LINK_FLUSH_ASSIST); 583 584 if (result->behaviour & H_CPU_BEHAV_FLUSH_COUNT_CACHE) 585 security_ftr_set(SEC_FTR_FLUSH_COUNT_CACHE); 586 587 if (result->behaviour & H_CPU_BEHAV_FLUSH_LINK_STACK) 588 security_ftr_set(SEC_FTR_FLUSH_LINK_STACK); 589 590 /* 591 * The features below are enabled by default, so we instead look to see 592 * if firmware has *disabled* them, and clear them if so. 593 * H_CPU_BEHAV_FAVOUR_SECURITY_H could be set only if 594 * H_CPU_BEHAV_FAVOUR_SECURITY is. 595 */ 596 if (!(result->behaviour & H_CPU_BEHAV_FAVOUR_SECURITY)) { 597 security_ftr_clear(SEC_FTR_FAVOUR_SECURITY); 598 pseries_security_flavor = 0; 599 } else if (result->behaviour & H_CPU_BEHAV_FAVOUR_SECURITY_H) 600 pseries_security_flavor = 1; 601 else 602 pseries_security_flavor = 2; 603 604 if (!(result->behaviour & H_CPU_BEHAV_L1D_FLUSH_PR)) 605 security_ftr_clear(SEC_FTR_L1D_FLUSH_PR); 606 607 if (result->behaviour & H_CPU_BEHAV_NO_L1D_FLUSH_ENTRY) 608 security_ftr_clear(SEC_FTR_L1D_FLUSH_ENTRY); 609 610 if (result->behaviour & H_CPU_BEHAV_NO_L1D_FLUSH_UACCESS) 611 security_ftr_clear(SEC_FTR_L1D_FLUSH_UACCESS); 612 613 if (result->behaviour & H_CPU_BEHAV_NO_STF_BARRIER) 614 security_ftr_clear(SEC_FTR_STF_BARRIER); 615 616 if (!(result->behaviour & H_CPU_BEHAV_BNDS_CHK_SPEC_BAR)) 617 security_ftr_clear(SEC_FTR_BNDS_CHK_SPEC_BAR); 618 } 619 620 void pseries_setup_security_mitigations(void) 621 { 622 struct h_cpu_char_result result; 623 enum l1d_flush_type types; 624 bool enable; 625 long rc; 626 627 /* 628 * Set features to the defaults assumed by init_cpu_char_feature_flags() 629 * so it can set/clear again any features that might have changed after 630 * migration, and in case the hypercall fails and it is not even called. 631 */ 632 powerpc_security_features = SEC_FTR_DEFAULT; 633 634 rc = plpar_get_cpu_characteristics(&result); 635 if (rc == H_SUCCESS) 636 init_cpu_char_feature_flags(&result); 637 638 /* 639 * We're the guest so this doesn't apply to us, clear it to simplify 640 * handling of it elsewhere. 641 */ 642 security_ftr_clear(SEC_FTR_L1D_FLUSH_HV); 643 644 types = L1D_FLUSH_FALLBACK; 645 646 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_TRIG2)) 647 types |= L1D_FLUSH_MTTRIG; 648 649 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_ORI30)) 650 types |= L1D_FLUSH_ORI; 651 652 enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && \ 653 security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR); 654 655 setup_rfi_flush(types, enable); 656 setup_count_cache_flush(); 657 658 enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && 659 security_ftr_enabled(SEC_FTR_L1D_FLUSH_ENTRY); 660 setup_entry_flush(enable); 661 662 enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && 663 security_ftr_enabled(SEC_FTR_L1D_FLUSH_UACCESS); 664 setup_uaccess_flush(enable); 665 666 setup_stf_barrier(); 667 } 668 669 #ifdef CONFIG_PCI_IOV 670 enum rtas_iov_fw_value_map { 671 NUM_RES_PROPERTY = 0, /* Number of Resources */ 672 LOW_INT = 1, /* Lowest 32 bits of Address */ 673 START_OF_ENTRIES = 2, /* Always start of entry */ 674 APERTURE_PROPERTY = 2, /* Start of entry+ to Aperture Size */ 675 WDW_SIZE_PROPERTY = 4, /* Start of entry+ to Window Size */ 676 NEXT_ENTRY = 7 /* Go to next entry on array */ 677 }; 678 679 enum get_iov_fw_value_index { 680 BAR_ADDRS = 1, /* Get Bar Address */ 681 APERTURE_SIZE = 2, /* Get Aperture Size */ 682 WDW_SIZE = 3 /* Get Window Size */ 683 }; 684 685 static resource_size_t pseries_get_iov_fw_value(const struct pci_dev *dev, 686 int resno, 687 enum get_iov_fw_value_index value) 688 { 689 const int *indexes; 690 struct device_node *dn = pci_device_to_OF_node(dev); 691 int i, num_res, ret = 0; 692 693 indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL); 694 if (!indexes) 695 return 0; 696 697 /* 698 * First element in the array is the number of Bars 699 * returned. Search through the list to find the matching 700 * bar 701 */ 702 num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1); 703 if (resno >= num_res) 704 return 0; /* or an error */ 705 706 i = START_OF_ENTRIES + NEXT_ENTRY * resno; 707 switch (value) { 708 case BAR_ADDRS: 709 ret = of_read_number(&indexes[i], 2); 710 break; 711 case APERTURE_SIZE: 712 ret = of_read_number(&indexes[i + APERTURE_PROPERTY], 2); 713 break; 714 case WDW_SIZE: 715 ret = of_read_number(&indexes[i + WDW_SIZE_PROPERTY], 2); 716 break; 717 } 718 719 return ret; 720 } 721 722 static void of_pci_set_vf_bar_size(struct pci_dev *dev, const int *indexes) 723 { 724 struct resource *res; 725 resource_size_t base, size; 726 int i, r, num_res; 727 728 num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1); 729 num_res = min_t(int, num_res, PCI_SRIOV_NUM_BARS); 730 for (i = START_OF_ENTRIES, r = 0; r < num_res && r < PCI_SRIOV_NUM_BARS; 731 i += NEXT_ENTRY, r++) { 732 res = &dev->resource[r + PCI_IOV_RESOURCES]; 733 base = of_read_number(&indexes[i], 2); 734 size = of_read_number(&indexes[i + APERTURE_PROPERTY], 2); 735 res->flags = pci_parse_of_flags(of_read_number 736 (&indexes[i + LOW_INT], 1), 0); 737 res->flags |= (IORESOURCE_MEM_64 | IORESOURCE_PCI_FIXED); 738 res->name = pci_name(dev); 739 res->start = base; 740 res->end = base + size - 1; 741 } 742 } 743 744 static void of_pci_parse_iov_addrs(struct pci_dev *dev, const int *indexes) 745 { 746 struct resource *res, *root, *conflict; 747 resource_size_t base, size; 748 int i, r, num_res; 749 750 /* 751 * First element in the array is the number of Bars 752 * returned. Search through the list to find the matching 753 * bars assign them from firmware into resources structure. 754 */ 755 num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1); 756 for (i = START_OF_ENTRIES, r = 0; r < num_res && r < PCI_SRIOV_NUM_BARS; 757 i += NEXT_ENTRY, r++) { 758 res = &dev->resource[r + PCI_IOV_RESOURCES]; 759 base = of_read_number(&indexes[i], 2); 760 size = of_read_number(&indexes[i + WDW_SIZE_PROPERTY], 2); 761 res->name = pci_name(dev); 762 res->start = base; 763 res->end = base + size - 1; 764 root = &iomem_resource; 765 dev_dbg(&dev->dev, 766 "pSeries IOV BAR %d: trying firmware assignment %pR\n", 767 r + PCI_IOV_RESOURCES, res); 768 conflict = request_resource_conflict(root, res); 769 if (conflict) { 770 dev_info(&dev->dev, 771 "BAR %d: %pR conflicts with %s %pR\n", 772 r + PCI_IOV_RESOURCES, res, 773 conflict->name, conflict); 774 res->flags |= IORESOURCE_UNSET; 775 } 776 } 777 } 778 779 static void pseries_disable_sriov_resources(struct pci_dev *pdev) 780 { 781 int i; 782 783 pci_warn(pdev, "No hypervisor support for SR-IOV on this device, IOV BARs disabled.\n"); 784 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) 785 pdev->resource[i + PCI_IOV_RESOURCES].flags = 0; 786 } 787 788 static void pseries_pci_fixup_resources(struct pci_dev *pdev) 789 { 790 const int *indexes; 791 struct device_node *dn = pci_device_to_OF_node(pdev); 792 793 /*Firmware must support open sriov otherwise dont configure*/ 794 indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL); 795 if (indexes) 796 of_pci_set_vf_bar_size(pdev, indexes); 797 else 798 pseries_disable_sriov_resources(pdev); 799 } 800 801 static void pseries_pci_fixup_iov_resources(struct pci_dev *pdev) 802 { 803 const int *indexes; 804 struct device_node *dn = pci_device_to_OF_node(pdev); 805 806 if (!pdev->is_physfn) 807 return; 808 /*Firmware must support open sriov otherwise don't configure*/ 809 indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL); 810 if (indexes) 811 of_pci_parse_iov_addrs(pdev, indexes); 812 else 813 pseries_disable_sriov_resources(pdev); 814 } 815 816 static resource_size_t pseries_pci_iov_resource_alignment(const struct pci_dev *pdev, 817 int resno) 818 { 819 const __be32 *reg; 820 struct device_node *dn = pci_device_to_OF_node(pdev); 821 822 /*Firmware must support open sriov otherwise report regular alignment*/ 823 reg = of_get_property(dn, "ibm,is-open-sriov-pf", NULL); 824 if (!reg) 825 return pci_iov_resource_size(pdev, resno); 826 827 if (!pdev->is_physfn) 828 return 0; 829 return pseries_get_iov_fw_value(pdev, 830 resno - PCI_IOV_RESOURCES, 831 APERTURE_SIZE); 832 } 833 #endif 834 835 static void __init pSeries_setup_arch(void) 836 { 837 set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT); 838 839 /* Discover PIC type and setup ppc_md accordingly */ 840 smp_init_pseries(); 841 842 // Setup CPU hotplug callbacks 843 pseries_cpu_hotplug_init(); 844 845 if (radix_enabled() && !mmu_has_feature(MMU_FTR_GTSE)) 846 if (!firmware_has_feature(FW_FEATURE_RPT_INVALIDATE)) 847 panic("BUG: Radix support requires either GTSE or RPT_INVALIDATE\n"); 848 849 850 /* openpic global configuration register (64-bit format). */ 851 /* openpic Interrupt Source Unit pointer (64-bit format). */ 852 /* python0 facility area (mmio) (64-bit format) REAL address. */ 853 854 /* init to some ~sane value until calibrate_delay() runs */ 855 loops_per_jiffy = 50000000; 856 857 fwnmi_init(); 858 859 pseries_setup_security_mitigations(); 860 if (!radix_enabled()) 861 pseries_lpar_read_hblkrm_characteristics(); 862 863 /* By default, only probe PCI (can be overridden by rtas_pci) */ 864 pci_add_flags(PCI_PROBE_ONLY); 865 866 /* Find and initialize PCI host bridges */ 867 init_pci_config_tokens(); 868 of_reconfig_notifier_register(&pci_dn_reconfig_nb); 869 870 pSeries_nvram_init(); 871 872 if (firmware_has_feature(FW_FEATURE_LPAR)) { 873 vpa_init(boot_cpuid); 874 875 if (lppaca_shared_proc()) { 876 static_branch_enable(&shared_processor); 877 pv_spinlocks_init(); 878 #ifdef CONFIG_PARAVIRT_TIME_ACCOUNTING 879 static_key_slow_inc(¶virt_steal_enabled); 880 if (steal_acc) 881 static_key_slow_inc(¶virt_steal_rq_enabled); 882 #endif 883 } 884 885 ppc_md.power_save = pseries_lpar_idle; 886 ppc_md.enable_pmcs = pseries_lpar_enable_pmcs; 887 #ifdef CONFIG_PCI_IOV 888 ppc_md.pcibios_fixup_resources = 889 pseries_pci_fixup_resources; 890 ppc_md.pcibios_fixup_sriov = 891 pseries_pci_fixup_iov_resources; 892 ppc_md.pcibios_iov_resource_alignment = 893 pseries_pci_iov_resource_alignment; 894 #endif 895 } else { 896 /* No special idle routine */ 897 ppc_md.enable_pmcs = power4_enable_pmcs; 898 } 899 900 ppc_md.pcibios_root_bridge_prepare = pseries_root_bridge_prepare; 901 pseries_rng_init(); 902 } 903 904 static void pseries_panic(char *str) 905 { 906 panic_flush_kmsg_end(); 907 rtas_os_term(str); 908 } 909 910 static int __init pSeries_init_panel(void) 911 { 912 /* Manually leave the kernel version on the panel. */ 913 #ifdef __BIG_ENDIAN__ 914 ppc_md.progress("Linux ppc64\n", 0); 915 #else 916 ppc_md.progress("Linux ppc64le\n", 0); 917 #endif 918 ppc_md.progress(init_utsname()->version, 0); 919 920 return 0; 921 } 922 machine_arch_initcall(pseries, pSeries_init_panel); 923 924 static int pseries_set_dabr(unsigned long dabr, unsigned long dabrx) 925 { 926 return plpar_hcall_norets(H_SET_DABR, dabr); 927 } 928 929 static int pseries_set_xdabr(unsigned long dabr, unsigned long dabrx) 930 { 931 /* Have to set at least one bit in the DABRX according to PAPR */ 932 if (dabrx == 0 && dabr == 0) 933 dabrx = DABRX_USER; 934 /* PAPR says we can only set kernel and user bits */ 935 dabrx &= DABRX_KERNEL | DABRX_USER; 936 937 return plpar_hcall_norets(H_SET_XDABR, dabr, dabrx); 938 } 939 940 static int pseries_set_dawr(int nr, unsigned long dawr, unsigned long dawrx) 941 { 942 /* PAPR says we can't set HYP */ 943 dawrx &= ~DAWRX_HYP; 944 945 if (nr == 0) 946 return plpar_set_watchpoint0(dawr, dawrx); 947 else 948 return plpar_set_watchpoint1(dawr, dawrx); 949 } 950 951 #define CMO_CHARACTERISTICS_TOKEN 44 952 #define CMO_MAXLENGTH 1026 953 954 void pSeries_coalesce_init(void) 955 { 956 struct hvcall_mpp_x_data mpp_x_data; 957 958 if (firmware_has_feature(FW_FEATURE_CMO) && !h_get_mpp_x(&mpp_x_data)) 959 powerpc_firmware_features |= FW_FEATURE_XCMO; 960 else 961 powerpc_firmware_features &= ~FW_FEATURE_XCMO; 962 } 963 964 /** 965 * fw_cmo_feature_init - FW_FEATURE_CMO is not stored in ibm,hypertas-functions, 966 * handle that here. (Stolen from parse_system_parameter_string) 967 */ 968 static void __init pSeries_cmo_feature_init(void) 969 { 970 static struct papr_sysparm_buf buf __initdata; 971 static_assert(sizeof(buf.val) >= CMO_MAXLENGTH); 972 char *ptr, *key, *value, *end; 973 int page_order = IOMMU_PAGE_SHIFT_4K; 974 975 pr_debug(" -> fw_cmo_feature_init()\n"); 976 977 if (papr_sysparm_get(PAPR_SYSPARM_COOP_MEM_OVERCOMMIT_ATTRS, &buf)) { 978 pr_debug("CMO not available\n"); 979 pr_debug(" <- fw_cmo_feature_init()\n"); 980 return; 981 } 982 983 end = &buf.val[CMO_MAXLENGTH]; 984 ptr = &buf.val[0]; 985 key = value = ptr; 986 987 while (*ptr && (ptr <= end)) { 988 /* Separate the key and value by replacing '=' with '\0' and 989 * point the value at the string after the '=' 990 */ 991 if (ptr[0] == '=') { 992 ptr[0] = '\0'; 993 value = ptr + 1; 994 } else if (ptr[0] == '\0' || ptr[0] == ',') { 995 /* Terminate the string containing the key/value pair */ 996 ptr[0] = '\0'; 997 998 if (key == value) { 999 pr_debug("Malformed key/value pair\n"); 1000 /* Never found a '=', end processing */ 1001 break; 1002 } 1003 1004 if (0 == strcmp(key, "CMOPageSize")) 1005 page_order = simple_strtol(value, NULL, 10); 1006 else if (0 == strcmp(key, "PrPSP")) 1007 CMO_PrPSP = simple_strtol(value, NULL, 10); 1008 else if (0 == strcmp(key, "SecPSP")) 1009 CMO_SecPSP = simple_strtol(value, NULL, 10); 1010 value = key = ptr + 1; 1011 } 1012 ptr++; 1013 } 1014 1015 /* Page size is returned as the power of 2 of the page size, 1016 * convert to the page size in bytes before returning 1017 */ 1018 CMO_PageSize = 1 << page_order; 1019 pr_debug("CMO_PageSize = %lu\n", CMO_PageSize); 1020 1021 if (CMO_PrPSP != -1 || CMO_SecPSP != -1) { 1022 pr_info("CMO enabled\n"); 1023 pr_debug("CMO enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP, 1024 CMO_SecPSP); 1025 powerpc_firmware_features |= FW_FEATURE_CMO; 1026 pSeries_coalesce_init(); 1027 } else 1028 pr_debug("CMO not enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP, 1029 CMO_SecPSP); 1030 pr_debug(" <- fw_cmo_feature_init()\n"); 1031 } 1032 1033 static void __init pseries_add_hw_description(void) 1034 { 1035 struct device_node *dn; 1036 const char *s; 1037 1038 dn = of_find_node_by_path("/openprom"); 1039 if (dn) { 1040 if (of_property_read_string(dn, "model", &s) == 0) 1041 seq_buf_printf(&ppc_hw_desc, "of:%s ", s); 1042 1043 of_node_put(dn); 1044 } 1045 1046 dn = of_find_node_by_path("/hypervisor"); 1047 if (dn) { 1048 if (of_property_read_string(dn, "compatible", &s) == 0) 1049 seq_buf_printf(&ppc_hw_desc, "hv:%s ", s); 1050 1051 of_node_put(dn); 1052 return; 1053 } 1054 1055 dn = of_find_node_by_path("/"); 1056 if (of_property_read_bool(dn, "ibm,powervm-partition") || 1057 of_property_read_bool(dn, "ibm,fw-net-version")) 1058 seq_buf_printf(&ppc_hw_desc, "hv:phyp "); 1059 of_node_put(dn); 1060 } 1061 1062 /* 1063 * Early initialization. Relocation is on but do not reference unbolted pages 1064 */ 1065 static void __init pseries_init(void) 1066 { 1067 pr_debug(" -> pseries_init()\n"); 1068 1069 pseries_add_hw_description(); 1070 1071 #ifdef CONFIG_HVC_CONSOLE 1072 if (firmware_has_feature(FW_FEATURE_LPAR)) 1073 hvc_vio_init_early(); 1074 #endif 1075 if (firmware_has_feature(FW_FEATURE_XDABR)) 1076 ppc_md.set_dabr = pseries_set_xdabr; 1077 else if (firmware_has_feature(FW_FEATURE_DABR)) 1078 ppc_md.set_dabr = pseries_set_dabr; 1079 1080 if (firmware_has_feature(FW_FEATURE_SET_MODE)) 1081 ppc_md.set_dawr = pseries_set_dawr; 1082 1083 pSeries_cmo_feature_init(); 1084 iommu_init_early_pSeries(); 1085 1086 pr_debug(" <- pseries_init()\n"); 1087 } 1088 1089 /** 1090 * pseries_power_off - tell firmware about how to power off the system. 1091 * 1092 * This function calls either the power-off rtas token in normal cases 1093 * or the ibm,power-off-ups token (if present & requested) in case of 1094 * a power failure. If power-off token is used, power on will only be 1095 * possible with power button press. If ibm,power-off-ups token is used 1096 * it will allow auto poweron after power is restored. 1097 */ 1098 static void pseries_power_off(void) 1099 { 1100 int rc; 1101 int rtas_poweroff_ups_token = rtas_function_token(RTAS_FN_IBM_POWER_OFF_UPS); 1102 1103 if (rtas_flash_term_hook) 1104 rtas_flash_term_hook(SYS_POWER_OFF); 1105 1106 if (rtas_poweron_auto == 0 || 1107 rtas_poweroff_ups_token == RTAS_UNKNOWN_SERVICE) { 1108 rc = rtas_call(rtas_function_token(RTAS_FN_POWER_OFF), 2, 1, NULL, -1, -1); 1109 printk(KERN_INFO "RTAS power-off returned %d\n", rc); 1110 } else { 1111 rc = rtas_call(rtas_poweroff_ups_token, 0, 1, NULL); 1112 printk(KERN_INFO "RTAS ibm,power-off-ups returned %d\n", rc); 1113 } 1114 for (;;); 1115 } 1116 1117 static int __init pSeries_probe(void) 1118 { 1119 struct device_node *root = of_find_node_by_path("/"); 1120 bool ret = of_node_is_type(root, "chrp"); 1121 1122 of_node_put(root); 1123 if (!ret) 1124 return 0; 1125 1126 /* Cell blades firmware claims to be chrp while it's not. Until this 1127 * is fixed, we need to avoid those here. 1128 */ 1129 if (of_machine_is_compatible("IBM,CPBW-1.0") || 1130 of_machine_is_compatible("IBM,CBEA")) 1131 return 0; 1132 1133 pm_power_off = pseries_power_off; 1134 1135 pr_debug("Machine is%s LPAR !\n", 1136 (powerpc_firmware_features & FW_FEATURE_LPAR) ? "" : " not"); 1137 1138 pseries_init(); 1139 1140 return 1; 1141 } 1142 1143 static int pSeries_pci_probe_mode(struct pci_bus *bus) 1144 { 1145 if (firmware_has_feature(FW_FEATURE_LPAR)) 1146 return PCI_PROBE_DEVTREE; 1147 return PCI_PROBE_NORMAL; 1148 } 1149 1150 #ifdef CONFIG_MEMORY_HOTPLUG 1151 static unsigned long pseries_memory_block_size(void) 1152 { 1153 return memory_block_size; 1154 } 1155 #endif 1156 1157 struct pci_controller_ops pseries_pci_controller_ops = { 1158 .probe_mode = pSeries_pci_probe_mode, 1159 #ifdef CONFIG_SPAPR_TCE_IOMMU 1160 .device_group = pSeries_pci_device_group, 1161 #endif 1162 }; 1163 1164 define_machine(pseries) { 1165 .name = "pSeries", 1166 .probe = pSeries_probe, 1167 .setup_arch = pSeries_setup_arch, 1168 .init_IRQ = pseries_init_irq, 1169 .show_cpuinfo = pSeries_show_cpuinfo, 1170 .log_error = pSeries_log_error, 1171 .discover_phbs = pSeries_discover_phbs, 1172 .pcibios_fixup = pSeries_final_fixup, 1173 .restart = rtas_restart, 1174 .halt = rtas_halt, 1175 .panic = pseries_panic, 1176 .get_boot_time = rtas_get_boot_time, 1177 .get_rtc_time = rtas_get_rtc_time, 1178 .set_rtc_time = rtas_set_rtc_time, 1179 .progress = rtas_progress, 1180 .system_reset_exception = pSeries_system_reset_exception, 1181 .machine_check_early = pseries_machine_check_realmode, 1182 .machine_check_exception = pSeries_machine_check_exception, 1183 .machine_check_log_err = pSeries_machine_check_log_err, 1184 #ifdef CONFIG_KEXEC_CORE 1185 .kexec_cpu_down = pseries_kexec_cpu_down, 1186 #endif 1187 #ifdef CONFIG_MEMORY_HOTPLUG 1188 .memory_block_size = pseries_memory_block_size, 1189 #endif 1190 }; 1191