1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * 64-bit pSeries and RS/6000 setup code. 4 * 5 * Copyright (C) 1995 Linus Torvalds 6 * Adapted from 'alpha' version by Gary Thomas 7 * Modified by Cort Dougan (cort@cs.nmt.edu) 8 * Modified by PPC64 Team, IBM Corp 9 */ 10 11 /* 12 * bootup setup stuff.. 13 */ 14 15 #include <linux/cpu.h> 16 #include <linux/errno.h> 17 #include <linux/sched.h> 18 #include <linux/kernel.h> 19 #include <linux/mm.h> 20 #include <linux/stddef.h> 21 #include <linux/unistd.h> 22 #include <linux/user.h> 23 #include <linux/tty.h> 24 #include <linux/major.h> 25 #include <linux/interrupt.h> 26 #include <linux/reboot.h> 27 #include <linux/init.h> 28 #include <linux/ioport.h> 29 #include <linux/console.h> 30 #include <linux/pci.h> 31 #include <linux/utsname.h> 32 #include <linux/adb.h> 33 #include <linux/export.h> 34 #include <linux/delay.h> 35 #include <linux/irq.h> 36 #include <linux/seq_file.h> 37 #include <linux/root_dev.h> 38 #include <linux/of.h> 39 #include <linux/of_pci.h> 40 #include <linux/memblock.h> 41 #include <linux/swiotlb.h> 42 43 #include <asm/mmu.h> 44 #include <asm/processor.h> 45 #include <asm/io.h> 46 #include <asm/pgtable.h> 47 #include <asm/prom.h> 48 #include <asm/rtas.h> 49 #include <asm/pci-bridge.h> 50 #include <asm/iommu.h> 51 #include <asm/dma.h> 52 #include <asm/machdep.h> 53 #include <asm/irq.h> 54 #include <asm/time.h> 55 #include <asm/nvram.h> 56 #include <asm/pmc.h> 57 #include <asm/xics.h> 58 #include <asm/xive.h> 59 #include <asm/ppc-pci.h> 60 #include <asm/i8259.h> 61 #include <asm/udbg.h> 62 #include <asm/smp.h> 63 #include <asm/firmware.h> 64 #include <asm/eeh.h> 65 #include <asm/reg.h> 66 #include <asm/plpar_wrappers.h> 67 #include <asm/kexec.h> 68 #include <asm/isa-bridge.h> 69 #include <asm/security_features.h> 70 #include <asm/asm-const.h> 71 #include <asm/idle.h> 72 #include <asm/swiotlb.h> 73 #include <asm/svm.h> 74 75 #include "pseries.h" 76 #include "../../../../drivers/pci/pci.h" 77 78 DEFINE_STATIC_KEY_FALSE(shared_processor); 79 EXPORT_SYMBOL_GPL(shared_processor); 80 81 int CMO_PrPSP = -1; 82 int CMO_SecPSP = -1; 83 unsigned long CMO_PageSize = (ASM_CONST(1) << IOMMU_PAGE_SHIFT_4K); 84 EXPORT_SYMBOL(CMO_PageSize); 85 86 int fwnmi_active; /* TRUE if an FWNMI handler is present */ 87 88 static void pSeries_show_cpuinfo(struct seq_file *m) 89 { 90 struct device_node *root; 91 const char *model = ""; 92 93 root = of_find_node_by_path("/"); 94 if (root) 95 model = of_get_property(root, "model", NULL); 96 seq_printf(m, "machine\t\t: CHRP %s\n", model); 97 of_node_put(root); 98 if (radix_enabled()) 99 seq_printf(m, "MMU\t\t: Radix\n"); 100 else 101 seq_printf(m, "MMU\t\t: Hash\n"); 102 } 103 104 /* Initialize firmware assisted non-maskable interrupts if 105 * the firmware supports this feature. 106 */ 107 static void __init fwnmi_init(void) 108 { 109 unsigned long system_reset_addr, machine_check_addr; 110 u8 *mce_data_buf; 111 unsigned int i; 112 int nr_cpus = num_possible_cpus(); 113 #ifdef CONFIG_PPC_BOOK3S_64 114 struct slb_entry *slb_ptr; 115 size_t size; 116 #endif 117 118 int ibm_nmi_register = rtas_token("ibm,nmi-register"); 119 if (ibm_nmi_register == RTAS_UNKNOWN_SERVICE) 120 return; 121 122 /* If the kernel's not linked at zero we point the firmware at low 123 * addresses anyway, and use a trampoline to get to the real code. */ 124 system_reset_addr = __pa(system_reset_fwnmi) - PHYSICAL_START; 125 machine_check_addr = __pa(machine_check_fwnmi) - PHYSICAL_START; 126 127 if (0 == rtas_call(ibm_nmi_register, 2, 1, NULL, system_reset_addr, 128 machine_check_addr)) 129 fwnmi_active = 1; 130 131 /* 132 * Allocate a chunk for per cpu buffer to hold rtas errorlog. 133 * It will be used in real mode mce handler, hence it needs to be 134 * below RMA. 135 */ 136 mce_data_buf = memblock_alloc_try_nid_raw(RTAS_ERROR_LOG_MAX * nr_cpus, 137 RTAS_ERROR_LOG_MAX, MEMBLOCK_LOW_LIMIT, 138 ppc64_rma_size, NUMA_NO_NODE); 139 if (!mce_data_buf) 140 panic("Failed to allocate %d bytes below %pa for MCE buffer\n", 141 RTAS_ERROR_LOG_MAX * nr_cpus, &ppc64_rma_size); 142 143 for_each_possible_cpu(i) { 144 paca_ptrs[i]->mce_data_buf = mce_data_buf + 145 (RTAS_ERROR_LOG_MAX * i); 146 } 147 148 #ifdef CONFIG_PPC_BOOK3S_64 149 if (!radix_enabled()) { 150 /* Allocate per cpu area to save old slb contents during MCE */ 151 size = sizeof(struct slb_entry) * mmu_slb_size * nr_cpus; 152 slb_ptr = memblock_alloc_try_nid_raw(size, 153 sizeof(struct slb_entry), MEMBLOCK_LOW_LIMIT, 154 ppc64_rma_size, NUMA_NO_NODE); 155 if (!slb_ptr) 156 panic("Failed to allocate %zu bytes below %pa for slb area\n", 157 size, &ppc64_rma_size); 158 159 for_each_possible_cpu(i) 160 paca_ptrs[i]->mce_faulty_slbs = slb_ptr + (mmu_slb_size * i); 161 } 162 #endif 163 } 164 165 static void pseries_8259_cascade(struct irq_desc *desc) 166 { 167 struct irq_chip *chip = irq_desc_get_chip(desc); 168 unsigned int cascade_irq = i8259_irq(); 169 170 if (cascade_irq) 171 generic_handle_irq(cascade_irq); 172 173 chip->irq_eoi(&desc->irq_data); 174 } 175 176 static void __init pseries_setup_i8259_cascade(void) 177 { 178 struct device_node *np, *old, *found = NULL; 179 unsigned int cascade; 180 const u32 *addrp; 181 unsigned long intack = 0; 182 int naddr; 183 184 for_each_node_by_type(np, "interrupt-controller") { 185 if (of_device_is_compatible(np, "chrp,iic")) { 186 found = np; 187 break; 188 } 189 } 190 191 if (found == NULL) { 192 printk(KERN_DEBUG "pic: no ISA interrupt controller\n"); 193 return; 194 } 195 196 cascade = irq_of_parse_and_map(found, 0); 197 if (!cascade) { 198 printk(KERN_ERR "pic: failed to map cascade interrupt"); 199 return; 200 } 201 pr_debug("pic: cascade mapped to irq %d\n", cascade); 202 203 for (old = of_node_get(found); old != NULL ; old = np) { 204 np = of_get_parent(old); 205 of_node_put(old); 206 if (np == NULL) 207 break; 208 if (!of_node_name_eq(np, "pci")) 209 continue; 210 addrp = of_get_property(np, "8259-interrupt-acknowledge", NULL); 211 if (addrp == NULL) 212 continue; 213 naddr = of_n_addr_cells(np); 214 intack = addrp[naddr-1]; 215 if (naddr > 1) 216 intack |= ((unsigned long)addrp[naddr-2]) << 32; 217 } 218 if (intack) 219 printk(KERN_DEBUG "pic: PCI 8259 intack at 0x%016lx\n", intack); 220 i8259_init(found, intack); 221 of_node_put(found); 222 irq_set_chained_handler(cascade, pseries_8259_cascade); 223 } 224 225 static void __init pseries_init_irq(void) 226 { 227 /* Try using a XIVE if available, otherwise use a XICS */ 228 if (!xive_spapr_init()) { 229 xics_init(); 230 pseries_setup_i8259_cascade(); 231 } 232 } 233 234 static void pseries_lpar_enable_pmcs(void) 235 { 236 unsigned long set, reset; 237 238 set = 1UL << 63; 239 reset = 0; 240 plpar_hcall_norets(H_PERFMON, set, reset); 241 } 242 243 static int pci_dn_reconfig_notifier(struct notifier_block *nb, unsigned long action, void *data) 244 { 245 struct of_reconfig_data *rd = data; 246 struct device_node *parent, *np = rd->dn; 247 struct pci_dn *pdn; 248 int err = NOTIFY_OK; 249 250 switch (action) { 251 case OF_RECONFIG_ATTACH_NODE: 252 parent = of_get_parent(np); 253 pdn = parent ? PCI_DN(parent) : NULL; 254 if (pdn) 255 pci_add_device_node_info(pdn->phb, np); 256 257 of_node_put(parent); 258 break; 259 case OF_RECONFIG_DETACH_NODE: 260 pdn = PCI_DN(np); 261 if (pdn) 262 list_del(&pdn->list); 263 break; 264 default: 265 err = NOTIFY_DONE; 266 break; 267 } 268 return err; 269 } 270 271 static struct notifier_block pci_dn_reconfig_nb = { 272 .notifier_call = pci_dn_reconfig_notifier, 273 }; 274 275 struct kmem_cache *dtl_cache; 276 277 #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE 278 /* 279 * Allocate space for the dispatch trace log for all possible cpus 280 * and register the buffers with the hypervisor. This is used for 281 * computing time stolen by the hypervisor. 282 */ 283 static int alloc_dispatch_logs(void) 284 { 285 if (!firmware_has_feature(FW_FEATURE_SPLPAR)) 286 return 0; 287 288 if (!dtl_cache) 289 return 0; 290 291 alloc_dtl_buffers(0); 292 293 /* Register the DTL for the current (boot) cpu */ 294 register_dtl_buffer(smp_processor_id()); 295 296 return 0; 297 } 298 #else /* !CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */ 299 static inline int alloc_dispatch_logs(void) 300 { 301 return 0; 302 } 303 #endif /* CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */ 304 305 static int alloc_dispatch_log_kmem_cache(void) 306 { 307 void (*ctor)(void *) = get_dtl_cache_ctor(); 308 309 dtl_cache = kmem_cache_create("dtl", DISPATCH_LOG_BYTES, 310 DISPATCH_LOG_BYTES, 0, ctor); 311 if (!dtl_cache) { 312 pr_warn("Failed to create dispatch trace log buffer cache\n"); 313 pr_warn("Stolen time statistics will be unreliable\n"); 314 return 0; 315 } 316 317 return alloc_dispatch_logs(); 318 } 319 machine_early_initcall(pseries, alloc_dispatch_log_kmem_cache); 320 321 DEFINE_PER_CPU(u64, idle_spurr_cycles); 322 DEFINE_PER_CPU(u64, idle_entry_purr_snap); 323 DEFINE_PER_CPU(u64, idle_entry_spurr_snap); 324 static void pseries_lpar_idle(void) 325 { 326 /* 327 * Default handler to go into low thread priority and possibly 328 * low power mode by ceding processor to hypervisor 329 */ 330 331 if (!prep_irq_for_idle()) 332 return; 333 334 /* Indicate to hypervisor that we are idle. */ 335 pseries_idle_prolog(); 336 337 /* 338 * Yield the processor to the hypervisor. We return if 339 * an external interrupt occurs (which are driven prior 340 * to returning here) or if a prod occurs from another 341 * processor. When returning here, external interrupts 342 * are enabled. 343 */ 344 cede_processor(); 345 346 pseries_idle_epilog(); 347 } 348 349 /* 350 * Enable relocation on during exceptions. This has partition wide scope and 351 * may take a while to complete, if it takes longer than one second we will 352 * just give up rather than wasting any more time on this - if that turns out 353 * to ever be a problem in practice we can move this into a kernel thread to 354 * finish off the process later in boot. 355 */ 356 void pseries_enable_reloc_on_exc(void) 357 { 358 long rc; 359 unsigned int delay, total_delay = 0; 360 361 while (1) { 362 rc = enable_reloc_on_exceptions(); 363 if (!H_IS_LONG_BUSY(rc)) { 364 if (rc == H_P2) { 365 pr_info("Relocation on exceptions not" 366 " supported\n"); 367 } else if (rc != H_SUCCESS) { 368 pr_warn("Unable to enable relocation" 369 " on exceptions: %ld\n", rc); 370 } 371 break; 372 } 373 374 delay = get_longbusy_msecs(rc); 375 total_delay += delay; 376 if (total_delay > 1000) { 377 pr_warn("Warning: Giving up waiting to enable " 378 "relocation on exceptions (%u msec)!\n", 379 total_delay); 380 return; 381 } 382 383 mdelay(delay); 384 } 385 } 386 EXPORT_SYMBOL(pseries_enable_reloc_on_exc); 387 388 void pseries_disable_reloc_on_exc(void) 389 { 390 long rc; 391 392 while (1) { 393 rc = disable_reloc_on_exceptions(); 394 if (!H_IS_LONG_BUSY(rc)) 395 break; 396 mdelay(get_longbusy_msecs(rc)); 397 } 398 if (rc != H_SUCCESS) 399 pr_warn("Warning: Failed to disable relocation on exceptions: %ld\n", 400 rc); 401 } 402 EXPORT_SYMBOL(pseries_disable_reloc_on_exc); 403 404 #ifdef CONFIG_KEXEC_CORE 405 static void pSeries_machine_kexec(struct kimage *image) 406 { 407 if (firmware_has_feature(FW_FEATURE_SET_MODE)) 408 pseries_disable_reloc_on_exc(); 409 410 default_machine_kexec(image); 411 } 412 #endif 413 414 #ifdef __LITTLE_ENDIAN__ 415 void pseries_big_endian_exceptions(void) 416 { 417 long rc; 418 419 while (1) { 420 rc = enable_big_endian_exceptions(); 421 if (!H_IS_LONG_BUSY(rc)) 422 break; 423 mdelay(get_longbusy_msecs(rc)); 424 } 425 426 /* 427 * At this point it is unlikely panic() will get anything 428 * out to the user, since this is called very late in kexec 429 * but at least this will stop us from continuing on further 430 * and creating an even more difficult to debug situation. 431 * 432 * There is a known problem when kdump'ing, if cpus are offline 433 * the above call will fail. Rather than panicking again, keep 434 * going and hope the kdump kernel is also little endian, which 435 * it usually is. 436 */ 437 if (rc && !kdump_in_progress()) 438 panic("Could not enable big endian exceptions"); 439 } 440 441 void pseries_little_endian_exceptions(void) 442 { 443 long rc; 444 445 while (1) { 446 rc = enable_little_endian_exceptions(); 447 if (!H_IS_LONG_BUSY(rc)) 448 break; 449 mdelay(get_longbusy_msecs(rc)); 450 } 451 if (rc) { 452 ppc_md.progress("H_SET_MODE LE exception fail", 0); 453 panic("Could not enable little endian exceptions"); 454 } 455 } 456 #endif 457 458 static void __init find_and_init_phbs(void) 459 { 460 struct device_node *node; 461 struct pci_controller *phb; 462 struct device_node *root = of_find_node_by_path("/"); 463 464 for_each_child_of_node(root, node) { 465 if (!of_node_is_type(node, "pci") && 466 !of_node_is_type(node, "pciex")) 467 continue; 468 469 phb = pcibios_alloc_controller(node); 470 if (!phb) 471 continue; 472 rtas_setup_phb(phb); 473 pci_process_bridge_OF_ranges(phb, node, 0); 474 isa_bridge_find_early(phb); 475 phb->controller_ops = pseries_pci_controller_ops; 476 } 477 478 of_node_put(root); 479 480 /* 481 * PCI_PROBE_ONLY and PCI_REASSIGN_ALL_BUS can be set via properties 482 * in chosen. 483 */ 484 of_pci_check_probe_only(); 485 } 486 487 static void init_cpu_char_feature_flags(struct h_cpu_char_result *result) 488 { 489 /* 490 * The features below are disabled by default, so we instead look to see 491 * if firmware has *enabled* them, and set them if so. 492 */ 493 if (result->character & H_CPU_CHAR_SPEC_BAR_ORI31) 494 security_ftr_set(SEC_FTR_SPEC_BAR_ORI31); 495 496 if (result->character & H_CPU_CHAR_BCCTRL_SERIALISED) 497 security_ftr_set(SEC_FTR_BCCTRL_SERIALISED); 498 499 if (result->character & H_CPU_CHAR_L1D_FLUSH_ORI30) 500 security_ftr_set(SEC_FTR_L1D_FLUSH_ORI30); 501 502 if (result->character & H_CPU_CHAR_L1D_FLUSH_TRIG2) 503 security_ftr_set(SEC_FTR_L1D_FLUSH_TRIG2); 504 505 if (result->character & H_CPU_CHAR_L1D_THREAD_PRIV) 506 security_ftr_set(SEC_FTR_L1D_THREAD_PRIV); 507 508 if (result->character & H_CPU_CHAR_COUNT_CACHE_DISABLED) 509 security_ftr_set(SEC_FTR_COUNT_CACHE_DISABLED); 510 511 if (result->character & H_CPU_CHAR_BCCTR_FLUSH_ASSIST) 512 security_ftr_set(SEC_FTR_BCCTR_FLUSH_ASSIST); 513 514 if (result->behaviour & H_CPU_BEHAV_FLUSH_COUNT_CACHE) 515 security_ftr_set(SEC_FTR_FLUSH_COUNT_CACHE); 516 517 /* 518 * The features below are enabled by default, so we instead look to see 519 * if firmware has *disabled* them, and clear them if so. 520 */ 521 if (!(result->behaviour & H_CPU_BEHAV_FAVOUR_SECURITY)) 522 security_ftr_clear(SEC_FTR_FAVOUR_SECURITY); 523 524 if (!(result->behaviour & H_CPU_BEHAV_L1D_FLUSH_PR)) 525 security_ftr_clear(SEC_FTR_L1D_FLUSH_PR); 526 527 if (!(result->behaviour & H_CPU_BEHAV_BNDS_CHK_SPEC_BAR)) 528 security_ftr_clear(SEC_FTR_BNDS_CHK_SPEC_BAR); 529 } 530 531 void pseries_setup_rfi_flush(void) 532 { 533 struct h_cpu_char_result result; 534 enum l1d_flush_type types; 535 bool enable; 536 long rc; 537 538 /* 539 * Set features to the defaults assumed by init_cpu_char_feature_flags() 540 * so it can set/clear again any features that might have changed after 541 * migration, and in case the hypercall fails and it is not even called. 542 */ 543 powerpc_security_features = SEC_FTR_DEFAULT; 544 545 rc = plpar_get_cpu_characteristics(&result); 546 if (rc == H_SUCCESS) 547 init_cpu_char_feature_flags(&result); 548 549 /* 550 * We're the guest so this doesn't apply to us, clear it to simplify 551 * handling of it elsewhere. 552 */ 553 security_ftr_clear(SEC_FTR_L1D_FLUSH_HV); 554 555 types = L1D_FLUSH_FALLBACK; 556 557 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_TRIG2)) 558 types |= L1D_FLUSH_MTTRIG; 559 560 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_ORI30)) 561 types |= L1D_FLUSH_ORI; 562 563 enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && \ 564 security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR); 565 566 setup_rfi_flush(types, enable); 567 setup_count_cache_flush(); 568 } 569 570 #ifdef CONFIG_PCI_IOV 571 enum rtas_iov_fw_value_map { 572 NUM_RES_PROPERTY = 0, /* Number of Resources */ 573 LOW_INT = 1, /* Lowest 32 bits of Address */ 574 START_OF_ENTRIES = 2, /* Always start of entry */ 575 APERTURE_PROPERTY = 2, /* Start of entry+ to Aperture Size */ 576 WDW_SIZE_PROPERTY = 4, /* Start of entry+ to Window Size */ 577 NEXT_ENTRY = 7 /* Go to next entry on array */ 578 }; 579 580 enum get_iov_fw_value_index { 581 BAR_ADDRS = 1, /* Get Bar Address */ 582 APERTURE_SIZE = 2, /* Get Aperture Size */ 583 WDW_SIZE = 3 /* Get Window Size */ 584 }; 585 586 resource_size_t pseries_get_iov_fw_value(struct pci_dev *dev, int resno, 587 enum get_iov_fw_value_index value) 588 { 589 const int *indexes; 590 struct device_node *dn = pci_device_to_OF_node(dev); 591 int i, num_res, ret = 0; 592 593 indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL); 594 if (!indexes) 595 return 0; 596 597 /* 598 * First element in the array is the number of Bars 599 * returned. Search through the list to find the matching 600 * bar 601 */ 602 num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1); 603 if (resno >= num_res) 604 return 0; /* or an errror */ 605 606 i = START_OF_ENTRIES + NEXT_ENTRY * resno; 607 switch (value) { 608 case BAR_ADDRS: 609 ret = of_read_number(&indexes[i], 2); 610 break; 611 case APERTURE_SIZE: 612 ret = of_read_number(&indexes[i + APERTURE_PROPERTY], 2); 613 break; 614 case WDW_SIZE: 615 ret = of_read_number(&indexes[i + WDW_SIZE_PROPERTY], 2); 616 break; 617 } 618 619 return ret; 620 } 621 622 void of_pci_set_vf_bar_size(struct pci_dev *dev, const int *indexes) 623 { 624 struct resource *res; 625 resource_size_t base, size; 626 int i, r, num_res; 627 628 num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1); 629 num_res = min_t(int, num_res, PCI_SRIOV_NUM_BARS); 630 for (i = START_OF_ENTRIES, r = 0; r < num_res && r < PCI_SRIOV_NUM_BARS; 631 i += NEXT_ENTRY, r++) { 632 res = &dev->resource[r + PCI_IOV_RESOURCES]; 633 base = of_read_number(&indexes[i], 2); 634 size = of_read_number(&indexes[i + APERTURE_PROPERTY], 2); 635 res->flags = pci_parse_of_flags(of_read_number 636 (&indexes[i + LOW_INT], 1), 0); 637 res->flags |= (IORESOURCE_MEM_64 | IORESOURCE_PCI_FIXED); 638 res->name = pci_name(dev); 639 res->start = base; 640 res->end = base + size - 1; 641 } 642 } 643 644 void of_pci_parse_iov_addrs(struct pci_dev *dev, const int *indexes) 645 { 646 struct resource *res, *root, *conflict; 647 resource_size_t base, size; 648 int i, r, num_res; 649 650 /* 651 * First element in the array is the number of Bars 652 * returned. Search through the list to find the matching 653 * bars assign them from firmware into resources structure. 654 */ 655 num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1); 656 for (i = START_OF_ENTRIES, r = 0; r < num_res && r < PCI_SRIOV_NUM_BARS; 657 i += NEXT_ENTRY, r++) { 658 res = &dev->resource[r + PCI_IOV_RESOURCES]; 659 base = of_read_number(&indexes[i], 2); 660 size = of_read_number(&indexes[i + WDW_SIZE_PROPERTY], 2); 661 res->name = pci_name(dev); 662 res->start = base; 663 res->end = base + size - 1; 664 root = &iomem_resource; 665 dev_dbg(&dev->dev, 666 "pSeries IOV BAR %d: trying firmware assignment %pR\n", 667 r + PCI_IOV_RESOURCES, res); 668 conflict = request_resource_conflict(root, res); 669 if (conflict) { 670 dev_info(&dev->dev, 671 "BAR %d: %pR conflicts with %s %pR\n", 672 r + PCI_IOV_RESOURCES, res, 673 conflict->name, conflict); 674 res->flags |= IORESOURCE_UNSET; 675 } 676 } 677 } 678 679 static void pseries_disable_sriov_resources(struct pci_dev *pdev) 680 { 681 int i; 682 683 pci_warn(pdev, "No hypervisor support for SR-IOV on this device, IOV BARs disabled.\n"); 684 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) 685 pdev->resource[i + PCI_IOV_RESOURCES].flags = 0; 686 } 687 688 static void pseries_pci_fixup_resources(struct pci_dev *pdev) 689 { 690 const int *indexes; 691 struct device_node *dn = pci_device_to_OF_node(pdev); 692 693 /*Firmware must support open sriov otherwise dont configure*/ 694 indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL); 695 if (indexes) 696 of_pci_set_vf_bar_size(pdev, indexes); 697 else 698 pseries_disable_sriov_resources(pdev); 699 } 700 701 static void pseries_pci_fixup_iov_resources(struct pci_dev *pdev) 702 { 703 const int *indexes; 704 struct device_node *dn = pci_device_to_OF_node(pdev); 705 706 if (!pdev->is_physfn || pci_dev_is_added(pdev)) 707 return; 708 /*Firmware must support open sriov otherwise dont configure*/ 709 indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL); 710 if (indexes) 711 of_pci_parse_iov_addrs(pdev, indexes); 712 else 713 pseries_disable_sriov_resources(pdev); 714 } 715 716 static resource_size_t pseries_pci_iov_resource_alignment(struct pci_dev *pdev, 717 int resno) 718 { 719 const __be32 *reg; 720 struct device_node *dn = pci_device_to_OF_node(pdev); 721 722 /*Firmware must support open sriov otherwise report regular alignment*/ 723 reg = of_get_property(dn, "ibm,is-open-sriov-pf", NULL); 724 if (!reg) 725 return pci_iov_resource_size(pdev, resno); 726 727 if (!pdev->is_physfn) 728 return 0; 729 return pseries_get_iov_fw_value(pdev, 730 resno - PCI_IOV_RESOURCES, 731 APERTURE_SIZE); 732 } 733 #endif 734 735 static void __init pSeries_setup_arch(void) 736 { 737 set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT); 738 739 /* Discover PIC type and setup ppc_md accordingly */ 740 smp_init_pseries(); 741 742 743 /* openpic global configuration register (64-bit format). */ 744 /* openpic Interrupt Source Unit pointer (64-bit format). */ 745 /* python0 facility area (mmio) (64-bit format) REAL address. */ 746 747 /* init to some ~sane value until calibrate_delay() runs */ 748 loops_per_jiffy = 50000000; 749 750 fwnmi_init(); 751 752 pseries_setup_rfi_flush(); 753 setup_stf_barrier(); 754 pseries_lpar_read_hblkrm_characteristics(); 755 756 /* By default, only probe PCI (can be overridden by rtas_pci) */ 757 pci_add_flags(PCI_PROBE_ONLY); 758 759 /* Find and initialize PCI host bridges */ 760 init_pci_config_tokens(); 761 find_and_init_phbs(); 762 of_reconfig_notifier_register(&pci_dn_reconfig_nb); 763 764 pSeries_nvram_init(); 765 766 if (firmware_has_feature(FW_FEATURE_LPAR)) { 767 vpa_init(boot_cpuid); 768 769 if (lppaca_shared_proc(get_lppaca())) 770 static_branch_enable(&shared_processor); 771 772 ppc_md.power_save = pseries_lpar_idle; 773 ppc_md.enable_pmcs = pseries_lpar_enable_pmcs; 774 #ifdef CONFIG_PCI_IOV 775 ppc_md.pcibios_fixup_resources = 776 pseries_pci_fixup_resources; 777 ppc_md.pcibios_fixup_sriov = 778 pseries_pci_fixup_iov_resources; 779 ppc_md.pcibios_iov_resource_alignment = 780 pseries_pci_iov_resource_alignment; 781 #endif 782 } else { 783 /* No special idle routine */ 784 ppc_md.enable_pmcs = power4_enable_pmcs; 785 } 786 787 ppc_md.pcibios_root_bridge_prepare = pseries_root_bridge_prepare; 788 789 if (swiotlb_force == SWIOTLB_FORCE) 790 ppc_swiotlb_enable = 1; 791 } 792 793 static void pseries_panic(char *str) 794 { 795 panic_flush_kmsg_end(); 796 rtas_os_term(str); 797 } 798 799 static int __init pSeries_init_panel(void) 800 { 801 /* Manually leave the kernel version on the panel. */ 802 #ifdef __BIG_ENDIAN__ 803 ppc_md.progress("Linux ppc64\n", 0); 804 #else 805 ppc_md.progress("Linux ppc64le\n", 0); 806 #endif 807 ppc_md.progress(init_utsname()->version, 0); 808 809 return 0; 810 } 811 machine_arch_initcall(pseries, pSeries_init_panel); 812 813 static int pseries_set_dabr(unsigned long dabr, unsigned long dabrx) 814 { 815 return plpar_hcall_norets(H_SET_DABR, dabr); 816 } 817 818 static int pseries_set_xdabr(unsigned long dabr, unsigned long dabrx) 819 { 820 /* Have to set at least one bit in the DABRX according to PAPR */ 821 if (dabrx == 0 && dabr == 0) 822 dabrx = DABRX_USER; 823 /* PAPR says we can only set kernel and user bits */ 824 dabrx &= DABRX_KERNEL | DABRX_USER; 825 826 return plpar_hcall_norets(H_SET_XDABR, dabr, dabrx); 827 } 828 829 static int pseries_set_dawr(unsigned long dawr, unsigned long dawrx) 830 { 831 /* PAPR says we can't set HYP */ 832 dawrx &= ~DAWRX_HYP; 833 834 return plpar_set_watchpoint0(dawr, dawrx); 835 } 836 837 #define CMO_CHARACTERISTICS_TOKEN 44 838 #define CMO_MAXLENGTH 1026 839 840 void pSeries_coalesce_init(void) 841 { 842 struct hvcall_mpp_x_data mpp_x_data; 843 844 if (firmware_has_feature(FW_FEATURE_CMO) && !h_get_mpp_x(&mpp_x_data)) 845 powerpc_firmware_features |= FW_FEATURE_XCMO; 846 else 847 powerpc_firmware_features &= ~FW_FEATURE_XCMO; 848 } 849 850 /** 851 * fw_cmo_feature_init - FW_FEATURE_CMO is not stored in ibm,hypertas-functions, 852 * handle that here. (Stolen from parse_system_parameter_string) 853 */ 854 static void pSeries_cmo_feature_init(void) 855 { 856 char *ptr, *key, *value, *end; 857 int call_status; 858 int page_order = IOMMU_PAGE_SHIFT_4K; 859 860 pr_debug(" -> fw_cmo_feature_init()\n"); 861 spin_lock(&rtas_data_buf_lock); 862 memset(rtas_data_buf, 0, RTAS_DATA_BUF_SIZE); 863 call_status = rtas_call(rtas_token("ibm,get-system-parameter"), 3, 1, 864 NULL, 865 CMO_CHARACTERISTICS_TOKEN, 866 __pa(rtas_data_buf), 867 RTAS_DATA_BUF_SIZE); 868 869 if (call_status != 0) { 870 spin_unlock(&rtas_data_buf_lock); 871 pr_debug("CMO not available\n"); 872 pr_debug(" <- fw_cmo_feature_init()\n"); 873 return; 874 } 875 876 end = rtas_data_buf + CMO_MAXLENGTH - 2; 877 ptr = rtas_data_buf + 2; /* step over strlen value */ 878 key = value = ptr; 879 880 while (*ptr && (ptr <= end)) { 881 /* Separate the key and value by replacing '=' with '\0' and 882 * point the value at the string after the '=' 883 */ 884 if (ptr[0] == '=') { 885 ptr[0] = '\0'; 886 value = ptr + 1; 887 } else if (ptr[0] == '\0' || ptr[0] == ',') { 888 /* Terminate the string containing the key/value pair */ 889 ptr[0] = '\0'; 890 891 if (key == value) { 892 pr_debug("Malformed key/value pair\n"); 893 /* Never found a '=', end processing */ 894 break; 895 } 896 897 if (0 == strcmp(key, "CMOPageSize")) 898 page_order = simple_strtol(value, NULL, 10); 899 else if (0 == strcmp(key, "PrPSP")) 900 CMO_PrPSP = simple_strtol(value, NULL, 10); 901 else if (0 == strcmp(key, "SecPSP")) 902 CMO_SecPSP = simple_strtol(value, NULL, 10); 903 value = key = ptr + 1; 904 } 905 ptr++; 906 } 907 908 /* Page size is returned as the power of 2 of the page size, 909 * convert to the page size in bytes before returning 910 */ 911 CMO_PageSize = 1 << page_order; 912 pr_debug("CMO_PageSize = %lu\n", CMO_PageSize); 913 914 if (CMO_PrPSP != -1 || CMO_SecPSP != -1) { 915 pr_info("CMO enabled\n"); 916 pr_debug("CMO enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP, 917 CMO_SecPSP); 918 powerpc_firmware_features |= FW_FEATURE_CMO; 919 pSeries_coalesce_init(); 920 } else 921 pr_debug("CMO not enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP, 922 CMO_SecPSP); 923 spin_unlock(&rtas_data_buf_lock); 924 pr_debug(" <- fw_cmo_feature_init()\n"); 925 } 926 927 /* 928 * Early initialization. Relocation is on but do not reference unbolted pages 929 */ 930 static void __init pseries_init(void) 931 { 932 pr_debug(" -> pseries_init()\n"); 933 934 #ifdef CONFIG_HVC_CONSOLE 935 if (firmware_has_feature(FW_FEATURE_LPAR)) 936 hvc_vio_init_early(); 937 #endif 938 if (firmware_has_feature(FW_FEATURE_XDABR)) 939 ppc_md.set_dabr = pseries_set_xdabr; 940 else if (firmware_has_feature(FW_FEATURE_DABR)) 941 ppc_md.set_dabr = pseries_set_dabr; 942 943 if (firmware_has_feature(FW_FEATURE_SET_MODE)) 944 ppc_md.set_dawr = pseries_set_dawr; 945 946 pSeries_cmo_feature_init(); 947 iommu_init_early_pSeries(); 948 949 pr_debug(" <- pseries_init()\n"); 950 } 951 952 /** 953 * pseries_power_off - tell firmware about how to power off the system. 954 * 955 * This function calls either the power-off rtas token in normal cases 956 * or the ibm,power-off-ups token (if present & requested) in case of 957 * a power failure. If power-off token is used, power on will only be 958 * possible with power button press. If ibm,power-off-ups token is used 959 * it will allow auto poweron after power is restored. 960 */ 961 static void pseries_power_off(void) 962 { 963 int rc; 964 int rtas_poweroff_ups_token = rtas_token("ibm,power-off-ups"); 965 966 if (rtas_flash_term_hook) 967 rtas_flash_term_hook(SYS_POWER_OFF); 968 969 if (rtas_poweron_auto == 0 || 970 rtas_poweroff_ups_token == RTAS_UNKNOWN_SERVICE) { 971 rc = rtas_call(rtas_token("power-off"), 2, 1, NULL, -1, -1); 972 printk(KERN_INFO "RTAS power-off returned %d\n", rc); 973 } else { 974 rc = rtas_call(rtas_poweroff_ups_token, 0, 1, NULL); 975 printk(KERN_INFO "RTAS ibm,power-off-ups returned %d\n", rc); 976 } 977 for (;;); 978 } 979 980 static int __init pSeries_probe(void) 981 { 982 if (!of_node_is_type(of_root, "chrp")) 983 return 0; 984 985 /* Cell blades firmware claims to be chrp while it's not. Until this 986 * is fixed, we need to avoid those here. 987 */ 988 if (of_machine_is_compatible("IBM,CPBW-1.0") || 989 of_machine_is_compatible("IBM,CBEA")) 990 return 0; 991 992 pm_power_off = pseries_power_off; 993 994 pr_debug("Machine is%s LPAR !\n", 995 (powerpc_firmware_features & FW_FEATURE_LPAR) ? "" : " not"); 996 997 pseries_init(); 998 999 return 1; 1000 } 1001 1002 static int pSeries_pci_probe_mode(struct pci_bus *bus) 1003 { 1004 if (firmware_has_feature(FW_FEATURE_LPAR)) 1005 return PCI_PROBE_DEVTREE; 1006 return PCI_PROBE_NORMAL; 1007 } 1008 1009 struct pci_controller_ops pseries_pci_controller_ops = { 1010 .probe_mode = pSeries_pci_probe_mode, 1011 }; 1012 1013 define_machine(pseries) { 1014 .name = "pSeries", 1015 .probe = pSeries_probe, 1016 .setup_arch = pSeries_setup_arch, 1017 .init_IRQ = pseries_init_irq, 1018 .show_cpuinfo = pSeries_show_cpuinfo, 1019 .log_error = pSeries_log_error, 1020 .pcibios_fixup = pSeries_final_fixup, 1021 .restart = rtas_restart, 1022 .halt = rtas_halt, 1023 .panic = pseries_panic, 1024 .get_boot_time = rtas_get_boot_time, 1025 .get_rtc_time = rtas_get_rtc_time, 1026 .set_rtc_time = rtas_set_rtc_time, 1027 .calibrate_decr = generic_calibrate_decr, 1028 .progress = rtas_progress, 1029 .system_reset_exception = pSeries_system_reset_exception, 1030 .machine_check_early = pseries_machine_check_realmode, 1031 .machine_check_exception = pSeries_machine_check_exception, 1032 #ifdef CONFIG_KEXEC_CORE 1033 .machine_kexec = pSeries_machine_kexec, 1034 .kexec_cpu_down = pseries_kexec_cpu_down, 1035 #endif 1036 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE 1037 .memory_block_size = pseries_memory_block_size, 1038 #endif 1039 }; 1040