1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * 64-bit pSeries and RS/6000 setup code. 4 * 5 * Copyright (C) 1995 Linus Torvalds 6 * Adapted from 'alpha' version by Gary Thomas 7 * Modified by Cort Dougan (cort@cs.nmt.edu) 8 * Modified by PPC64 Team, IBM Corp 9 */ 10 11 /* 12 * bootup setup stuff.. 13 */ 14 15 #include <linux/cpu.h> 16 #include <linux/errno.h> 17 #include <linux/sched.h> 18 #include <linux/kernel.h> 19 #include <linux/mm.h> 20 #include <linux/stddef.h> 21 #include <linux/unistd.h> 22 #include <linux/user.h> 23 #include <linux/tty.h> 24 #include <linux/major.h> 25 #include <linux/interrupt.h> 26 #include <linux/reboot.h> 27 #include <linux/init.h> 28 #include <linux/ioport.h> 29 #include <linux/console.h> 30 #include <linux/pci.h> 31 #include <linux/utsname.h> 32 #include <linux/adb.h> 33 #include <linux/export.h> 34 #include <linux/delay.h> 35 #include <linux/irq.h> 36 #include <linux/seq_file.h> 37 #include <linux/root_dev.h> 38 #include <linux/of.h> 39 #include <linux/of_pci.h> 40 #include <linux/memblock.h> 41 #include <linux/swiotlb.h> 42 43 #include <asm/mmu.h> 44 #include <asm/processor.h> 45 #include <asm/io.h> 46 #include <asm/prom.h> 47 #include <asm/rtas.h> 48 #include <asm/pci-bridge.h> 49 #include <asm/iommu.h> 50 #include <asm/dma.h> 51 #include <asm/machdep.h> 52 #include <asm/irq.h> 53 #include <asm/time.h> 54 #include <asm/nvram.h> 55 #include <asm/pmc.h> 56 #include <asm/xics.h> 57 #include <asm/xive.h> 58 #include <asm/ppc-pci.h> 59 #include <asm/i8259.h> 60 #include <asm/udbg.h> 61 #include <asm/smp.h> 62 #include <asm/firmware.h> 63 #include <asm/eeh.h> 64 #include <asm/reg.h> 65 #include <asm/plpar_wrappers.h> 66 #include <asm/kexec.h> 67 #include <asm/isa-bridge.h> 68 #include <asm/security_features.h> 69 #include <asm/asm-const.h> 70 #include <asm/idle.h> 71 #include <asm/swiotlb.h> 72 #include <asm/svm.h> 73 #include <asm/dtl.h> 74 75 #include "pseries.h" 76 #include "../../../../drivers/pci/pci.h" 77 78 DEFINE_STATIC_KEY_FALSE(shared_processor); 79 EXPORT_SYMBOL_GPL(shared_processor); 80 81 int CMO_PrPSP = -1; 82 int CMO_SecPSP = -1; 83 unsigned long CMO_PageSize = (ASM_CONST(1) << IOMMU_PAGE_SHIFT_4K); 84 EXPORT_SYMBOL(CMO_PageSize); 85 86 int fwnmi_active; /* TRUE if an FWNMI handler is present */ 87 int ibm_nmi_interlock_token; 88 89 static void pSeries_show_cpuinfo(struct seq_file *m) 90 { 91 struct device_node *root; 92 const char *model = ""; 93 94 root = of_find_node_by_path("/"); 95 if (root) 96 model = of_get_property(root, "model", NULL); 97 seq_printf(m, "machine\t\t: CHRP %s\n", model); 98 of_node_put(root); 99 if (radix_enabled()) 100 seq_printf(m, "MMU\t\t: Radix\n"); 101 else 102 seq_printf(m, "MMU\t\t: Hash\n"); 103 } 104 105 /* Initialize firmware assisted non-maskable interrupts if 106 * the firmware supports this feature. 107 */ 108 static void __init fwnmi_init(void) 109 { 110 unsigned long system_reset_addr, machine_check_addr; 111 u8 *mce_data_buf; 112 unsigned int i; 113 int nr_cpus = num_possible_cpus(); 114 #ifdef CONFIG_PPC_BOOK3S_64 115 struct slb_entry *slb_ptr; 116 size_t size; 117 #endif 118 int ibm_nmi_register_token; 119 120 ibm_nmi_register_token = rtas_token("ibm,nmi-register"); 121 if (ibm_nmi_register_token == RTAS_UNKNOWN_SERVICE) 122 return; 123 124 ibm_nmi_interlock_token = rtas_token("ibm,nmi-interlock"); 125 if (WARN_ON(ibm_nmi_interlock_token == RTAS_UNKNOWN_SERVICE)) 126 return; 127 128 /* If the kernel's not linked at zero we point the firmware at low 129 * addresses anyway, and use a trampoline to get to the real code. */ 130 system_reset_addr = __pa(system_reset_fwnmi) - PHYSICAL_START; 131 machine_check_addr = __pa(machine_check_fwnmi) - PHYSICAL_START; 132 133 if (0 == rtas_call(ibm_nmi_register_token, 2, 1, NULL, 134 system_reset_addr, machine_check_addr)) 135 fwnmi_active = 1; 136 137 /* 138 * Allocate a chunk for per cpu buffer to hold rtas errorlog. 139 * It will be used in real mode mce handler, hence it needs to be 140 * below RMA. 141 */ 142 mce_data_buf = memblock_alloc_try_nid_raw(RTAS_ERROR_LOG_MAX * nr_cpus, 143 RTAS_ERROR_LOG_MAX, MEMBLOCK_LOW_LIMIT, 144 ppc64_rma_size, NUMA_NO_NODE); 145 if (!mce_data_buf) 146 panic("Failed to allocate %d bytes below %pa for MCE buffer\n", 147 RTAS_ERROR_LOG_MAX * nr_cpus, &ppc64_rma_size); 148 149 for_each_possible_cpu(i) { 150 paca_ptrs[i]->mce_data_buf = mce_data_buf + 151 (RTAS_ERROR_LOG_MAX * i); 152 } 153 154 #ifdef CONFIG_PPC_BOOK3S_64 155 if (!radix_enabled()) { 156 /* Allocate per cpu area to save old slb contents during MCE */ 157 size = sizeof(struct slb_entry) * mmu_slb_size * nr_cpus; 158 slb_ptr = memblock_alloc_try_nid_raw(size, 159 sizeof(struct slb_entry), MEMBLOCK_LOW_LIMIT, 160 ppc64_rma_size, NUMA_NO_NODE); 161 if (!slb_ptr) 162 panic("Failed to allocate %zu bytes below %pa for slb area\n", 163 size, &ppc64_rma_size); 164 165 for_each_possible_cpu(i) 166 paca_ptrs[i]->mce_faulty_slbs = slb_ptr + (mmu_slb_size * i); 167 } 168 #endif 169 } 170 171 static void pseries_8259_cascade(struct irq_desc *desc) 172 { 173 struct irq_chip *chip = irq_desc_get_chip(desc); 174 unsigned int cascade_irq = i8259_irq(); 175 176 if (cascade_irq) 177 generic_handle_irq(cascade_irq); 178 179 chip->irq_eoi(&desc->irq_data); 180 } 181 182 static void __init pseries_setup_i8259_cascade(void) 183 { 184 struct device_node *np, *old, *found = NULL; 185 unsigned int cascade; 186 const u32 *addrp; 187 unsigned long intack = 0; 188 int naddr; 189 190 for_each_node_by_type(np, "interrupt-controller") { 191 if (of_device_is_compatible(np, "chrp,iic")) { 192 found = np; 193 break; 194 } 195 } 196 197 if (found == NULL) { 198 printk(KERN_DEBUG "pic: no ISA interrupt controller\n"); 199 return; 200 } 201 202 cascade = irq_of_parse_and_map(found, 0); 203 if (!cascade) { 204 printk(KERN_ERR "pic: failed to map cascade interrupt"); 205 return; 206 } 207 pr_debug("pic: cascade mapped to irq %d\n", cascade); 208 209 for (old = of_node_get(found); old != NULL ; old = np) { 210 np = of_get_parent(old); 211 of_node_put(old); 212 if (np == NULL) 213 break; 214 if (!of_node_name_eq(np, "pci")) 215 continue; 216 addrp = of_get_property(np, "8259-interrupt-acknowledge", NULL); 217 if (addrp == NULL) 218 continue; 219 naddr = of_n_addr_cells(np); 220 intack = addrp[naddr-1]; 221 if (naddr > 1) 222 intack |= ((unsigned long)addrp[naddr-2]) << 32; 223 } 224 if (intack) 225 printk(KERN_DEBUG "pic: PCI 8259 intack at 0x%016lx\n", intack); 226 i8259_init(found, intack); 227 of_node_put(found); 228 irq_set_chained_handler(cascade, pseries_8259_cascade); 229 } 230 231 static void __init pseries_init_irq(void) 232 { 233 /* Try using a XIVE if available, otherwise use a XICS */ 234 if (!xive_spapr_init()) { 235 xics_init(); 236 pseries_setup_i8259_cascade(); 237 } 238 } 239 240 static void pseries_lpar_enable_pmcs(void) 241 { 242 unsigned long set, reset; 243 244 set = 1UL << 63; 245 reset = 0; 246 plpar_hcall_norets(H_PERFMON, set, reset); 247 } 248 249 static int pci_dn_reconfig_notifier(struct notifier_block *nb, unsigned long action, void *data) 250 { 251 struct of_reconfig_data *rd = data; 252 struct device_node *parent, *np = rd->dn; 253 struct pci_dn *pdn; 254 int err = NOTIFY_OK; 255 256 switch (action) { 257 case OF_RECONFIG_ATTACH_NODE: 258 parent = of_get_parent(np); 259 pdn = parent ? PCI_DN(parent) : NULL; 260 if (pdn) 261 pci_add_device_node_info(pdn->phb, np); 262 263 of_node_put(parent); 264 break; 265 case OF_RECONFIG_DETACH_NODE: 266 pdn = PCI_DN(np); 267 if (pdn) 268 list_del(&pdn->list); 269 break; 270 default: 271 err = NOTIFY_DONE; 272 break; 273 } 274 return err; 275 } 276 277 static struct notifier_block pci_dn_reconfig_nb = { 278 .notifier_call = pci_dn_reconfig_notifier, 279 }; 280 281 struct kmem_cache *dtl_cache; 282 283 #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE 284 /* 285 * Allocate space for the dispatch trace log for all possible cpus 286 * and register the buffers with the hypervisor. This is used for 287 * computing time stolen by the hypervisor. 288 */ 289 static int alloc_dispatch_logs(void) 290 { 291 if (!firmware_has_feature(FW_FEATURE_SPLPAR)) 292 return 0; 293 294 if (!dtl_cache) 295 return 0; 296 297 alloc_dtl_buffers(0); 298 299 /* Register the DTL for the current (boot) cpu */ 300 register_dtl_buffer(smp_processor_id()); 301 302 return 0; 303 } 304 #else /* !CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */ 305 static inline int alloc_dispatch_logs(void) 306 { 307 return 0; 308 } 309 #endif /* CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */ 310 311 static int alloc_dispatch_log_kmem_cache(void) 312 { 313 void (*ctor)(void *) = get_dtl_cache_ctor(); 314 315 dtl_cache = kmem_cache_create("dtl", DISPATCH_LOG_BYTES, 316 DISPATCH_LOG_BYTES, 0, ctor); 317 if (!dtl_cache) { 318 pr_warn("Failed to create dispatch trace log buffer cache\n"); 319 pr_warn("Stolen time statistics will be unreliable\n"); 320 return 0; 321 } 322 323 return alloc_dispatch_logs(); 324 } 325 machine_early_initcall(pseries, alloc_dispatch_log_kmem_cache); 326 327 DEFINE_PER_CPU(u64, idle_spurr_cycles); 328 DEFINE_PER_CPU(u64, idle_entry_purr_snap); 329 DEFINE_PER_CPU(u64, idle_entry_spurr_snap); 330 static void pseries_lpar_idle(void) 331 { 332 /* 333 * Default handler to go into low thread priority and possibly 334 * low power mode by ceding processor to hypervisor 335 */ 336 337 if (!prep_irq_for_idle()) 338 return; 339 340 /* Indicate to hypervisor that we are idle. */ 341 pseries_idle_prolog(); 342 343 /* 344 * Yield the processor to the hypervisor. We return if 345 * an external interrupt occurs (which are driven prior 346 * to returning here) or if a prod occurs from another 347 * processor. When returning here, external interrupts 348 * are enabled. 349 */ 350 cede_processor(); 351 352 pseries_idle_epilog(); 353 } 354 355 /* 356 * Enable relocation on during exceptions. This has partition wide scope and 357 * may take a while to complete, if it takes longer than one second we will 358 * just give up rather than wasting any more time on this - if that turns out 359 * to ever be a problem in practice we can move this into a kernel thread to 360 * finish off the process later in boot. 361 */ 362 void pseries_enable_reloc_on_exc(void) 363 { 364 long rc; 365 unsigned int delay, total_delay = 0; 366 367 while (1) { 368 rc = enable_reloc_on_exceptions(); 369 if (!H_IS_LONG_BUSY(rc)) { 370 if (rc == H_P2) { 371 pr_info("Relocation on exceptions not" 372 " supported\n"); 373 } else if (rc != H_SUCCESS) { 374 pr_warn("Unable to enable relocation" 375 " on exceptions: %ld\n", rc); 376 } 377 break; 378 } 379 380 delay = get_longbusy_msecs(rc); 381 total_delay += delay; 382 if (total_delay > 1000) { 383 pr_warn("Warning: Giving up waiting to enable " 384 "relocation on exceptions (%u msec)!\n", 385 total_delay); 386 return; 387 } 388 389 mdelay(delay); 390 } 391 } 392 EXPORT_SYMBOL(pseries_enable_reloc_on_exc); 393 394 void pseries_disable_reloc_on_exc(void) 395 { 396 long rc; 397 398 while (1) { 399 rc = disable_reloc_on_exceptions(); 400 if (!H_IS_LONG_BUSY(rc)) 401 break; 402 mdelay(get_longbusy_msecs(rc)); 403 } 404 if (rc != H_SUCCESS) 405 pr_warn("Warning: Failed to disable relocation on exceptions: %ld\n", 406 rc); 407 } 408 EXPORT_SYMBOL(pseries_disable_reloc_on_exc); 409 410 #ifdef CONFIG_KEXEC_CORE 411 static void pSeries_machine_kexec(struct kimage *image) 412 { 413 if (firmware_has_feature(FW_FEATURE_SET_MODE)) 414 pseries_disable_reloc_on_exc(); 415 416 default_machine_kexec(image); 417 } 418 #endif 419 420 #ifdef __LITTLE_ENDIAN__ 421 void pseries_big_endian_exceptions(void) 422 { 423 long rc; 424 425 while (1) { 426 rc = enable_big_endian_exceptions(); 427 if (!H_IS_LONG_BUSY(rc)) 428 break; 429 mdelay(get_longbusy_msecs(rc)); 430 } 431 432 /* 433 * At this point it is unlikely panic() will get anything 434 * out to the user, since this is called very late in kexec 435 * but at least this will stop us from continuing on further 436 * and creating an even more difficult to debug situation. 437 * 438 * There is a known problem when kdump'ing, if cpus are offline 439 * the above call will fail. Rather than panicking again, keep 440 * going and hope the kdump kernel is also little endian, which 441 * it usually is. 442 */ 443 if (rc && !kdump_in_progress()) 444 panic("Could not enable big endian exceptions"); 445 } 446 447 void pseries_little_endian_exceptions(void) 448 { 449 long rc; 450 451 while (1) { 452 rc = enable_little_endian_exceptions(); 453 if (!H_IS_LONG_BUSY(rc)) 454 break; 455 mdelay(get_longbusy_msecs(rc)); 456 } 457 if (rc) { 458 ppc_md.progress("H_SET_MODE LE exception fail", 0); 459 panic("Could not enable little endian exceptions"); 460 } 461 } 462 #endif 463 464 static void __init find_and_init_phbs(void) 465 { 466 struct device_node *node; 467 struct pci_controller *phb; 468 struct device_node *root = of_find_node_by_path("/"); 469 470 for_each_child_of_node(root, node) { 471 if (!of_node_is_type(node, "pci") && 472 !of_node_is_type(node, "pciex")) 473 continue; 474 475 phb = pcibios_alloc_controller(node); 476 if (!phb) 477 continue; 478 rtas_setup_phb(phb); 479 pci_process_bridge_OF_ranges(phb, node, 0); 480 isa_bridge_find_early(phb); 481 phb->controller_ops = pseries_pci_controller_ops; 482 } 483 484 of_node_put(root); 485 486 /* 487 * PCI_PROBE_ONLY and PCI_REASSIGN_ALL_BUS can be set via properties 488 * in chosen. 489 */ 490 of_pci_check_probe_only(); 491 } 492 493 static void init_cpu_char_feature_flags(struct h_cpu_char_result *result) 494 { 495 /* 496 * The features below are disabled by default, so we instead look to see 497 * if firmware has *enabled* them, and set them if so. 498 */ 499 if (result->character & H_CPU_CHAR_SPEC_BAR_ORI31) 500 security_ftr_set(SEC_FTR_SPEC_BAR_ORI31); 501 502 if (result->character & H_CPU_CHAR_BCCTRL_SERIALISED) 503 security_ftr_set(SEC_FTR_BCCTRL_SERIALISED); 504 505 if (result->character & H_CPU_CHAR_L1D_FLUSH_ORI30) 506 security_ftr_set(SEC_FTR_L1D_FLUSH_ORI30); 507 508 if (result->character & H_CPU_CHAR_L1D_FLUSH_TRIG2) 509 security_ftr_set(SEC_FTR_L1D_FLUSH_TRIG2); 510 511 if (result->character & H_CPU_CHAR_L1D_THREAD_PRIV) 512 security_ftr_set(SEC_FTR_L1D_THREAD_PRIV); 513 514 if (result->character & H_CPU_CHAR_COUNT_CACHE_DISABLED) 515 security_ftr_set(SEC_FTR_COUNT_CACHE_DISABLED); 516 517 if (result->character & H_CPU_CHAR_BCCTR_FLUSH_ASSIST) 518 security_ftr_set(SEC_FTR_BCCTR_FLUSH_ASSIST); 519 520 if (result->behaviour & H_CPU_BEHAV_FLUSH_COUNT_CACHE) 521 security_ftr_set(SEC_FTR_FLUSH_COUNT_CACHE); 522 523 /* 524 * The features below are enabled by default, so we instead look to see 525 * if firmware has *disabled* them, and clear them if so. 526 */ 527 if (!(result->behaviour & H_CPU_BEHAV_FAVOUR_SECURITY)) 528 security_ftr_clear(SEC_FTR_FAVOUR_SECURITY); 529 530 if (!(result->behaviour & H_CPU_BEHAV_L1D_FLUSH_PR)) 531 security_ftr_clear(SEC_FTR_L1D_FLUSH_PR); 532 533 if (!(result->behaviour & H_CPU_BEHAV_BNDS_CHK_SPEC_BAR)) 534 security_ftr_clear(SEC_FTR_BNDS_CHK_SPEC_BAR); 535 } 536 537 void pseries_setup_rfi_flush(void) 538 { 539 struct h_cpu_char_result result; 540 enum l1d_flush_type types; 541 bool enable; 542 long rc; 543 544 /* 545 * Set features to the defaults assumed by init_cpu_char_feature_flags() 546 * so it can set/clear again any features that might have changed after 547 * migration, and in case the hypercall fails and it is not even called. 548 */ 549 powerpc_security_features = SEC_FTR_DEFAULT; 550 551 rc = plpar_get_cpu_characteristics(&result); 552 if (rc == H_SUCCESS) 553 init_cpu_char_feature_flags(&result); 554 555 /* 556 * We're the guest so this doesn't apply to us, clear it to simplify 557 * handling of it elsewhere. 558 */ 559 security_ftr_clear(SEC_FTR_L1D_FLUSH_HV); 560 561 types = L1D_FLUSH_FALLBACK; 562 563 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_TRIG2)) 564 types |= L1D_FLUSH_MTTRIG; 565 566 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_ORI30)) 567 types |= L1D_FLUSH_ORI; 568 569 enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && \ 570 security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR); 571 572 setup_rfi_flush(types, enable); 573 setup_count_cache_flush(); 574 } 575 576 #ifdef CONFIG_PCI_IOV 577 enum rtas_iov_fw_value_map { 578 NUM_RES_PROPERTY = 0, /* Number of Resources */ 579 LOW_INT = 1, /* Lowest 32 bits of Address */ 580 START_OF_ENTRIES = 2, /* Always start of entry */ 581 APERTURE_PROPERTY = 2, /* Start of entry+ to Aperture Size */ 582 WDW_SIZE_PROPERTY = 4, /* Start of entry+ to Window Size */ 583 NEXT_ENTRY = 7 /* Go to next entry on array */ 584 }; 585 586 enum get_iov_fw_value_index { 587 BAR_ADDRS = 1, /* Get Bar Address */ 588 APERTURE_SIZE = 2, /* Get Aperture Size */ 589 WDW_SIZE = 3 /* Get Window Size */ 590 }; 591 592 resource_size_t pseries_get_iov_fw_value(struct pci_dev *dev, int resno, 593 enum get_iov_fw_value_index value) 594 { 595 const int *indexes; 596 struct device_node *dn = pci_device_to_OF_node(dev); 597 int i, num_res, ret = 0; 598 599 indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL); 600 if (!indexes) 601 return 0; 602 603 /* 604 * First element in the array is the number of Bars 605 * returned. Search through the list to find the matching 606 * bar 607 */ 608 num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1); 609 if (resno >= num_res) 610 return 0; /* or an errror */ 611 612 i = START_OF_ENTRIES + NEXT_ENTRY * resno; 613 switch (value) { 614 case BAR_ADDRS: 615 ret = of_read_number(&indexes[i], 2); 616 break; 617 case APERTURE_SIZE: 618 ret = of_read_number(&indexes[i + APERTURE_PROPERTY], 2); 619 break; 620 case WDW_SIZE: 621 ret = of_read_number(&indexes[i + WDW_SIZE_PROPERTY], 2); 622 break; 623 } 624 625 return ret; 626 } 627 628 void of_pci_set_vf_bar_size(struct pci_dev *dev, const int *indexes) 629 { 630 struct resource *res; 631 resource_size_t base, size; 632 int i, r, num_res; 633 634 num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1); 635 num_res = min_t(int, num_res, PCI_SRIOV_NUM_BARS); 636 for (i = START_OF_ENTRIES, r = 0; r < num_res && r < PCI_SRIOV_NUM_BARS; 637 i += NEXT_ENTRY, r++) { 638 res = &dev->resource[r + PCI_IOV_RESOURCES]; 639 base = of_read_number(&indexes[i], 2); 640 size = of_read_number(&indexes[i + APERTURE_PROPERTY], 2); 641 res->flags = pci_parse_of_flags(of_read_number 642 (&indexes[i + LOW_INT], 1), 0); 643 res->flags |= (IORESOURCE_MEM_64 | IORESOURCE_PCI_FIXED); 644 res->name = pci_name(dev); 645 res->start = base; 646 res->end = base + size - 1; 647 } 648 } 649 650 void of_pci_parse_iov_addrs(struct pci_dev *dev, const int *indexes) 651 { 652 struct resource *res, *root, *conflict; 653 resource_size_t base, size; 654 int i, r, num_res; 655 656 /* 657 * First element in the array is the number of Bars 658 * returned. Search through the list to find the matching 659 * bars assign them from firmware into resources structure. 660 */ 661 num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1); 662 for (i = START_OF_ENTRIES, r = 0; r < num_res && r < PCI_SRIOV_NUM_BARS; 663 i += NEXT_ENTRY, r++) { 664 res = &dev->resource[r + PCI_IOV_RESOURCES]; 665 base = of_read_number(&indexes[i], 2); 666 size = of_read_number(&indexes[i + WDW_SIZE_PROPERTY], 2); 667 res->name = pci_name(dev); 668 res->start = base; 669 res->end = base + size - 1; 670 root = &iomem_resource; 671 dev_dbg(&dev->dev, 672 "pSeries IOV BAR %d: trying firmware assignment %pR\n", 673 r + PCI_IOV_RESOURCES, res); 674 conflict = request_resource_conflict(root, res); 675 if (conflict) { 676 dev_info(&dev->dev, 677 "BAR %d: %pR conflicts with %s %pR\n", 678 r + PCI_IOV_RESOURCES, res, 679 conflict->name, conflict); 680 res->flags |= IORESOURCE_UNSET; 681 } 682 } 683 } 684 685 static void pseries_disable_sriov_resources(struct pci_dev *pdev) 686 { 687 int i; 688 689 pci_warn(pdev, "No hypervisor support for SR-IOV on this device, IOV BARs disabled.\n"); 690 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) 691 pdev->resource[i + PCI_IOV_RESOURCES].flags = 0; 692 } 693 694 static void pseries_pci_fixup_resources(struct pci_dev *pdev) 695 { 696 const int *indexes; 697 struct device_node *dn = pci_device_to_OF_node(pdev); 698 699 /*Firmware must support open sriov otherwise dont configure*/ 700 indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL); 701 if (indexes) 702 of_pci_set_vf_bar_size(pdev, indexes); 703 else 704 pseries_disable_sriov_resources(pdev); 705 } 706 707 static void pseries_pci_fixup_iov_resources(struct pci_dev *pdev) 708 { 709 const int *indexes; 710 struct device_node *dn = pci_device_to_OF_node(pdev); 711 712 if (!pdev->is_physfn || pci_dev_is_added(pdev)) 713 return; 714 /*Firmware must support open sriov otherwise dont configure*/ 715 indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL); 716 if (indexes) 717 of_pci_parse_iov_addrs(pdev, indexes); 718 else 719 pseries_disable_sriov_resources(pdev); 720 } 721 722 static resource_size_t pseries_pci_iov_resource_alignment(struct pci_dev *pdev, 723 int resno) 724 { 725 const __be32 *reg; 726 struct device_node *dn = pci_device_to_OF_node(pdev); 727 728 /*Firmware must support open sriov otherwise report regular alignment*/ 729 reg = of_get_property(dn, "ibm,is-open-sriov-pf", NULL); 730 if (!reg) 731 return pci_iov_resource_size(pdev, resno); 732 733 if (!pdev->is_physfn) 734 return 0; 735 return pseries_get_iov_fw_value(pdev, 736 resno - PCI_IOV_RESOURCES, 737 APERTURE_SIZE); 738 } 739 #endif 740 741 static void __init pSeries_setup_arch(void) 742 { 743 set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT); 744 745 /* Discover PIC type and setup ppc_md accordingly */ 746 smp_init_pseries(); 747 748 749 /* openpic global configuration register (64-bit format). */ 750 /* openpic Interrupt Source Unit pointer (64-bit format). */ 751 /* python0 facility area (mmio) (64-bit format) REAL address. */ 752 753 /* init to some ~sane value until calibrate_delay() runs */ 754 loops_per_jiffy = 50000000; 755 756 fwnmi_init(); 757 758 pseries_setup_rfi_flush(); 759 setup_stf_barrier(); 760 pseries_lpar_read_hblkrm_characteristics(); 761 762 /* By default, only probe PCI (can be overridden by rtas_pci) */ 763 pci_add_flags(PCI_PROBE_ONLY); 764 765 /* Find and initialize PCI host bridges */ 766 init_pci_config_tokens(); 767 find_and_init_phbs(); 768 of_reconfig_notifier_register(&pci_dn_reconfig_nb); 769 770 pSeries_nvram_init(); 771 772 if (firmware_has_feature(FW_FEATURE_LPAR)) { 773 vpa_init(boot_cpuid); 774 775 if (lppaca_shared_proc(get_lppaca())) 776 static_branch_enable(&shared_processor); 777 778 ppc_md.power_save = pseries_lpar_idle; 779 ppc_md.enable_pmcs = pseries_lpar_enable_pmcs; 780 #ifdef CONFIG_PCI_IOV 781 ppc_md.pcibios_fixup_resources = 782 pseries_pci_fixup_resources; 783 ppc_md.pcibios_fixup_sriov = 784 pseries_pci_fixup_iov_resources; 785 ppc_md.pcibios_iov_resource_alignment = 786 pseries_pci_iov_resource_alignment; 787 #endif 788 } else { 789 /* No special idle routine */ 790 ppc_md.enable_pmcs = power4_enable_pmcs; 791 } 792 793 ppc_md.pcibios_root_bridge_prepare = pseries_root_bridge_prepare; 794 795 if (swiotlb_force == SWIOTLB_FORCE) 796 ppc_swiotlb_enable = 1; 797 } 798 799 static void pseries_panic(char *str) 800 { 801 panic_flush_kmsg_end(); 802 rtas_os_term(str); 803 } 804 805 static int __init pSeries_init_panel(void) 806 { 807 /* Manually leave the kernel version on the panel. */ 808 #ifdef __BIG_ENDIAN__ 809 ppc_md.progress("Linux ppc64\n", 0); 810 #else 811 ppc_md.progress("Linux ppc64le\n", 0); 812 #endif 813 ppc_md.progress(init_utsname()->version, 0); 814 815 return 0; 816 } 817 machine_arch_initcall(pseries, pSeries_init_panel); 818 819 static int pseries_set_dabr(unsigned long dabr, unsigned long dabrx) 820 { 821 return plpar_hcall_norets(H_SET_DABR, dabr); 822 } 823 824 static int pseries_set_xdabr(unsigned long dabr, unsigned long dabrx) 825 { 826 /* Have to set at least one bit in the DABRX according to PAPR */ 827 if (dabrx == 0 && dabr == 0) 828 dabrx = DABRX_USER; 829 /* PAPR says we can only set kernel and user bits */ 830 dabrx &= DABRX_KERNEL | DABRX_USER; 831 832 return plpar_hcall_norets(H_SET_XDABR, dabr, dabrx); 833 } 834 835 static int pseries_set_dawr(unsigned long dawr, unsigned long dawrx) 836 { 837 /* PAPR says we can't set HYP */ 838 dawrx &= ~DAWRX_HYP; 839 840 return plpar_set_watchpoint0(dawr, dawrx); 841 } 842 843 #define CMO_CHARACTERISTICS_TOKEN 44 844 #define CMO_MAXLENGTH 1026 845 846 void pSeries_coalesce_init(void) 847 { 848 struct hvcall_mpp_x_data mpp_x_data; 849 850 if (firmware_has_feature(FW_FEATURE_CMO) && !h_get_mpp_x(&mpp_x_data)) 851 powerpc_firmware_features |= FW_FEATURE_XCMO; 852 else 853 powerpc_firmware_features &= ~FW_FEATURE_XCMO; 854 } 855 856 /** 857 * fw_cmo_feature_init - FW_FEATURE_CMO is not stored in ibm,hypertas-functions, 858 * handle that here. (Stolen from parse_system_parameter_string) 859 */ 860 static void pSeries_cmo_feature_init(void) 861 { 862 char *ptr, *key, *value, *end; 863 int call_status; 864 int page_order = IOMMU_PAGE_SHIFT_4K; 865 866 pr_debug(" -> fw_cmo_feature_init()\n"); 867 spin_lock(&rtas_data_buf_lock); 868 memset(rtas_data_buf, 0, RTAS_DATA_BUF_SIZE); 869 call_status = rtas_call(rtas_token("ibm,get-system-parameter"), 3, 1, 870 NULL, 871 CMO_CHARACTERISTICS_TOKEN, 872 __pa(rtas_data_buf), 873 RTAS_DATA_BUF_SIZE); 874 875 if (call_status != 0) { 876 spin_unlock(&rtas_data_buf_lock); 877 pr_debug("CMO not available\n"); 878 pr_debug(" <- fw_cmo_feature_init()\n"); 879 return; 880 } 881 882 end = rtas_data_buf + CMO_MAXLENGTH - 2; 883 ptr = rtas_data_buf + 2; /* step over strlen value */ 884 key = value = ptr; 885 886 while (*ptr && (ptr <= end)) { 887 /* Separate the key and value by replacing '=' with '\0' and 888 * point the value at the string after the '=' 889 */ 890 if (ptr[0] == '=') { 891 ptr[0] = '\0'; 892 value = ptr + 1; 893 } else if (ptr[0] == '\0' || ptr[0] == ',') { 894 /* Terminate the string containing the key/value pair */ 895 ptr[0] = '\0'; 896 897 if (key == value) { 898 pr_debug("Malformed key/value pair\n"); 899 /* Never found a '=', end processing */ 900 break; 901 } 902 903 if (0 == strcmp(key, "CMOPageSize")) 904 page_order = simple_strtol(value, NULL, 10); 905 else if (0 == strcmp(key, "PrPSP")) 906 CMO_PrPSP = simple_strtol(value, NULL, 10); 907 else if (0 == strcmp(key, "SecPSP")) 908 CMO_SecPSP = simple_strtol(value, NULL, 10); 909 value = key = ptr + 1; 910 } 911 ptr++; 912 } 913 914 /* Page size is returned as the power of 2 of the page size, 915 * convert to the page size in bytes before returning 916 */ 917 CMO_PageSize = 1 << page_order; 918 pr_debug("CMO_PageSize = %lu\n", CMO_PageSize); 919 920 if (CMO_PrPSP != -1 || CMO_SecPSP != -1) { 921 pr_info("CMO enabled\n"); 922 pr_debug("CMO enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP, 923 CMO_SecPSP); 924 powerpc_firmware_features |= FW_FEATURE_CMO; 925 pSeries_coalesce_init(); 926 } else 927 pr_debug("CMO not enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP, 928 CMO_SecPSP); 929 spin_unlock(&rtas_data_buf_lock); 930 pr_debug(" <- fw_cmo_feature_init()\n"); 931 } 932 933 /* 934 * Early initialization. Relocation is on but do not reference unbolted pages 935 */ 936 static void __init pseries_init(void) 937 { 938 pr_debug(" -> pseries_init()\n"); 939 940 #ifdef CONFIG_HVC_CONSOLE 941 if (firmware_has_feature(FW_FEATURE_LPAR)) 942 hvc_vio_init_early(); 943 #endif 944 if (firmware_has_feature(FW_FEATURE_XDABR)) 945 ppc_md.set_dabr = pseries_set_xdabr; 946 else if (firmware_has_feature(FW_FEATURE_DABR)) 947 ppc_md.set_dabr = pseries_set_dabr; 948 949 if (firmware_has_feature(FW_FEATURE_SET_MODE)) 950 ppc_md.set_dawr = pseries_set_dawr; 951 952 pSeries_cmo_feature_init(); 953 iommu_init_early_pSeries(); 954 955 pr_debug(" <- pseries_init()\n"); 956 } 957 958 /** 959 * pseries_power_off - tell firmware about how to power off the system. 960 * 961 * This function calls either the power-off rtas token in normal cases 962 * or the ibm,power-off-ups token (if present & requested) in case of 963 * a power failure. If power-off token is used, power on will only be 964 * possible with power button press. If ibm,power-off-ups token is used 965 * it will allow auto poweron after power is restored. 966 */ 967 static void pseries_power_off(void) 968 { 969 int rc; 970 int rtas_poweroff_ups_token = rtas_token("ibm,power-off-ups"); 971 972 if (rtas_flash_term_hook) 973 rtas_flash_term_hook(SYS_POWER_OFF); 974 975 if (rtas_poweron_auto == 0 || 976 rtas_poweroff_ups_token == RTAS_UNKNOWN_SERVICE) { 977 rc = rtas_call(rtas_token("power-off"), 2, 1, NULL, -1, -1); 978 printk(KERN_INFO "RTAS power-off returned %d\n", rc); 979 } else { 980 rc = rtas_call(rtas_poweroff_ups_token, 0, 1, NULL); 981 printk(KERN_INFO "RTAS ibm,power-off-ups returned %d\n", rc); 982 } 983 for (;;); 984 } 985 986 static int __init pSeries_probe(void) 987 { 988 if (!of_node_is_type(of_root, "chrp")) 989 return 0; 990 991 /* Cell blades firmware claims to be chrp while it's not. Until this 992 * is fixed, we need to avoid those here. 993 */ 994 if (of_machine_is_compatible("IBM,CPBW-1.0") || 995 of_machine_is_compatible("IBM,CBEA")) 996 return 0; 997 998 pm_power_off = pseries_power_off; 999 1000 pr_debug("Machine is%s LPAR !\n", 1001 (powerpc_firmware_features & FW_FEATURE_LPAR) ? "" : " not"); 1002 1003 pseries_init(); 1004 1005 return 1; 1006 } 1007 1008 static int pSeries_pci_probe_mode(struct pci_bus *bus) 1009 { 1010 if (firmware_has_feature(FW_FEATURE_LPAR)) 1011 return PCI_PROBE_DEVTREE; 1012 return PCI_PROBE_NORMAL; 1013 } 1014 1015 struct pci_controller_ops pseries_pci_controller_ops = { 1016 .probe_mode = pSeries_pci_probe_mode, 1017 }; 1018 1019 define_machine(pseries) { 1020 .name = "pSeries", 1021 .probe = pSeries_probe, 1022 .setup_arch = pSeries_setup_arch, 1023 .init_IRQ = pseries_init_irq, 1024 .show_cpuinfo = pSeries_show_cpuinfo, 1025 .log_error = pSeries_log_error, 1026 .pcibios_fixup = pSeries_final_fixup, 1027 .restart = rtas_restart, 1028 .halt = rtas_halt, 1029 .panic = pseries_panic, 1030 .get_boot_time = rtas_get_boot_time, 1031 .get_rtc_time = rtas_get_rtc_time, 1032 .set_rtc_time = rtas_set_rtc_time, 1033 .calibrate_decr = generic_calibrate_decr, 1034 .progress = rtas_progress, 1035 .system_reset_exception = pSeries_system_reset_exception, 1036 .machine_check_early = pseries_machine_check_realmode, 1037 .machine_check_exception = pSeries_machine_check_exception, 1038 #ifdef CONFIG_KEXEC_CORE 1039 .machine_kexec = pSeries_machine_kexec, 1040 .kexec_cpu_down = pseries_kexec_cpu_down, 1041 #endif 1042 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE 1043 .memory_block_size = pseries_memory_block_size, 1044 #endif 1045 }; 1046