1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (C) 2001 Dave Engebretsen, IBM Corporation 4 * Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM 5 * 6 * pSeries specific routines for PCI. 7 */ 8 9 #include <linux/init.h> 10 #include <linux/ioport.h> 11 #include <linux/kernel.h> 12 #include <linux/pci.h> 13 #include <linux/string.h> 14 15 #include <asm/eeh.h> 16 #include <asm/pci-bridge.h> 17 #include <asm/ppc-pci.h> 18 #include <asm/pci.h> 19 #include "pseries.h" 20 21 #ifdef CONFIG_PCI_IOV 22 #define MAX_VFS_FOR_MAP_PE 256 23 struct pe_map_bar_entry { 24 __be64 bar; /* Input: Virtual Function BAR */ 25 __be16 rid; /* Input: Virtual Function Router ID */ 26 __be16 pe_num; /* Output: Virtual Function PE Number */ 27 __be32 reserved; /* Reserved Space */ 28 }; 29 30 static int pseries_send_map_pe(struct pci_dev *pdev, u16 num_vfs, 31 struct pe_map_bar_entry *vf_pe_array) 32 { 33 struct pci_dn *pdn; 34 int rc; 35 unsigned long buid, addr; 36 int ibm_map_pes = rtas_function_token(RTAS_FN_IBM_OPEN_SRIOV_MAP_PE_NUMBER); 37 38 if (ibm_map_pes == RTAS_UNKNOWN_SERVICE) 39 return -EINVAL; 40 41 pdn = pci_get_pdn(pdev); 42 addr = rtas_config_addr(pdn->busno, pdn->devfn, 0); 43 buid = pdn->phb->buid; 44 spin_lock(&rtas_data_buf_lock); 45 memcpy(rtas_data_buf, vf_pe_array, 46 RTAS_DATA_BUF_SIZE); 47 rc = rtas_call(ibm_map_pes, 5, 1, NULL, addr, 48 BUID_HI(buid), BUID_LO(buid), 49 rtas_data_buf, 50 num_vfs * sizeof(struct pe_map_bar_entry)); 51 memcpy(vf_pe_array, rtas_data_buf, RTAS_DATA_BUF_SIZE); 52 spin_unlock(&rtas_data_buf_lock); 53 54 if (rc) 55 dev_err(&pdev->dev, 56 "%s: Failed to associate pes PE#%lx, rc=%x\n", 57 __func__, addr, rc); 58 59 return rc; 60 } 61 62 static void pseries_set_pe_num(struct pci_dev *pdev, u16 vf_index, __be16 pe_num) 63 { 64 struct pci_dn *pdn; 65 66 pdn = pci_get_pdn(pdev); 67 pdn->pe_num_map[vf_index] = be16_to_cpu(pe_num); 68 dev_dbg(&pdev->dev, "VF %04x:%02x:%02x.%x associated with PE#%x\n", 69 pci_domain_nr(pdev->bus), 70 pdev->bus->number, 71 PCI_SLOT(pci_iov_virtfn_devfn(pdev, vf_index)), 72 PCI_FUNC(pci_iov_virtfn_devfn(pdev, vf_index)), 73 pdn->pe_num_map[vf_index]); 74 } 75 76 static int pseries_associate_pes(struct pci_dev *pdev, u16 num_vfs) 77 { 78 struct pci_dn *pdn; 79 int i, rc, vf_index; 80 struct pe_map_bar_entry *vf_pe_array; 81 struct resource *res; 82 u64 size; 83 84 vf_pe_array = kzalloc(RTAS_DATA_BUF_SIZE, GFP_KERNEL); 85 if (!vf_pe_array) 86 return -ENOMEM; 87 88 pdn = pci_get_pdn(pdev); 89 /* create firmware structure to associate pes */ 90 for (vf_index = 0; vf_index < num_vfs; vf_index++) { 91 pdn->pe_num_map[vf_index] = IODA_INVALID_PE; 92 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { 93 res = &pdev->resource[i + PCI_IOV_RESOURCES]; 94 if (!res->parent) 95 continue; 96 size = pcibios_iov_resource_alignment(pdev, i + 97 PCI_IOV_RESOURCES); 98 vf_pe_array[vf_index].bar = 99 cpu_to_be64(res->start + size * vf_index); 100 vf_pe_array[vf_index].rid = 101 cpu_to_be16((pci_iov_virtfn_bus(pdev, vf_index) 102 << 8) | pci_iov_virtfn_devfn(pdev, 103 vf_index)); 104 vf_pe_array[vf_index].pe_num = 105 cpu_to_be16(IODA_INVALID_PE); 106 } 107 } 108 109 rc = pseries_send_map_pe(pdev, num_vfs, vf_pe_array); 110 /* Only zero is success */ 111 if (!rc) 112 for (vf_index = 0; vf_index < num_vfs; vf_index++) 113 pseries_set_pe_num(pdev, vf_index, 114 vf_pe_array[vf_index].pe_num); 115 116 kfree(vf_pe_array); 117 return rc; 118 } 119 120 static int pseries_pci_sriov_enable(struct pci_dev *pdev, u16 num_vfs) 121 { 122 struct pci_dn *pdn; 123 int rc; 124 const int *max_vfs; 125 int max_config_vfs; 126 struct device_node *dn = pci_device_to_OF_node(pdev); 127 128 max_vfs = of_get_property(dn, "ibm,number-of-configurable-vfs", NULL); 129 130 if (!max_vfs) 131 return -EINVAL; 132 133 /* First integer stores max config */ 134 max_config_vfs = of_read_number(&max_vfs[0], 1); 135 if (max_config_vfs < num_vfs) { 136 dev_err(&pdev->dev, "Num VFs %x > %x Configurable VFs\n", 137 num_vfs, max_config_vfs); 138 return -EINVAL; 139 } 140 if (num_vfs > MAX_VFS_FOR_MAP_PE) { 141 dev_err(&pdev->dev, "Num VFs %x > %x PE mapping limit\n", 142 num_vfs, MAX_VFS_FOR_MAP_PE); 143 return -EINVAL; 144 } 145 146 pdn = pci_get_pdn(pdev); 147 pdn->pe_num_map = kmalloc_objs(*pdn->pe_num_map, num_vfs); 148 if (!pdn->pe_num_map) 149 return -ENOMEM; 150 151 rc = pseries_associate_pes(pdev, num_vfs); 152 153 /* Anything other than zero is failure */ 154 if (rc) { 155 dev_err(&pdev->dev, "Failure to enable sriov: %x\n", rc); 156 kfree(pdn->pe_num_map); 157 } else { 158 pci_vf_drivers_autoprobe(pdev, false); 159 } 160 161 return rc; 162 } 163 164 static int pseries_pcibios_sriov_enable(struct pci_dev *pdev, u16 num_vfs) 165 { 166 /* Allocate PCI data */ 167 add_sriov_vf_pdns(pdev); 168 return pseries_pci_sriov_enable(pdev, num_vfs); 169 } 170 171 static int pseries_pcibios_sriov_disable(struct pci_dev *pdev) 172 { 173 struct pci_dn *pdn; 174 175 pdn = pci_get_pdn(pdev); 176 /* Releasing pe_num_map */ 177 kfree(pdn->pe_num_map); 178 /* Release PCI data */ 179 remove_sriov_vf_pdns(pdev); 180 pci_vf_drivers_autoprobe(pdev, true); 181 return 0; 182 } 183 #endif 184 185 static void __init pSeries_request_regions(void) 186 { 187 if (!isa_io_base) 188 return; 189 190 request_region(0x20,0x20,"pic1"); 191 request_region(0xa0,0x20,"pic2"); 192 request_region(0x00,0x20,"dma1"); 193 request_region(0x40,0x20,"timer"); 194 request_region(0x80,0x10,"dma page reg"); 195 request_region(0xc0,0x20,"dma2"); 196 } 197 198 void __init pSeries_final_fixup(void) 199 { 200 pSeries_request_regions(); 201 202 eeh_show_enabled(); 203 204 #ifdef CONFIG_PCI_IOV 205 ppc_md.pcibios_sriov_enable = pseries_pcibios_sriov_enable; 206 ppc_md.pcibios_sriov_disable = pseries_pcibios_sriov_disable; 207 #endif 208 } 209 210 /* 211 * Assume the winbond 82c105 is the IDE controller on a 212 * p610/p615/p630. We should probably be more careful in case 213 * someone tries to plug in a similar adapter. 214 */ 215 static void fixup_winbond_82c105(struct pci_dev* dev) 216 { 217 struct resource *r; 218 unsigned int reg; 219 220 if (!machine_is(pseries)) 221 return; 222 223 printk("Using INTC for W82c105 IDE controller.\n"); 224 pci_read_config_dword(dev, 0x40, ®); 225 /* Enable LEGIRQ to use INTC instead of ISA interrupts */ 226 pci_write_config_dword(dev, 0x40, reg | (1<<11)); 227 228 pci_dev_for_each_resource(dev, r) { 229 /* zap the 2nd function of the winbond chip */ 230 if (dev->bus->number == 0 && dev->devfn == 0x81 && 231 r->flags & IORESOURCE_IO) 232 r->flags &= ~IORESOURCE_IO; 233 if (r->start == 0 && r->end) { 234 r->flags = 0; 235 r->end = 0; 236 } 237 } 238 } 239 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105, 240 fixup_winbond_82c105); 241 242 static enum pci_bus_speed prop_to_pci_speed(u32 prop) 243 { 244 switch (prop) { 245 case 0x01: 246 return PCIE_SPEED_2_5GT; 247 case 0x02: 248 return PCIE_SPEED_5_0GT; 249 case 0x04: 250 return PCIE_SPEED_8_0GT; 251 case 0x08: 252 return PCIE_SPEED_16_0GT; 253 case 0x10: 254 return PCIE_SPEED_32_0GT; 255 default: 256 pr_debug("Unexpected PCI link speed property value\n"); 257 return PCI_SPEED_UNKNOWN; 258 } 259 } 260 261 int pseries_root_bridge_prepare(struct pci_host_bridge *bridge) 262 { 263 struct device_node *dn, *pdn; 264 struct pci_bus *bus; 265 u32 pcie_link_speed_stats[2]; 266 int rc; 267 268 bus = bridge->bus; 269 270 /* Rely on the pcibios_free_controller_deferred() callback. */ 271 pci_set_host_bridge_release(bridge, pcibios_free_controller_deferred, 272 (void *) pci_bus_to_host(bus)); 273 274 dn = pcibios_get_phb_of_node(bus); 275 if (!dn) 276 return 0; 277 278 for (pdn = dn; pdn != NULL; pdn = of_get_next_parent(pdn)) { 279 rc = of_property_read_u32_array(pdn, 280 "ibm,pcie-link-speed-stats", 281 &pcie_link_speed_stats[0], 2); 282 if (!rc) 283 break; 284 } 285 286 of_node_put(pdn); 287 288 if (rc) { 289 pr_debug("no ibm,pcie-link-speed-stats property\n"); 290 return 0; 291 } 292 293 bus->max_bus_speed = prop_to_pci_speed(pcie_link_speed_stats[0]); 294 bus->cur_bus_speed = prop_to_pci_speed(pcie_link_speed_stats[1]); 295 return 0; 296 } 297