1# SPDX-License-Identifier: GPL-2.0 2config PPC_PSERIES 3 depends on PPC64 && PPC_BOOK3S 4 bool "IBM pSeries & new (POWER5-based) iSeries" 5 select HAVE_PCSPKR_PLATFORM 6 select MPIC 7 select OF_DYNAMIC 8 select FORCE_PCI 9 select PCI_MSI 10 select PPC_XICS 11 select PPC_XIVE_SPAPR 12 select PPC_ICP_NATIVE 13 select PPC_ICP_HV 14 select PPC_ICS_RTAS 15 select PPC_I8259 16 select PPC_RTAS 17 select PPC_RTAS_DAEMON 18 select RTAS_ERROR_LOGGING 19 select PPC_UDBG_16550 20 select PPC_DOORBELL 21 select HOTPLUG_CPU 22 select FORCE_SMP 23 select SWIOTLB 24 default y 25 26config PARAVIRT 27 bool 28 29config PARAVIRT_SPINLOCKS 30 bool 31 32config PARAVIRT_TIME_ACCOUNTING 33 select PARAVIRT 34 bool 35 36config PPC_SPLPAR 37 bool "Support for shared-processor logical partitions" 38 depends on PPC_PSERIES 39 select PARAVIRT_SPINLOCKS if PPC_QUEUED_SPINLOCKS 40 select PARAVIRT_TIME_ACCOUNTING if VIRT_CPU_ACCOUNTING_GEN 41 default y 42 help 43 Enabling this option will make the kernel run more efficiently 44 on logically-partitioned pSeries systems which use shared 45 processors, that is, which share physical processors between 46 two or more partitions. 47 48 Say Y if you are unsure. 49 50config DTL 51 bool "Dispatch Trace Log" 52 depends on PPC_SPLPAR && DEBUG_FS 53 help 54 SPLPAR machines can log hypervisor preempt & dispatch events to a 55 kernel buffer. Saying Y here will enable logging these events, 56 which are accessible through a debugfs file. 57 58 Say N if you are unsure. 59 60config PSERIES_ENERGY 61 tristate "pSeries energy management capabilities driver" 62 depends on PPC_PSERIES 63 default y 64 help 65 Provides interface to platform energy management capabilities 66 on supported PSERIES platforms. 67 Provides: /sys/devices/system/cpu/pseries_(de)activation_hint_list 68 and /sys/devices/system/cpu/cpuN/pseries_(de)activation_hint 69 70config IO_EVENT_IRQ 71 bool "IO Event Interrupt support" 72 depends on PPC_PSERIES 73 default y 74 help 75 Select this option, if you want to enable support for IO Event 76 interrupts. IO event interrupt is a mechanism provided by RTAS 77 to return information about hardware error and non-error events 78 which may need OS attention. RTAS returns events for multiple 79 event types and scopes. Device drivers can register their handlers 80 to receive events. 81 82 This option will only enable the IO event platform code. You 83 will still need to enable or compile the actual drivers 84 that use this infrastructure to handle IO event interrupts. 85 86 Say Y if you are unsure. 87 88config LPARCFG 89 bool "LPAR Configuration Data" 90 depends on PPC_PSERIES 91 help 92 Provide system capacity information via human readable 93 <key word>=<value> pairs through a /proc/ppc64/lparcfg interface. 94 95config PPC_PSERIES_DEBUG 96 depends on PPC_PSERIES && PPC_EARLY_DEBUG 97 bool "Enable extra debug logging in platforms/pseries" 98 default y 99 help 100 Say Y here if you want the pseries core to produce a bunch of 101 debug messages to the system log. Select this if you are having a 102 problem with the pseries core and want to see more of what is 103 going on. This does not enable debugging in lpar.c, which must 104 be manually done due to its verbosity. 105 106config PPC_SMLPAR 107 bool "Support for shared-memory logical partitions" 108 depends on PPC_PSERIES 109 select LPARCFG 110 help 111 Select this option to enable shared memory partition support. 112 With this option a system running in an LPAR can be given more 113 memory than physically available and will allow firmware to 114 balance memory across many LPARs. 115 116config CMM 117 tristate "Collaborative memory management" 118 depends on PPC_SMLPAR 119 select MEMORY_BALLOON 120 default y 121 help 122 Select this option, if you want to enable the kernel interface 123 to reduce the memory size of the system. This is accomplished 124 by allocating pages of memory and put them "on hold". This only 125 makes sense for a system running in an LPAR where the unused pages 126 will be reused for other LPARs. The interface allows firmware to 127 balance memory across many LPARs. 128 129config HV_PERF_CTRS 130 bool "Hypervisor supplied PMU events (24x7 & GPCI)" 131 default y 132 depends on PERF_EVENTS && PPC_PSERIES 133 help 134 Enable access to hypervisor supplied counters in perf. Currently, 135 this enables code that uses the hcall GetPerfCounterInfo and 24x7 136 interfaces to retrieve counters. GPCI exists on Power 6 and later 137 systems. 24x7 is available on Power 8 and later systems. 138 139 If unsure, select Y. 140 141config IBMVIO 142 depends on PPC_PSERIES 143 bool 144 default y 145 146config IBMEBUS 147 depends on PPC_PSERIES && !CPU_LITTLE_ENDIAN 148 bool "Support for GX bus based adapters" 149 help 150 Bus device driver for GX bus based adapters. 151 152config PSERIES_PLPKS 153 depends on PPC_PSERIES 154 bool "Support for the Platform Key Storage" 155 help 156 PowerVM provides an isolated Platform Keystore(PKS) storage 157 allocation for each LPAR with individually managed access 158 controls to store sensitive information securely. It can be 159 used to store asymmetric public keys or secrets as required 160 by different usecases. Select this config to enable 161 operating system interface to hypervisor to access this space. 162 163 If unsure, select N. 164 165config PAPR_SCM 166 depends on PPC_PSERIES && MEMORY_HOTPLUG && LIBNVDIMM 167 tristate "Support for the PAPR Storage Class Memory interface" 168 help 169 Enable access to hypervisor provided storage class memory. 170 171config PPC_SVM 172 bool "Secure virtual machine (SVM) support for POWER" 173 depends on PPC_PSERIES 174 select SWIOTLB 175 select ARCH_HAS_MEM_ENCRYPT 176 select ARCH_HAS_FORCE_DMA_UNENCRYPTED 177 select ARCH_HAS_CC_PLATFORM 178 help 179 There are certain POWER platforms which support secure guests using 180 the Protected Execution Facility, with the help of an Ultravisor 181 executing below the hypervisor layer. This enables support for 182 those guests. 183 184 If unsure, say "N". 185