1 #ifndef __POWERNV_PCI_H 2 #define __POWERNV_PCI_H 3 4 struct pci_dn; 5 6 enum pnv_phb_type { 7 PNV_PHB_P5IOC2, 8 PNV_PHB_IODA1, 9 PNV_PHB_IODA2, 10 }; 11 12 struct pnv_phb { 13 struct pci_controller *hose; 14 enum pnv_phb_type type; 15 u64 opal_id; 16 void __iomem *regs; 17 spinlock_t lock; 18 19 #ifdef CONFIG_PCI_MSI 20 unsigned long *msi_map; 21 unsigned int msi_base; 22 unsigned int msi_count; 23 unsigned int msi_next; 24 unsigned int msi32_support; 25 #endif 26 int (*msi_setup)(struct pnv_phb *phb, struct pci_dev *dev, 27 unsigned int hwirq, unsigned int is_64, 28 struct msi_msg *msg); 29 void (*dma_dev_setup)(struct pnv_phb *phb, struct pci_dev *pdev); 30 void (*fixup_phb)(struct pci_controller *hose); 31 u32 (*bdfn_to_pe)(struct pnv_phb *phb, struct pci_bus *bus, u32 devfn); 32 33 union { 34 struct { 35 struct iommu_table iommu_table; 36 } p5ioc2; 37 }; 38 }; 39 40 extern struct pci_ops pnv_pci_ops; 41 42 extern void pnv_pci_setup_iommu_table(struct iommu_table *tbl, 43 void *tce_mem, u64 tce_size, 44 u64 dma_offset); 45 extern void pnv_pci_init_p5ioc2_hub(struct device_node *np); 46 47 48 #endif /* __POWERNV_PCI_H */ 49