xref: /linux/arch/powerpc/platforms/powermac/setup.c (revision f8343685643f2901fe11aa9d0358cafbeaf7b4c3)
1 /*
2  *  Powermac setup and early boot code plus other random bits.
3  *
4  *  PowerPC version
5  *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
6  *
7  *  Adapted for Power Macintosh by Paul Mackerras
8  *    Copyright (C) 1996 Paul Mackerras (paulus@samba.org)
9  *
10  *  Derived from "arch/alpha/kernel/setup.c"
11  *    Copyright (C) 1995 Linus Torvalds
12  *
13  *  Maintained by Benjamin Herrenschmidt (benh@kernel.crashing.org)
14  *
15  *  This program is free software; you can redistribute it and/or
16  *  modify it under the terms of the GNU General Public License
17  *  as published by the Free Software Foundation; either version
18  *  2 of the License, or (at your option) any later version.
19  *
20  */
21 
22 /*
23  * bootup setup stuff..
24  */
25 
26 #include <linux/init.h>
27 #include <linux/errno.h>
28 #include <linux/sched.h>
29 #include <linux/kernel.h>
30 #include <linux/mm.h>
31 #include <linux/stddef.h>
32 #include <linux/unistd.h>
33 #include <linux/ptrace.h>
34 #include <linux/slab.h>
35 #include <linux/user.h>
36 #include <linux/a.out.h>
37 #include <linux/tty.h>
38 #include <linux/string.h>
39 #include <linux/delay.h>
40 #include <linux/ioport.h>
41 #include <linux/major.h>
42 #include <linux/initrd.h>
43 #include <linux/vt_kern.h>
44 #include <linux/console.h>
45 #include <linux/pci.h>
46 #include <linux/adb.h>
47 #include <linux/cuda.h>
48 #include <linux/pmu.h>
49 #include <linux/irq.h>
50 #include <linux/seq_file.h>
51 #include <linux/root_dev.h>
52 #include <linux/bitops.h>
53 #include <linux/suspend.h>
54 
55 #include <asm/reg.h>
56 #include <asm/sections.h>
57 #include <asm/prom.h>
58 #include <asm/system.h>
59 #include <asm/pgtable.h>
60 #include <asm/io.h>
61 #include <asm/kexec.h>
62 #include <asm/pci-bridge.h>
63 #include <asm/ohare.h>
64 #include <asm/mediabay.h>
65 #include <asm/machdep.h>
66 #include <asm/dma.h>
67 #include <asm/cputable.h>
68 #include <asm/btext.h>
69 #include <asm/pmac_feature.h>
70 #include <asm/time.h>
71 #include <asm/of_device.h>
72 #include <asm/of_platform.h>
73 #include <asm/mmu_context.h>
74 #include <asm/iommu.h>
75 #include <asm/smu.h>
76 #include <asm/pmc.h>
77 #include <asm/lmb.h>
78 #include <asm/udbg.h>
79 
80 #include "pmac.h"
81 
82 #undef SHOW_GATWICK_IRQS
83 
84 int ppc_override_l2cr = 0;
85 int ppc_override_l2cr_value;
86 int has_l2cache = 0;
87 
88 int pmac_newworld;
89 
90 static int current_root_goodness = -1;
91 
92 extern struct machdep_calls pmac_md;
93 
94 #define DEFAULT_ROOT_DEVICE Root_SDA1	/* sda1 - slightly silly choice */
95 
96 #ifdef CONFIG_PPC64
97 #include <asm/udbg.h>
98 int sccdbg;
99 #endif
100 
101 extern void zs_kgdb_hook(int tty_num);
102 
103 sys_ctrler_t sys_ctrler = SYS_CTRLER_UNKNOWN;
104 EXPORT_SYMBOL(sys_ctrler);
105 
106 #ifdef CONFIG_PMAC_SMU
107 unsigned long smu_cmdbuf_abs;
108 EXPORT_SYMBOL(smu_cmdbuf_abs);
109 #endif
110 
111 #ifdef CONFIG_SMP
112 extern struct smp_ops_t psurge_smp_ops;
113 extern struct smp_ops_t core99_smp_ops;
114 #endif /* CONFIG_SMP */
115 
116 static void pmac_show_cpuinfo(struct seq_file *m)
117 {
118 	struct device_node *np;
119 	const char *pp;
120 	int plen;
121 	int mbmodel;
122 	unsigned int mbflags;
123 	char* mbname;
124 
125 	mbmodel = pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL,
126 				    PMAC_MB_INFO_MODEL, 0);
127 	mbflags = pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL,
128 				    PMAC_MB_INFO_FLAGS, 0);
129 	if (pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL, PMAC_MB_INFO_NAME,
130 			      (long) &mbname) != 0)
131 		mbname = "Unknown";
132 
133 	/* find motherboard type */
134 	seq_printf(m, "machine\t\t: ");
135 	np = of_find_node_by_path("/");
136 	if (np != NULL) {
137 		pp = of_get_property(np, "model", NULL);
138 		if (pp != NULL)
139 			seq_printf(m, "%s\n", pp);
140 		else
141 			seq_printf(m, "PowerMac\n");
142 		pp = of_get_property(np, "compatible", &plen);
143 		if (pp != NULL) {
144 			seq_printf(m, "motherboard\t:");
145 			while (plen > 0) {
146 				int l = strlen(pp) + 1;
147 				seq_printf(m, " %s", pp);
148 				plen -= l;
149 				pp += l;
150 			}
151 			seq_printf(m, "\n");
152 		}
153 		of_node_put(np);
154 	} else
155 		seq_printf(m, "PowerMac\n");
156 
157 	/* print parsed model */
158 	seq_printf(m, "detected as\t: %d (%s)\n", mbmodel, mbname);
159 	seq_printf(m, "pmac flags\t: %08x\n", mbflags);
160 
161 	/* find l2 cache info */
162 	np = of_find_node_by_name(NULL, "l2-cache");
163 	if (np == NULL)
164 		np = of_find_node_by_type(NULL, "cache");
165 	if (np != NULL) {
166 		const unsigned int *ic =
167 			of_get_property(np, "i-cache-size", NULL);
168 		const unsigned int *dc =
169 			of_get_property(np, "d-cache-size", NULL);
170 		seq_printf(m, "L2 cache\t:");
171 		has_l2cache = 1;
172 		if (of_get_property(np, "cache-unified", NULL) != 0 && dc) {
173 			seq_printf(m, " %dK unified", *dc / 1024);
174 		} else {
175 			if (ic)
176 				seq_printf(m, " %dK instruction", *ic / 1024);
177 			if (dc)
178 				seq_printf(m, "%s %dK data",
179 					   (ic? " +": ""), *dc / 1024);
180 		}
181 		pp = of_get_property(np, "ram-type", NULL);
182 		if (pp)
183 			seq_printf(m, " %s", pp);
184 		seq_printf(m, "\n");
185 		of_node_put(np);
186 	}
187 
188 	/* Indicate newworld/oldworld */
189 	seq_printf(m, "pmac-generation\t: %s\n",
190 		   pmac_newworld ? "NewWorld" : "OldWorld");
191 }
192 
193 #ifndef CONFIG_ADB_CUDA
194 int find_via_cuda(void)
195 {
196 	struct device_node *dn = of_find_node_by_name(NULL, "via-cuda");
197 
198 	if (!dn)
199 		return 0;
200 	of_node_put(dn);
201 	printk("WARNING ! Your machine is CUDA-based but your kernel\n");
202 	printk("          wasn't compiled with CONFIG_ADB_CUDA option !\n");
203 	return 0;
204 }
205 #endif
206 
207 #ifndef CONFIG_ADB_PMU
208 int find_via_pmu(void)
209 {
210 	struct device_node *dn = of_find_node_by_name(NULL, "via-pmu");
211 
212 	if (!dn)
213 		return 0;
214 	of_node_put(dn);
215 	printk("WARNING ! Your machine is PMU-based but your kernel\n");
216 	printk("          wasn't compiled with CONFIG_ADB_PMU option !\n");
217 	return 0;
218 }
219 #endif
220 
221 #ifndef CONFIG_PMAC_SMU
222 int smu_init(void)
223 {
224 	/* should check and warn if SMU is present */
225 	return 0;
226 }
227 #endif
228 
229 #ifdef CONFIG_PPC32
230 static volatile u32 *sysctrl_regs;
231 
232 static void __init ohare_init(void)
233 {
234 	struct device_node *dn;
235 
236 	/* this area has the CPU identification register
237 	   and some registers used by smp boards */
238 	sysctrl_regs = (volatile u32 *) ioremap(0xf8000000, 0x1000);
239 
240 	/*
241 	 * Turn on the L2 cache.
242 	 * We assume that we have a PSX memory controller iff
243 	 * we have an ohare I/O controller.
244 	 */
245 	dn = of_find_node_by_name(NULL, "ohare");
246 	if (dn) {
247 		of_node_put(dn);
248 		if (((sysctrl_regs[2] >> 24) & 0xf) >= 3) {
249 			if (sysctrl_regs[4] & 0x10)
250 				sysctrl_regs[4] |= 0x04000020;
251 			else
252 				sysctrl_regs[4] |= 0x04000000;
253 			if(has_l2cache)
254 				printk(KERN_INFO "Level 2 cache enabled\n");
255 		}
256 	}
257 }
258 
259 static void __init l2cr_init(void)
260 {
261 	/* Checks "l2cr-value" property in the registry */
262 	if (cpu_has_feature(CPU_FTR_L2CR)) {
263 		struct device_node *np = of_find_node_by_name(NULL, "cpus");
264 		if (np == 0)
265 			np = of_find_node_by_type(NULL, "cpu");
266 		if (np != 0) {
267 			const unsigned int *l2cr =
268 				of_get_property(np, "l2cr-value", NULL);
269 			if (l2cr != 0) {
270 				ppc_override_l2cr = 1;
271 				ppc_override_l2cr_value = *l2cr;
272 				_set_L2CR(0);
273 				_set_L2CR(ppc_override_l2cr_value);
274 			}
275 			of_node_put(np);
276 		}
277 	}
278 
279 	if (ppc_override_l2cr)
280 		printk(KERN_INFO "L2CR overridden (0x%x), "
281 		       "backside cache is %s\n",
282 		       ppc_override_l2cr_value,
283 		       (ppc_override_l2cr_value & 0x80000000)
284 				? "enabled" : "disabled");
285 }
286 #endif
287 
288 static void __init pmac_setup_arch(void)
289 {
290 	struct device_node *cpu, *ic;
291 	const int *fp;
292 	unsigned long pvr;
293 
294 	pvr = PVR_VER(mfspr(SPRN_PVR));
295 
296 	/* Set loops_per_jiffy to a half-way reasonable value,
297 	   for use until calibrate_delay gets called. */
298 	loops_per_jiffy = 50000000 / HZ;
299 	cpu = of_find_node_by_type(NULL, "cpu");
300 	if (cpu != NULL) {
301 		fp = of_get_property(cpu, "clock-frequency", NULL);
302 		if (fp != NULL) {
303 			if (pvr >= 0x30 && pvr < 0x80)
304 				/* PPC970 etc. */
305 				loops_per_jiffy = *fp / (3 * HZ);
306 			else if (pvr == 4 || pvr >= 8)
307 				/* 604, G3, G4 etc. */
308 				loops_per_jiffy = *fp / HZ;
309 			else
310 				/* 601, 603, etc. */
311 				loops_per_jiffy = *fp / (2 * HZ);
312 		}
313 		of_node_put(cpu);
314 	}
315 
316 	/* See if newworld or oldworld */
317 	for (ic = NULL; (ic = of_find_all_nodes(ic)) != NULL; )
318 		if (of_get_property(ic, "interrupt-controller", NULL))
319 			break;
320 	if (ic) {
321 		pmac_newworld = 1;
322 		of_node_put(ic);
323 	}
324 
325 	/* Lookup PCI hosts */
326 	pmac_pci_init();
327 
328 #ifdef CONFIG_PPC32
329 	ohare_init();
330 	l2cr_init();
331 #endif /* CONFIG_PPC32 */
332 
333 #ifdef CONFIG_KGDB
334 	zs_kgdb_hook(0);
335 #endif
336 
337 	find_via_cuda();
338 	find_via_pmu();
339 	smu_init();
340 
341 #if defined(CONFIG_NVRAM) || defined(CONFIG_PPC64)
342 	pmac_nvram_init();
343 #endif
344 
345 #ifdef CONFIG_PPC32
346 #ifdef CONFIG_BLK_DEV_INITRD
347 	if (initrd_start)
348 		ROOT_DEV = Root_RAM0;
349 	else
350 #endif
351 		ROOT_DEV = DEFAULT_ROOT_DEVICE;
352 #endif
353 
354 #ifdef CONFIG_SMP
355 	/* Check for Core99 */
356 	ic = of_find_node_by_name(NULL, "uni-n");
357 	if (!ic)
358 		ic = of_find_node_by_name(NULL, "u3");
359 	if (!ic)
360 		ic = of_find_node_by_name(NULL, "u4");
361 	if (ic) {
362 		of_node_put(ic);
363 		smp_ops = &core99_smp_ops;
364 	}
365 #ifdef CONFIG_PPC32
366 	else
367 		smp_ops = &psurge_smp_ops;
368 #endif
369 #endif /* CONFIG_SMP */
370 
371 #ifdef CONFIG_ADB
372 	if (strstr(cmd_line, "adb_sync")) {
373 		extern int __adb_probe_sync;
374 		__adb_probe_sync = 1;
375 	}
376 #endif /* CONFIG_ADB */
377 }
378 
379 char *bootpath;
380 char *bootdevice;
381 void *boot_host;
382 int boot_target;
383 int boot_part;
384 static dev_t boot_dev;
385 
386 #ifdef CONFIG_SCSI
387 void note_scsi_host(struct device_node *node, void *host)
388 {
389 	int l;
390 	char *p;
391 
392 	l = strlen(node->full_name);
393 	if (bootpath != NULL && bootdevice != NULL
394 	    && strncmp(node->full_name, bootdevice, l) == 0
395 	    && (bootdevice[l] == '/' || bootdevice[l] == 0)) {
396 		boot_host = host;
397 		/*
398 		 * There's a bug in OF 1.0.5.  (Why am I not surprised.)
399 		 * If you pass a path like scsi/sd@1:0 to canon, it returns
400 		 * something like /bandit@F2000000/gc@10/53c94@10000/sd@0,0
401 		 * That is, the scsi target number doesn't get preserved.
402 		 * So we pick the target number out of bootpath and use that.
403 		 */
404 		p = strstr(bootpath, "/sd@");
405 		if (p != NULL) {
406 			p += 4;
407 			boot_target = simple_strtoul(p, NULL, 10);
408 			p = strchr(p, ':');
409 			if (p != NULL)
410 				boot_part = simple_strtoul(p + 1, NULL, 10);
411 		}
412 	}
413 }
414 EXPORT_SYMBOL(note_scsi_host);
415 #endif
416 
417 #if defined(CONFIG_BLK_DEV_IDE) && defined(CONFIG_BLK_DEV_IDE_PMAC)
418 static dev_t __init find_ide_boot(void)
419 {
420 	char *p;
421 	int n;
422 	dev_t __init pmac_find_ide_boot(char *bootdevice, int n);
423 
424 	if (bootdevice == NULL)
425 		return 0;
426 	p = strrchr(bootdevice, '/');
427 	if (p == NULL)
428 		return 0;
429 	n = p - bootdevice;
430 
431 	return pmac_find_ide_boot(bootdevice, n);
432 }
433 #endif /* CONFIG_BLK_DEV_IDE && CONFIG_BLK_DEV_IDE_PMAC */
434 
435 static void __init find_boot_device(void)
436 {
437 #if defined(CONFIG_BLK_DEV_IDE) && defined(CONFIG_BLK_DEV_IDE_PMAC)
438 	boot_dev = find_ide_boot();
439 #endif
440 }
441 
442 static int initializing = 1;
443 
444 static int pmac_late_init(void)
445 {
446 	initializing = 0;
447 	/* this is udbg (which is __init) and we can later use it during
448 	 * cpu hotplug (in smp_core99_kick_cpu) */
449 	ppc_md.progress = NULL;
450 	return 0;
451 }
452 
453 late_initcall(pmac_late_init);
454 
455 /* can't be __init - can be called whenever a disk is first accessed */
456 void note_bootable_part(dev_t dev, int part, int goodness)
457 {
458 	static int found_boot = 0;
459 	char *p;
460 
461 	if (!initializing)
462 		return;
463 	if ((goodness <= current_root_goodness) &&
464 	    ROOT_DEV != DEFAULT_ROOT_DEVICE)
465 		return;
466 	p = strstr(boot_command_line, "root=");
467 	if (p != NULL && (p == boot_command_line || p[-1] == ' '))
468 		return;
469 
470 	if (!found_boot) {
471 		find_boot_device();
472 		found_boot = 1;
473 	}
474 	if (!boot_dev || dev == boot_dev) {
475 		ROOT_DEV = dev + part;
476 		boot_dev = 0;
477 		current_root_goodness = goodness;
478 	}
479 }
480 
481 #ifdef CONFIG_ADB_CUDA
482 static void cuda_restart(void)
483 {
484 	struct adb_request req;
485 
486 	cuda_request(&req, NULL, 2, CUDA_PACKET, CUDA_RESET_SYSTEM);
487 	for (;;)
488 		cuda_poll();
489 }
490 
491 static void cuda_shutdown(void)
492 {
493 	struct adb_request req;
494 
495 	cuda_request(&req, NULL, 2, CUDA_PACKET, CUDA_POWERDOWN);
496 	for (;;)
497 		cuda_poll();
498 }
499 
500 #else
501 #define cuda_restart()
502 #define cuda_shutdown()
503 #endif
504 
505 #ifndef CONFIG_ADB_PMU
506 #define pmu_restart()
507 #define pmu_shutdown()
508 #endif
509 
510 #ifndef CONFIG_PMAC_SMU
511 #define smu_restart()
512 #define smu_shutdown()
513 #endif
514 
515 static void pmac_restart(char *cmd)
516 {
517 	switch (sys_ctrler) {
518 	case SYS_CTRLER_CUDA:
519 		cuda_restart();
520 		break;
521 	case SYS_CTRLER_PMU:
522 		pmu_restart();
523 		break;
524 	case SYS_CTRLER_SMU:
525 		smu_restart();
526 		break;
527 	default: ;
528 	}
529 }
530 
531 static void pmac_power_off(void)
532 {
533 	switch (sys_ctrler) {
534 	case SYS_CTRLER_CUDA:
535 		cuda_shutdown();
536 		break;
537 	case SYS_CTRLER_PMU:
538 		pmu_shutdown();
539 		break;
540 	case SYS_CTRLER_SMU:
541 		smu_shutdown();
542 		break;
543 	default: ;
544 	}
545 }
546 
547 static void
548 pmac_halt(void)
549 {
550 	pmac_power_off();
551 }
552 
553 /*
554  * Early initialization.
555  */
556 static void __init pmac_init_early(void)
557 {
558 	/* Enable early btext debug if requested */
559 	if (strstr(cmd_line, "btextdbg")) {
560 		udbg_adb_init_early();
561 		register_early_udbg_console();
562 	}
563 
564 	/* Probe motherboard chipset */
565 	pmac_feature_init();
566 
567 	/* Initialize debug stuff */
568 	udbg_scc_init(!!strstr(cmd_line, "sccdbg"));
569 	udbg_adb_init(!!strstr(cmd_line, "btextdbg"));
570 
571 #ifdef CONFIG_PPC64
572 	iommu_init_early_dart();
573 #endif
574 }
575 
576 static int __init pmac_declare_of_platform_devices(void)
577 {
578 	struct device_node *np;
579 
580 	if (machine_is(chrp))
581 		return -1;
582 
583 	if (!machine_is(powermac))
584 		return 0;
585 
586 	np = of_find_node_by_name(NULL, "valkyrie");
587 	if (np)
588 		of_platform_device_create(np, "valkyrie", NULL);
589 	np = of_find_node_by_name(NULL, "platinum");
590 	if (np)
591 		of_platform_device_create(np, "platinum", NULL);
592         np = of_find_node_by_type(NULL, "smu");
593         if (np) {
594 		of_platform_device_create(np, "smu", NULL);
595 		of_node_put(np);
596 	}
597 
598 	return 0;
599 }
600 
601 device_initcall(pmac_declare_of_platform_devices);
602 
603 /*
604  * Called very early, MMU is off, device-tree isn't unflattened
605  */
606 static int __init pmac_probe(void)
607 {
608 	unsigned long root = of_get_flat_dt_root();
609 
610 	if (!of_flat_dt_is_compatible(root, "Power Macintosh") &&
611 	    !of_flat_dt_is_compatible(root, "MacRISC"))
612 		return 0;
613 
614 #ifdef CONFIG_PPC64
615 	/*
616 	 * On U3, the DART (iommu) must be allocated now since it
617 	 * has an impact on htab_initialize (due to the large page it
618 	 * occupies having to be broken up so the DART itself is not
619 	 * part of the cacheable linar mapping
620 	 */
621 	alloc_dart_table();
622 
623 	hpte_init_native();
624 #endif
625 
626 #ifdef CONFIG_PPC32
627 	/* isa_io_base gets set in pmac_pci_init */
628 	ISA_DMA_THRESHOLD = ~0L;
629 	DMA_MODE_READ = 1;
630 	DMA_MODE_WRITE = 2;
631 
632 #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
633 #ifdef CONFIG_BLK_DEV_IDE_PMAC
634         ppc_ide_md.ide_init_hwif	= pmac_ide_init_hwif_ports;
635         ppc_ide_md.default_io_base	= pmac_ide_get_base;
636 #endif /* CONFIG_BLK_DEV_IDE_PMAC */
637 #endif /* defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE) */
638 
639 #endif /* CONFIG_PPC32 */
640 
641 #ifdef CONFIG_PMAC_SMU
642 	/*
643 	 * SMU based G5s need some memory below 2Gb, at least the current
644 	 * driver needs that. We have to allocate it now. We allocate 4k
645 	 * (1 small page) for now.
646 	 */
647 	smu_cmdbuf_abs = lmb_alloc_base(4096, 4096, 0x80000000UL);
648 #endif /* CONFIG_PMAC_SMU */
649 
650 	return 1;
651 }
652 
653 #ifdef CONFIG_PPC64
654 /* Move that to pci.c */
655 static int pmac_pci_probe_mode(struct pci_bus *bus)
656 {
657 	struct device_node *node = bus->sysdata;
658 
659 	/* We need to use normal PCI probing for the AGP bus,
660 	 * since the device for the AGP bridge isn't in the tree.
661 	 */
662 	if (bus->self == NULL && (of_device_is_compatible(node, "u3-agp") ||
663 				  of_device_is_compatible(node, "u4-pcie")))
664 		return PCI_PROBE_NORMAL;
665 	return PCI_PROBE_DEVTREE;
666 }
667 
668 #ifdef CONFIG_HOTPLUG_CPU
669 /* access per cpu vars from generic smp.c */
670 DECLARE_PER_CPU(int, cpu_state);
671 
672 static void pmac_cpu_die(void)
673 {
674 	/*
675 	 * turn off as much as possible, we'll be
676 	 * kicked out as this will only be invoked
677 	 * on core99 platforms for now ...
678 	 */
679 
680 	printk(KERN_INFO "CPU#%d offline\n", smp_processor_id());
681 	__get_cpu_var(cpu_state) = CPU_DEAD;
682 	smp_wmb();
683 
684 	/*
685 	 * during the path that leads here preemption is disabled,
686 	 * reenable it now so that when coming up preempt count is
687 	 * zero correctly
688 	 */
689 	preempt_enable();
690 
691 	/*
692 	 * hard-disable interrupts for the non-NAP case, the NAP code
693 	 * needs to re-enable interrupts (but soft-disables them)
694 	 */
695 	hard_irq_disable();
696 
697 	while (1) {
698 		/* let's not take timer interrupts too often ... */
699 		set_dec(0x7fffffff);
700 
701 		/* should always be true at this point */
702 		if (cpu_has_feature(CPU_FTR_CAN_NAP))
703 			power4_cpu_offline_powersave();
704 		else {
705 			HMT_low();
706 			HMT_very_low();
707 		}
708 	}
709 }
710 #endif /* CONFIG_HOTPLUG_CPU */
711 
712 #endif /* CONFIG_PPC64 */
713 
714 define_machine(powermac) {
715 	.name			= "PowerMac",
716 	.probe			= pmac_probe,
717 	.setup_arch		= pmac_setup_arch,
718 	.init_early		= pmac_init_early,
719 	.show_cpuinfo		= pmac_show_cpuinfo,
720 	.init_IRQ		= pmac_pic_init,
721 	.get_irq		= NULL,	/* changed later */
722 	.pci_irq_fixup		= pmac_pci_irq_fixup,
723 	.restart		= pmac_restart,
724 	.power_off		= pmac_power_off,
725 	.halt			= pmac_halt,
726 	.time_init		= pmac_time_init,
727 	.get_boot_time		= pmac_get_boot_time,
728 	.set_rtc_time		= pmac_set_rtc_time,
729 	.get_rtc_time		= pmac_get_rtc_time,
730 	.calibrate_decr		= pmac_calibrate_decr,
731 	.feature_call		= pmac_do_feature_call,
732 	.progress		= udbg_progress,
733 #ifdef CONFIG_PPC64
734 	.pci_probe_mode		= pmac_pci_probe_mode,
735 	.power_save		= power4_idle,
736 	.enable_pmcs		= power4_enable_pmcs,
737 #ifdef CONFIG_KEXEC
738 	.machine_kexec		= default_machine_kexec,
739 	.machine_kexec_prepare	= default_machine_kexec_prepare,
740 	.machine_crash_shutdown	= default_machine_crash_shutdown,
741 #endif
742 #endif /* CONFIG_PPC64 */
743 #ifdef CONFIG_PPC32
744 	.pcibios_enable_device_hook = pmac_pci_enable_device_hook,
745 	.pcibios_after_init	= pmac_pcibios_after_init,
746 	.phys_mem_access_prot	= pci_phys_mem_access_prot,
747 #endif
748 #if defined(CONFIG_HOTPLUG_CPU) && defined(CONFIG_PPC64)
749 	.cpu_die		= pmac_cpu_die,
750 #endif
751 };
752