1 /* 2 * arch/powerpc/platforms/powermac/low_i2c.c 3 * 4 * Copyright (C) 2003-2005 Ben. Herrenschmidt (benh@kernel.crashing.org) 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * as published by the Free Software Foundation; either version 9 * 2 of the License, or (at your option) any later version. 10 * 11 * The linux i2c layer isn't completely suitable for our needs for various 12 * reasons ranging from too late initialisation to semantics not perfectly 13 * matching some requirements of the apple platform functions etc... 14 * 15 * This file thus provides a simple low level unified i2c interface for 16 * powermac that covers the various types of i2c busses used in Apple machines. 17 * For now, keywest, PMU and SMU, though we could add Cuda, or other bit 18 * banging busses found on older chipstes in earlier machines if we ever need 19 * one of them. 20 * 21 * The drivers in this file are synchronous/blocking. In addition, the 22 * keywest one is fairly slow due to the use of msleep instead of interrupts 23 * as the interrupt is currently used by i2c-keywest. In the long run, we 24 * might want to get rid of those high-level interfaces to linux i2c layer 25 * either completely (converting all drivers) or replacing them all with a 26 * single stub driver on top of this one. Once done, the interrupt will be 27 * available for our use. 28 */ 29 30 #undef DEBUG 31 #undef DEBUG_LOW 32 33 #include <linux/types.h> 34 #include <linux/sched.h> 35 #include <linux/init.h> 36 #include <linux/export.h> 37 #include <linux/adb.h> 38 #include <linux/pmu.h> 39 #include <linux/delay.h> 40 #include <linux/completion.h> 41 #include <linux/platform_device.h> 42 #include <linux/interrupt.h> 43 #include <linux/timer.h> 44 #include <linux/mutex.h> 45 #include <linux/i2c.h> 46 #include <linux/slab.h> 47 #include <asm/keylargo.h> 48 #include <asm/uninorth.h> 49 #include <asm/io.h> 50 #include <asm/prom.h> 51 #include <asm/machdep.h> 52 #include <asm/smu.h> 53 #include <asm/pmac_pfunc.h> 54 #include <asm/pmac_low_i2c.h> 55 56 #ifdef DEBUG 57 #define DBG(x...) do {\ 58 printk(KERN_DEBUG "low_i2c:" x); \ 59 } while(0) 60 #else 61 #define DBG(x...) 62 #endif 63 64 #ifdef DEBUG_LOW 65 #define DBG_LOW(x...) do {\ 66 printk(KERN_DEBUG "low_i2c:" x); \ 67 } while(0) 68 #else 69 #define DBG_LOW(x...) 70 #endif 71 72 73 static int pmac_i2c_force_poll = 1; 74 75 /* 76 * A bus structure. Each bus in the system has such a structure associated. 77 */ 78 struct pmac_i2c_bus 79 { 80 struct list_head link; 81 struct device_node *controller; 82 struct device_node *busnode; 83 int type; 84 int flags; 85 struct i2c_adapter adapter; 86 void *hostdata; 87 int channel; /* some hosts have multiple */ 88 int mode; /* current mode */ 89 struct mutex mutex; 90 int opened; 91 int polled; /* open mode */ 92 struct platform_device *platform_dev; 93 94 /* ops */ 95 int (*open)(struct pmac_i2c_bus *bus); 96 void (*close)(struct pmac_i2c_bus *bus); 97 int (*xfer)(struct pmac_i2c_bus *bus, u8 addrdir, int subsize, 98 u32 subaddr, u8 *data, int len); 99 }; 100 101 static LIST_HEAD(pmac_i2c_busses); 102 103 /* 104 * Keywest implementation 105 */ 106 107 struct pmac_i2c_host_kw 108 { 109 struct mutex mutex; /* Access mutex for use by 110 * i2c-keywest */ 111 void __iomem *base; /* register base address */ 112 int bsteps; /* register stepping */ 113 int speed; /* speed */ 114 int irq; 115 u8 *data; 116 unsigned len; 117 int state; 118 int rw; 119 int polled; 120 int result; 121 struct completion complete; 122 spinlock_t lock; 123 struct timer_list timeout_timer; 124 }; 125 126 /* Register indices */ 127 typedef enum { 128 reg_mode = 0, 129 reg_control, 130 reg_status, 131 reg_isr, 132 reg_ier, 133 reg_addr, 134 reg_subaddr, 135 reg_data 136 } reg_t; 137 138 /* The Tumbler audio equalizer can be really slow sometimes */ 139 #define KW_POLL_TIMEOUT (2*HZ) 140 141 /* Mode register */ 142 #define KW_I2C_MODE_100KHZ 0x00 143 #define KW_I2C_MODE_50KHZ 0x01 144 #define KW_I2C_MODE_25KHZ 0x02 145 #define KW_I2C_MODE_DUMB 0x00 146 #define KW_I2C_MODE_STANDARD 0x04 147 #define KW_I2C_MODE_STANDARDSUB 0x08 148 #define KW_I2C_MODE_COMBINED 0x0C 149 #define KW_I2C_MODE_MODE_MASK 0x0C 150 #define KW_I2C_MODE_CHAN_MASK 0xF0 151 152 /* Control register */ 153 #define KW_I2C_CTL_AAK 0x01 154 #define KW_I2C_CTL_XADDR 0x02 155 #define KW_I2C_CTL_STOP 0x04 156 #define KW_I2C_CTL_START 0x08 157 158 /* Status register */ 159 #define KW_I2C_STAT_BUSY 0x01 160 #define KW_I2C_STAT_LAST_AAK 0x02 161 #define KW_I2C_STAT_LAST_RW 0x04 162 #define KW_I2C_STAT_SDA 0x08 163 #define KW_I2C_STAT_SCL 0x10 164 165 /* IER & ISR registers */ 166 #define KW_I2C_IRQ_DATA 0x01 167 #define KW_I2C_IRQ_ADDR 0x02 168 #define KW_I2C_IRQ_STOP 0x04 169 #define KW_I2C_IRQ_START 0x08 170 #define KW_I2C_IRQ_MASK 0x0F 171 172 /* State machine states */ 173 enum { 174 state_idle, 175 state_addr, 176 state_read, 177 state_write, 178 state_stop, 179 state_dead 180 }; 181 182 #define WRONG_STATE(name) do {\ 183 printk(KERN_DEBUG "KW: wrong state. Got %s, state: %s " \ 184 "(isr: %02x)\n", \ 185 name, __kw_state_names[host->state], isr); \ 186 } while(0) 187 188 static const char *__kw_state_names[] = { 189 "state_idle", 190 "state_addr", 191 "state_read", 192 "state_write", 193 "state_stop", 194 "state_dead" 195 }; 196 197 static inline u8 __kw_read_reg(struct pmac_i2c_host_kw *host, reg_t reg) 198 { 199 return readb(host->base + (((unsigned int)reg) << host->bsteps)); 200 } 201 202 static inline void __kw_write_reg(struct pmac_i2c_host_kw *host, 203 reg_t reg, u8 val) 204 { 205 writeb(val, host->base + (((unsigned)reg) << host->bsteps)); 206 (void)__kw_read_reg(host, reg_subaddr); 207 } 208 209 #define kw_write_reg(reg, val) __kw_write_reg(host, reg, val) 210 #define kw_read_reg(reg) __kw_read_reg(host, reg) 211 212 static u8 kw_i2c_wait_interrupt(struct pmac_i2c_host_kw *host) 213 { 214 int i, j; 215 u8 isr; 216 217 for (i = 0; i < 1000; i++) { 218 isr = kw_read_reg(reg_isr) & KW_I2C_IRQ_MASK; 219 if (isr != 0) 220 return isr; 221 222 /* This code is used with the timebase frozen, we cannot rely 223 * on udelay nor schedule when in polled mode ! 224 * For now, just use a bogus loop.... 225 */ 226 if (host->polled) { 227 for (j = 1; j < 100000; j++) 228 mb(); 229 } else 230 msleep(1); 231 } 232 return isr; 233 } 234 235 static void kw_i2c_do_stop(struct pmac_i2c_host_kw *host, int result) 236 { 237 kw_write_reg(reg_control, KW_I2C_CTL_STOP); 238 host->state = state_stop; 239 host->result = result; 240 } 241 242 243 static void kw_i2c_handle_interrupt(struct pmac_i2c_host_kw *host, u8 isr) 244 { 245 u8 ack; 246 247 DBG_LOW("kw_handle_interrupt(%s, isr: %x)\n", 248 __kw_state_names[host->state], isr); 249 250 if (host->state == state_idle) { 251 printk(KERN_WARNING "low_i2c: Keywest got an out of state" 252 " interrupt, ignoring\n"); 253 kw_write_reg(reg_isr, isr); 254 return; 255 } 256 257 if (isr == 0) { 258 printk(KERN_WARNING "low_i2c: Timeout in i2c transfer" 259 " on keywest !\n"); 260 if (host->state != state_stop) { 261 kw_i2c_do_stop(host, -EIO); 262 return; 263 } 264 ack = kw_read_reg(reg_status); 265 if (ack & KW_I2C_STAT_BUSY) 266 kw_write_reg(reg_status, 0); 267 host->state = state_idle; 268 kw_write_reg(reg_ier, 0x00); 269 if (!host->polled) 270 complete(&host->complete); 271 return; 272 } 273 274 if (isr & KW_I2C_IRQ_ADDR) { 275 ack = kw_read_reg(reg_status); 276 if (host->state != state_addr) { 277 WRONG_STATE("KW_I2C_IRQ_ADDR"); 278 kw_i2c_do_stop(host, -EIO); 279 } 280 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) { 281 host->result = -ENXIO; 282 host->state = state_stop; 283 DBG_LOW("KW: NAK on address\n"); 284 } else { 285 if (host->len == 0) 286 kw_i2c_do_stop(host, 0); 287 else if (host->rw) { 288 host->state = state_read; 289 if (host->len > 1) 290 kw_write_reg(reg_control, 291 KW_I2C_CTL_AAK); 292 } else { 293 host->state = state_write; 294 kw_write_reg(reg_data, *(host->data++)); 295 host->len--; 296 } 297 } 298 kw_write_reg(reg_isr, KW_I2C_IRQ_ADDR); 299 } 300 301 if (isr & KW_I2C_IRQ_DATA) { 302 if (host->state == state_read) { 303 *(host->data++) = kw_read_reg(reg_data); 304 host->len--; 305 kw_write_reg(reg_isr, KW_I2C_IRQ_DATA); 306 if (host->len == 0) 307 host->state = state_stop; 308 else if (host->len == 1) 309 kw_write_reg(reg_control, 0); 310 } else if (host->state == state_write) { 311 ack = kw_read_reg(reg_status); 312 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) { 313 DBG_LOW("KW: nack on data write\n"); 314 host->result = -EFBIG; 315 host->state = state_stop; 316 } else if (host->len) { 317 kw_write_reg(reg_data, *(host->data++)); 318 host->len--; 319 } else 320 kw_i2c_do_stop(host, 0); 321 } else { 322 WRONG_STATE("KW_I2C_IRQ_DATA"); 323 if (host->state != state_stop) 324 kw_i2c_do_stop(host, -EIO); 325 } 326 kw_write_reg(reg_isr, KW_I2C_IRQ_DATA); 327 } 328 329 if (isr & KW_I2C_IRQ_STOP) { 330 kw_write_reg(reg_isr, KW_I2C_IRQ_STOP); 331 if (host->state != state_stop) { 332 WRONG_STATE("KW_I2C_IRQ_STOP"); 333 host->result = -EIO; 334 } 335 host->state = state_idle; 336 if (!host->polled) 337 complete(&host->complete); 338 } 339 340 /* Below should only happen in manual mode which we don't use ... */ 341 if (isr & KW_I2C_IRQ_START) 342 kw_write_reg(reg_isr, KW_I2C_IRQ_START); 343 344 } 345 346 /* Interrupt handler */ 347 static irqreturn_t kw_i2c_irq(int irq, void *dev_id) 348 { 349 struct pmac_i2c_host_kw *host = dev_id; 350 unsigned long flags; 351 352 spin_lock_irqsave(&host->lock, flags); 353 del_timer(&host->timeout_timer); 354 kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr)); 355 if (host->state != state_idle) { 356 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT; 357 add_timer(&host->timeout_timer); 358 } 359 spin_unlock_irqrestore(&host->lock, flags); 360 return IRQ_HANDLED; 361 } 362 363 static void kw_i2c_timeout(unsigned long data) 364 { 365 struct pmac_i2c_host_kw *host = (struct pmac_i2c_host_kw *)data; 366 unsigned long flags; 367 368 spin_lock_irqsave(&host->lock, flags); 369 370 /* 371 * If the timer is pending, that means we raced with the 372 * irq, in which case we just return 373 */ 374 if (timer_pending(&host->timeout_timer)) 375 goto skip; 376 377 kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr)); 378 if (host->state != state_idle) { 379 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT; 380 add_timer(&host->timeout_timer); 381 } 382 skip: 383 spin_unlock_irqrestore(&host->lock, flags); 384 } 385 386 static int kw_i2c_open(struct pmac_i2c_bus *bus) 387 { 388 struct pmac_i2c_host_kw *host = bus->hostdata; 389 mutex_lock(&host->mutex); 390 return 0; 391 } 392 393 static void kw_i2c_close(struct pmac_i2c_bus *bus) 394 { 395 struct pmac_i2c_host_kw *host = bus->hostdata; 396 mutex_unlock(&host->mutex); 397 } 398 399 static int kw_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize, 400 u32 subaddr, u8 *data, int len) 401 { 402 struct pmac_i2c_host_kw *host = bus->hostdata; 403 u8 mode_reg = host->speed; 404 int use_irq = host->irq != NO_IRQ && !bus->polled; 405 406 /* Setup mode & subaddress if any */ 407 switch(bus->mode) { 408 case pmac_i2c_mode_dumb: 409 return -EINVAL; 410 case pmac_i2c_mode_std: 411 mode_reg |= KW_I2C_MODE_STANDARD; 412 if (subsize != 0) 413 return -EINVAL; 414 break; 415 case pmac_i2c_mode_stdsub: 416 mode_reg |= KW_I2C_MODE_STANDARDSUB; 417 if (subsize != 1) 418 return -EINVAL; 419 break; 420 case pmac_i2c_mode_combined: 421 mode_reg |= KW_I2C_MODE_COMBINED; 422 if (subsize != 1) 423 return -EINVAL; 424 break; 425 } 426 427 /* Setup channel & clear pending irqs */ 428 kw_write_reg(reg_isr, kw_read_reg(reg_isr)); 429 kw_write_reg(reg_mode, mode_reg | (bus->channel << 4)); 430 kw_write_reg(reg_status, 0); 431 432 /* Set up address and r/w bit, strip possible stale bus number from 433 * address top bits 434 */ 435 kw_write_reg(reg_addr, addrdir & 0xff); 436 437 /* Set up the sub address */ 438 if ((mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_STANDARDSUB 439 || (mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_COMBINED) 440 kw_write_reg(reg_subaddr, subaddr); 441 442 /* Prepare for async operations */ 443 host->data = data; 444 host->len = len; 445 host->state = state_addr; 446 host->result = 0; 447 host->rw = (addrdir & 1); 448 host->polled = bus->polled; 449 450 /* Enable interrupt if not using polled mode and interrupt is 451 * available 452 */ 453 if (use_irq) { 454 /* Clear completion */ 455 reinit_completion(&host->complete); 456 /* Ack stale interrupts */ 457 kw_write_reg(reg_isr, kw_read_reg(reg_isr)); 458 /* Arm timeout */ 459 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT; 460 add_timer(&host->timeout_timer); 461 /* Enable emission */ 462 kw_write_reg(reg_ier, KW_I2C_IRQ_MASK); 463 } 464 465 /* Start sending address */ 466 kw_write_reg(reg_control, KW_I2C_CTL_XADDR); 467 468 /* Wait for completion */ 469 if (use_irq) 470 wait_for_completion(&host->complete); 471 else { 472 while(host->state != state_idle) { 473 unsigned long flags; 474 475 u8 isr = kw_i2c_wait_interrupt(host); 476 spin_lock_irqsave(&host->lock, flags); 477 kw_i2c_handle_interrupt(host, isr); 478 spin_unlock_irqrestore(&host->lock, flags); 479 } 480 } 481 482 /* Disable emission */ 483 kw_write_reg(reg_ier, 0); 484 485 return host->result; 486 } 487 488 static struct pmac_i2c_host_kw *__init kw_i2c_host_init(struct device_node *np) 489 { 490 struct pmac_i2c_host_kw *host; 491 const u32 *psteps, *prate, *addrp; 492 u32 steps; 493 494 host = kzalloc(sizeof(struct pmac_i2c_host_kw), GFP_KERNEL); 495 if (host == NULL) { 496 printk(KERN_ERR "low_i2c: Can't allocate host for %s\n", 497 np->full_name); 498 return NULL; 499 } 500 501 /* Apple is kind enough to provide a valid AAPL,address property 502 * on all i2c keywest nodes so far ... we would have to fallback 503 * to macio parsing if that wasn't the case 504 */ 505 addrp = of_get_property(np, "AAPL,address", NULL); 506 if (addrp == NULL) { 507 printk(KERN_ERR "low_i2c: Can't find address for %s\n", 508 np->full_name); 509 kfree(host); 510 return NULL; 511 } 512 mutex_init(&host->mutex); 513 init_completion(&host->complete); 514 spin_lock_init(&host->lock); 515 init_timer(&host->timeout_timer); 516 host->timeout_timer.function = kw_i2c_timeout; 517 host->timeout_timer.data = (unsigned long)host; 518 519 psteps = of_get_property(np, "AAPL,address-step", NULL); 520 steps = psteps ? (*psteps) : 0x10; 521 for (host->bsteps = 0; (steps & 0x01) == 0; host->bsteps++) 522 steps >>= 1; 523 /* Select interface rate */ 524 host->speed = KW_I2C_MODE_25KHZ; 525 prate = of_get_property(np, "AAPL,i2c-rate", NULL); 526 if (prate) switch(*prate) { 527 case 100: 528 host->speed = KW_I2C_MODE_100KHZ; 529 break; 530 case 50: 531 host->speed = KW_I2C_MODE_50KHZ; 532 break; 533 case 25: 534 host->speed = KW_I2C_MODE_25KHZ; 535 break; 536 } 537 host->irq = irq_of_parse_and_map(np, 0); 538 if (host->irq == NO_IRQ) 539 printk(KERN_WARNING 540 "low_i2c: Failed to map interrupt for %s\n", 541 np->full_name); 542 543 host->base = ioremap((*addrp), 0x1000); 544 if (host->base == NULL) { 545 printk(KERN_ERR "low_i2c: Can't map registers for %s\n", 546 np->full_name); 547 kfree(host); 548 return NULL; 549 } 550 551 /* Make sure IRQ is disabled */ 552 kw_write_reg(reg_ier, 0); 553 554 /* Request chip interrupt. We set IRQF_NO_SUSPEND because we don't 555 * want that interrupt disabled between the 2 passes of driver 556 * suspend or we'll have issues running the pfuncs 557 */ 558 if (request_irq(host->irq, kw_i2c_irq, IRQF_NO_SUSPEND, 559 "keywest i2c", host)) 560 host->irq = NO_IRQ; 561 562 printk(KERN_INFO "KeyWest i2c @0x%08x irq %d %s\n", 563 *addrp, host->irq, np->full_name); 564 565 return host; 566 } 567 568 569 static void __init kw_i2c_add(struct pmac_i2c_host_kw *host, 570 struct device_node *controller, 571 struct device_node *busnode, 572 int channel) 573 { 574 struct pmac_i2c_bus *bus; 575 576 bus = kzalloc(sizeof(struct pmac_i2c_bus), GFP_KERNEL); 577 if (bus == NULL) 578 return; 579 580 bus->controller = of_node_get(controller); 581 bus->busnode = of_node_get(busnode); 582 bus->type = pmac_i2c_bus_keywest; 583 bus->hostdata = host; 584 bus->channel = channel; 585 bus->mode = pmac_i2c_mode_std; 586 bus->open = kw_i2c_open; 587 bus->close = kw_i2c_close; 588 bus->xfer = kw_i2c_xfer; 589 mutex_init(&bus->mutex); 590 if (controller == busnode) 591 bus->flags = pmac_i2c_multibus; 592 list_add(&bus->link, &pmac_i2c_busses); 593 594 printk(KERN_INFO " channel %d bus %s\n", channel, 595 (controller == busnode) ? "<multibus>" : busnode->full_name); 596 } 597 598 static void __init kw_i2c_probe(void) 599 { 600 struct device_node *np, *child, *parent; 601 602 /* Probe keywest-i2c busses */ 603 for_each_compatible_node(np, "i2c","keywest-i2c") { 604 struct pmac_i2c_host_kw *host; 605 int multibus; 606 607 /* Found one, init a host structure */ 608 host = kw_i2c_host_init(np); 609 if (host == NULL) 610 continue; 611 612 /* Now check if we have a multibus setup (old style) or if we 613 * have proper bus nodes. Note that the "new" way (proper bus 614 * nodes) might cause us to not create some busses that are 615 * kept hidden in the device-tree. In the future, we might 616 * want to work around that by creating busses without a node 617 * but not for now 618 */ 619 child = of_get_next_child(np, NULL); 620 multibus = !child || strcmp(child->name, "i2c-bus"); 621 of_node_put(child); 622 623 /* For a multibus setup, we get the bus count based on the 624 * parent type 625 */ 626 if (multibus) { 627 int chans, i; 628 629 parent = of_get_parent(np); 630 if (parent == NULL) 631 continue; 632 chans = parent->name[0] == 'u' ? 2 : 1; 633 for (i = 0; i < chans; i++) 634 kw_i2c_add(host, np, np, i); 635 } else { 636 for (child = NULL; 637 (child = of_get_next_child(np, child)) != NULL;) { 638 const u32 *reg = of_get_property(child, 639 "reg", NULL); 640 if (reg == NULL) 641 continue; 642 kw_i2c_add(host, np, child, *reg); 643 } 644 } 645 } 646 } 647 648 649 /* 650 * 651 * PMU implementation 652 * 653 */ 654 655 #ifdef CONFIG_ADB_PMU 656 657 /* 658 * i2c command block to the PMU 659 */ 660 struct pmu_i2c_hdr { 661 u8 bus; 662 u8 mode; 663 u8 bus2; 664 u8 address; 665 u8 sub_addr; 666 u8 comb_addr; 667 u8 count; 668 u8 data[]; 669 }; 670 671 static void pmu_i2c_complete(struct adb_request *req) 672 { 673 complete(req->arg); 674 } 675 676 static int pmu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize, 677 u32 subaddr, u8 *data, int len) 678 { 679 struct adb_request *req = bus->hostdata; 680 struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req->data[1]; 681 struct completion comp; 682 int read = addrdir & 1; 683 int retry; 684 int rc = 0; 685 686 /* For now, limit ourselves to 16 bytes transfers */ 687 if (len > 16) 688 return -EINVAL; 689 690 init_completion(&comp); 691 692 for (retry = 0; retry < 16; retry++) { 693 memset(req, 0, sizeof(struct adb_request)); 694 hdr->bus = bus->channel; 695 hdr->count = len; 696 697 switch(bus->mode) { 698 case pmac_i2c_mode_std: 699 if (subsize != 0) 700 return -EINVAL; 701 hdr->address = addrdir; 702 hdr->mode = PMU_I2C_MODE_SIMPLE; 703 break; 704 case pmac_i2c_mode_stdsub: 705 case pmac_i2c_mode_combined: 706 if (subsize != 1) 707 return -EINVAL; 708 hdr->address = addrdir & 0xfe; 709 hdr->comb_addr = addrdir; 710 hdr->sub_addr = subaddr; 711 if (bus->mode == pmac_i2c_mode_stdsub) 712 hdr->mode = PMU_I2C_MODE_STDSUB; 713 else 714 hdr->mode = PMU_I2C_MODE_COMBINED; 715 break; 716 default: 717 return -EINVAL; 718 } 719 720 reinit_completion(&comp); 721 req->data[0] = PMU_I2C_CMD; 722 req->reply[0] = 0xff; 723 req->nbytes = sizeof(struct pmu_i2c_hdr) + 1; 724 req->done = pmu_i2c_complete; 725 req->arg = ∁ 726 if (!read && len) { 727 memcpy(hdr->data, data, len); 728 req->nbytes += len; 729 } 730 rc = pmu_queue_request(req); 731 if (rc) 732 return rc; 733 wait_for_completion(&comp); 734 if (req->reply[0] == PMU_I2C_STATUS_OK) 735 break; 736 msleep(15); 737 } 738 if (req->reply[0] != PMU_I2C_STATUS_OK) 739 return -EIO; 740 741 for (retry = 0; retry < 16; retry++) { 742 memset(req, 0, sizeof(struct adb_request)); 743 744 /* I know that looks like a lot, slow as hell, but darwin 745 * does it so let's be on the safe side for now 746 */ 747 msleep(15); 748 749 hdr->bus = PMU_I2C_BUS_STATUS; 750 751 reinit_completion(&comp); 752 req->data[0] = PMU_I2C_CMD; 753 req->reply[0] = 0xff; 754 req->nbytes = 2; 755 req->done = pmu_i2c_complete; 756 req->arg = ∁ 757 rc = pmu_queue_request(req); 758 if (rc) 759 return rc; 760 wait_for_completion(&comp); 761 762 if (req->reply[0] == PMU_I2C_STATUS_OK && !read) 763 return 0; 764 if (req->reply[0] == PMU_I2C_STATUS_DATAREAD && read) { 765 int rlen = req->reply_len - 1; 766 767 if (rlen != len) { 768 printk(KERN_WARNING "low_i2c: PMU returned %d" 769 " bytes, expected %d !\n", rlen, len); 770 return -EIO; 771 } 772 if (len) 773 memcpy(data, &req->reply[1], len); 774 return 0; 775 } 776 } 777 return -EIO; 778 } 779 780 static void __init pmu_i2c_probe(void) 781 { 782 struct pmac_i2c_bus *bus; 783 struct device_node *busnode; 784 int channel, sz; 785 786 if (!pmu_present()) 787 return; 788 789 /* There might or might not be a "pmu-i2c" node, we use that 790 * or via-pmu itself, whatever we find. I haven't seen a machine 791 * with separate bus nodes, so we assume a multibus setup 792 */ 793 busnode = of_find_node_by_name(NULL, "pmu-i2c"); 794 if (busnode == NULL) 795 busnode = of_find_node_by_name(NULL, "via-pmu"); 796 if (busnode == NULL) 797 return; 798 799 printk(KERN_INFO "PMU i2c %s\n", busnode->full_name); 800 801 /* 802 * We add bus 1 and 2 only for now, bus 0 is "special" 803 */ 804 for (channel = 1; channel <= 2; channel++) { 805 sz = sizeof(struct pmac_i2c_bus) + sizeof(struct adb_request); 806 bus = kzalloc(sz, GFP_KERNEL); 807 if (bus == NULL) 808 return; 809 810 bus->controller = busnode; 811 bus->busnode = busnode; 812 bus->type = pmac_i2c_bus_pmu; 813 bus->channel = channel; 814 bus->mode = pmac_i2c_mode_std; 815 bus->hostdata = bus + 1; 816 bus->xfer = pmu_i2c_xfer; 817 mutex_init(&bus->mutex); 818 bus->flags = pmac_i2c_multibus; 819 list_add(&bus->link, &pmac_i2c_busses); 820 821 printk(KERN_INFO " channel %d bus <multibus>\n", channel); 822 } 823 } 824 825 #endif /* CONFIG_ADB_PMU */ 826 827 828 /* 829 * 830 * SMU implementation 831 * 832 */ 833 834 #ifdef CONFIG_PMAC_SMU 835 836 static void smu_i2c_complete(struct smu_i2c_cmd *cmd, void *misc) 837 { 838 complete(misc); 839 } 840 841 static int smu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize, 842 u32 subaddr, u8 *data, int len) 843 { 844 struct smu_i2c_cmd *cmd = bus->hostdata; 845 struct completion comp; 846 int read = addrdir & 1; 847 int rc = 0; 848 849 if ((read && len > SMU_I2C_READ_MAX) || 850 ((!read) && len > SMU_I2C_WRITE_MAX)) 851 return -EINVAL; 852 853 memset(cmd, 0, sizeof(struct smu_i2c_cmd)); 854 cmd->info.bus = bus->channel; 855 cmd->info.devaddr = addrdir; 856 cmd->info.datalen = len; 857 858 switch(bus->mode) { 859 case pmac_i2c_mode_std: 860 if (subsize != 0) 861 return -EINVAL; 862 cmd->info.type = SMU_I2C_TRANSFER_SIMPLE; 863 break; 864 case pmac_i2c_mode_stdsub: 865 case pmac_i2c_mode_combined: 866 if (subsize > 3 || subsize < 1) 867 return -EINVAL; 868 cmd->info.sublen = subsize; 869 /* that's big-endian only but heh ! */ 870 memcpy(&cmd->info.subaddr, ((char *)&subaddr) + (4 - subsize), 871 subsize); 872 if (bus->mode == pmac_i2c_mode_stdsub) 873 cmd->info.type = SMU_I2C_TRANSFER_STDSUB; 874 else 875 cmd->info.type = SMU_I2C_TRANSFER_COMBINED; 876 break; 877 default: 878 return -EINVAL; 879 } 880 if (!read && len) 881 memcpy(cmd->info.data, data, len); 882 883 init_completion(&comp); 884 cmd->done = smu_i2c_complete; 885 cmd->misc = ∁ 886 rc = smu_queue_i2c(cmd); 887 if (rc < 0) 888 return rc; 889 wait_for_completion(&comp); 890 rc = cmd->status; 891 892 if (read && len) 893 memcpy(data, cmd->info.data, len); 894 return rc < 0 ? rc : 0; 895 } 896 897 static void __init smu_i2c_probe(void) 898 { 899 struct device_node *controller, *busnode; 900 struct pmac_i2c_bus *bus; 901 const u32 *reg; 902 int sz; 903 904 if (!smu_present()) 905 return; 906 907 controller = of_find_node_by_name(NULL, "smu-i2c-control"); 908 if (controller == NULL) 909 controller = of_find_node_by_name(NULL, "smu"); 910 if (controller == NULL) 911 return; 912 913 printk(KERN_INFO "SMU i2c %s\n", controller->full_name); 914 915 /* Look for childs, note that they might not be of the right 916 * type as older device trees mix i2c busses and other things 917 * at the same level 918 */ 919 for (busnode = NULL; 920 (busnode = of_get_next_child(controller, busnode)) != NULL;) { 921 if (strcmp(busnode->type, "i2c") && 922 strcmp(busnode->type, "i2c-bus")) 923 continue; 924 reg = of_get_property(busnode, "reg", NULL); 925 if (reg == NULL) 926 continue; 927 928 sz = sizeof(struct pmac_i2c_bus) + sizeof(struct smu_i2c_cmd); 929 bus = kzalloc(sz, GFP_KERNEL); 930 if (bus == NULL) 931 return; 932 933 bus->controller = controller; 934 bus->busnode = of_node_get(busnode); 935 bus->type = pmac_i2c_bus_smu; 936 bus->channel = *reg; 937 bus->mode = pmac_i2c_mode_std; 938 bus->hostdata = bus + 1; 939 bus->xfer = smu_i2c_xfer; 940 mutex_init(&bus->mutex); 941 bus->flags = 0; 942 list_add(&bus->link, &pmac_i2c_busses); 943 944 printk(KERN_INFO " channel %x bus %s\n", 945 bus->channel, busnode->full_name); 946 } 947 } 948 949 #endif /* CONFIG_PMAC_SMU */ 950 951 /* 952 * 953 * Core code 954 * 955 */ 956 957 958 struct pmac_i2c_bus *pmac_i2c_find_bus(struct device_node *node) 959 { 960 struct device_node *p = of_node_get(node); 961 struct device_node *prev = NULL; 962 struct pmac_i2c_bus *bus; 963 964 while(p) { 965 list_for_each_entry(bus, &pmac_i2c_busses, link) { 966 if (p == bus->busnode) { 967 if (prev && bus->flags & pmac_i2c_multibus) { 968 const u32 *reg; 969 reg = of_get_property(prev, "reg", 970 NULL); 971 if (!reg) 972 continue; 973 if (((*reg) >> 8) != bus->channel) 974 continue; 975 } 976 of_node_put(p); 977 of_node_put(prev); 978 return bus; 979 } 980 } 981 of_node_put(prev); 982 prev = p; 983 p = of_get_parent(p); 984 } 985 return NULL; 986 } 987 EXPORT_SYMBOL_GPL(pmac_i2c_find_bus); 988 989 u8 pmac_i2c_get_dev_addr(struct device_node *device) 990 { 991 const u32 *reg = of_get_property(device, "reg", NULL); 992 993 if (reg == NULL) 994 return 0; 995 996 return (*reg) & 0xff; 997 } 998 EXPORT_SYMBOL_GPL(pmac_i2c_get_dev_addr); 999 1000 struct device_node *pmac_i2c_get_controller(struct pmac_i2c_bus *bus) 1001 { 1002 return bus->controller; 1003 } 1004 EXPORT_SYMBOL_GPL(pmac_i2c_get_controller); 1005 1006 struct device_node *pmac_i2c_get_bus_node(struct pmac_i2c_bus *bus) 1007 { 1008 return bus->busnode; 1009 } 1010 EXPORT_SYMBOL_GPL(pmac_i2c_get_bus_node); 1011 1012 int pmac_i2c_get_type(struct pmac_i2c_bus *bus) 1013 { 1014 return bus->type; 1015 } 1016 EXPORT_SYMBOL_GPL(pmac_i2c_get_type); 1017 1018 int pmac_i2c_get_flags(struct pmac_i2c_bus *bus) 1019 { 1020 return bus->flags; 1021 } 1022 EXPORT_SYMBOL_GPL(pmac_i2c_get_flags); 1023 1024 int pmac_i2c_get_channel(struct pmac_i2c_bus *bus) 1025 { 1026 return bus->channel; 1027 } 1028 EXPORT_SYMBOL_GPL(pmac_i2c_get_channel); 1029 1030 1031 struct i2c_adapter *pmac_i2c_get_adapter(struct pmac_i2c_bus *bus) 1032 { 1033 return &bus->adapter; 1034 } 1035 EXPORT_SYMBOL_GPL(pmac_i2c_get_adapter); 1036 1037 struct pmac_i2c_bus *pmac_i2c_adapter_to_bus(struct i2c_adapter *adapter) 1038 { 1039 struct pmac_i2c_bus *bus; 1040 1041 list_for_each_entry(bus, &pmac_i2c_busses, link) 1042 if (&bus->adapter == adapter) 1043 return bus; 1044 return NULL; 1045 } 1046 EXPORT_SYMBOL_GPL(pmac_i2c_adapter_to_bus); 1047 1048 int pmac_i2c_match_adapter(struct device_node *dev, struct i2c_adapter *adapter) 1049 { 1050 struct pmac_i2c_bus *bus = pmac_i2c_find_bus(dev); 1051 1052 if (bus == NULL) 1053 return 0; 1054 return (&bus->adapter == adapter); 1055 } 1056 EXPORT_SYMBOL_GPL(pmac_i2c_match_adapter); 1057 1058 int pmac_low_i2c_lock(struct device_node *np) 1059 { 1060 struct pmac_i2c_bus *bus, *found = NULL; 1061 1062 list_for_each_entry(bus, &pmac_i2c_busses, link) { 1063 if (np == bus->controller) { 1064 found = bus; 1065 break; 1066 } 1067 } 1068 if (!found) 1069 return -ENODEV; 1070 return pmac_i2c_open(bus, 0); 1071 } 1072 EXPORT_SYMBOL_GPL(pmac_low_i2c_lock); 1073 1074 int pmac_low_i2c_unlock(struct device_node *np) 1075 { 1076 struct pmac_i2c_bus *bus, *found = NULL; 1077 1078 list_for_each_entry(bus, &pmac_i2c_busses, link) { 1079 if (np == bus->controller) { 1080 found = bus; 1081 break; 1082 } 1083 } 1084 if (!found) 1085 return -ENODEV; 1086 pmac_i2c_close(bus); 1087 return 0; 1088 } 1089 EXPORT_SYMBOL_GPL(pmac_low_i2c_unlock); 1090 1091 1092 int pmac_i2c_open(struct pmac_i2c_bus *bus, int polled) 1093 { 1094 int rc; 1095 1096 mutex_lock(&bus->mutex); 1097 bus->polled = polled || pmac_i2c_force_poll; 1098 bus->opened = 1; 1099 bus->mode = pmac_i2c_mode_std; 1100 if (bus->open && (rc = bus->open(bus)) != 0) { 1101 bus->opened = 0; 1102 mutex_unlock(&bus->mutex); 1103 return rc; 1104 } 1105 return 0; 1106 } 1107 EXPORT_SYMBOL_GPL(pmac_i2c_open); 1108 1109 void pmac_i2c_close(struct pmac_i2c_bus *bus) 1110 { 1111 WARN_ON(!bus->opened); 1112 if (bus->close) 1113 bus->close(bus); 1114 bus->opened = 0; 1115 mutex_unlock(&bus->mutex); 1116 } 1117 EXPORT_SYMBOL_GPL(pmac_i2c_close); 1118 1119 int pmac_i2c_setmode(struct pmac_i2c_bus *bus, int mode) 1120 { 1121 WARN_ON(!bus->opened); 1122 1123 /* Report me if you see the error below as there might be a new 1124 * "combined4" mode that I need to implement for the SMU bus 1125 */ 1126 if (mode < pmac_i2c_mode_dumb || mode > pmac_i2c_mode_combined) { 1127 printk(KERN_ERR "low_i2c: Invalid mode %d requested on" 1128 " bus %s !\n", mode, bus->busnode->full_name); 1129 return -EINVAL; 1130 } 1131 bus->mode = mode; 1132 1133 return 0; 1134 } 1135 EXPORT_SYMBOL_GPL(pmac_i2c_setmode); 1136 1137 int pmac_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize, 1138 u32 subaddr, u8 *data, int len) 1139 { 1140 int rc; 1141 1142 WARN_ON(!bus->opened); 1143 1144 DBG("xfer() chan=%d, addrdir=0x%x, mode=%d, subsize=%d, subaddr=0x%x," 1145 " %d bytes, bus %s\n", bus->channel, addrdir, bus->mode, subsize, 1146 subaddr, len, bus->busnode->full_name); 1147 1148 rc = bus->xfer(bus, addrdir, subsize, subaddr, data, len); 1149 1150 #ifdef DEBUG 1151 if (rc) 1152 DBG("xfer error %d\n", rc); 1153 #endif 1154 return rc; 1155 } 1156 EXPORT_SYMBOL_GPL(pmac_i2c_xfer); 1157 1158 /* some quirks for platform function decoding */ 1159 enum { 1160 pmac_i2c_quirk_invmask = 0x00000001u, 1161 pmac_i2c_quirk_skip = 0x00000002u, 1162 }; 1163 1164 static void pmac_i2c_devscan(void (*callback)(struct device_node *dev, 1165 int quirks)) 1166 { 1167 struct pmac_i2c_bus *bus; 1168 struct device_node *np; 1169 static struct whitelist_ent { 1170 char *name; 1171 char *compatible; 1172 int quirks; 1173 } whitelist[] = { 1174 /* XXX Study device-tree's & apple drivers are get the quirks 1175 * right ! 1176 */ 1177 /* Workaround: It seems that running the clockspreading 1178 * properties on the eMac will cause lockups during boot. 1179 * The machine seems to work fine without that. So for now, 1180 * let's make sure i2c-hwclock doesn't match about "imic" 1181 * clocks and we'll figure out if we really need to do 1182 * something special about those later. 1183 */ 1184 { "i2c-hwclock", "imic5002", pmac_i2c_quirk_skip }, 1185 { "i2c-hwclock", "imic5003", pmac_i2c_quirk_skip }, 1186 { "i2c-hwclock", NULL, pmac_i2c_quirk_invmask }, 1187 { "i2c-cpu-voltage", NULL, 0}, 1188 { "temp-monitor", NULL, 0 }, 1189 { "supply-monitor", NULL, 0 }, 1190 { NULL, NULL, 0 }, 1191 }; 1192 1193 /* Only some devices need to have platform functions instanciated 1194 * here. For now, we have a table. Others, like 9554 i2c GPIOs used 1195 * on Xserve, if we ever do a driver for them, will use their own 1196 * platform function instance 1197 */ 1198 list_for_each_entry(bus, &pmac_i2c_busses, link) { 1199 for (np = NULL; 1200 (np = of_get_next_child(bus->busnode, np)) != NULL;) { 1201 struct whitelist_ent *p; 1202 /* If multibus, check if device is on that bus */ 1203 if (bus->flags & pmac_i2c_multibus) 1204 if (bus != pmac_i2c_find_bus(np)) 1205 continue; 1206 for (p = whitelist; p->name != NULL; p++) { 1207 if (strcmp(np->name, p->name)) 1208 continue; 1209 if (p->compatible && 1210 !of_device_is_compatible(np, p->compatible)) 1211 continue; 1212 if (p->quirks & pmac_i2c_quirk_skip) 1213 break; 1214 callback(np, p->quirks); 1215 break; 1216 } 1217 } 1218 } 1219 } 1220 1221 #define MAX_I2C_DATA 64 1222 1223 struct pmac_i2c_pf_inst 1224 { 1225 struct pmac_i2c_bus *bus; 1226 u8 addr; 1227 u8 buffer[MAX_I2C_DATA]; 1228 u8 scratch[MAX_I2C_DATA]; 1229 int bytes; 1230 int quirks; 1231 }; 1232 1233 static void* pmac_i2c_do_begin(struct pmf_function *func, struct pmf_args *args) 1234 { 1235 struct pmac_i2c_pf_inst *inst; 1236 struct pmac_i2c_bus *bus; 1237 1238 bus = pmac_i2c_find_bus(func->node); 1239 if (bus == NULL) { 1240 printk(KERN_ERR "low_i2c: Can't find bus for %s (pfunc)\n", 1241 func->node->full_name); 1242 return NULL; 1243 } 1244 if (pmac_i2c_open(bus, 0)) { 1245 printk(KERN_ERR "low_i2c: Can't open i2c bus for %s (pfunc)\n", 1246 func->node->full_name); 1247 return NULL; 1248 } 1249 1250 /* XXX might need GFP_ATOMIC when called during the suspend process, 1251 * but then, there are already lots of issues with suspending when 1252 * near OOM that need to be resolved, the allocator itself should 1253 * probably make GFP_NOIO implicit during suspend 1254 */ 1255 inst = kzalloc(sizeof(struct pmac_i2c_pf_inst), GFP_KERNEL); 1256 if (inst == NULL) { 1257 pmac_i2c_close(bus); 1258 return NULL; 1259 } 1260 inst->bus = bus; 1261 inst->addr = pmac_i2c_get_dev_addr(func->node); 1262 inst->quirks = (int)(long)func->driver_data; 1263 return inst; 1264 } 1265 1266 static void pmac_i2c_do_end(struct pmf_function *func, void *instdata) 1267 { 1268 struct pmac_i2c_pf_inst *inst = instdata; 1269 1270 if (inst == NULL) 1271 return; 1272 pmac_i2c_close(inst->bus); 1273 kfree(inst); 1274 } 1275 1276 static int pmac_i2c_do_read(PMF_STD_ARGS, u32 len) 1277 { 1278 struct pmac_i2c_pf_inst *inst = instdata; 1279 1280 inst->bytes = len; 1281 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 0, 0, 1282 inst->buffer, len); 1283 } 1284 1285 static int pmac_i2c_do_write(PMF_STD_ARGS, u32 len, const u8 *data) 1286 { 1287 struct pmac_i2c_pf_inst *inst = instdata; 1288 1289 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0, 1290 (u8 *)data, len); 1291 } 1292 1293 /* This function is used to do the masking & OR'ing for the "rmw" type 1294 * callbacks. Ze should apply the mask and OR in the values in the 1295 * buffer before writing back. The problem is that it seems that 1296 * various darwin drivers implement the mask/or differently, thus 1297 * we need to check the quirks first 1298 */ 1299 static void pmac_i2c_do_apply_rmw(struct pmac_i2c_pf_inst *inst, 1300 u32 len, const u8 *mask, const u8 *val) 1301 { 1302 int i; 1303 1304 if (inst->quirks & pmac_i2c_quirk_invmask) { 1305 for (i = 0; i < len; i ++) 1306 inst->scratch[i] = (inst->buffer[i] & mask[i]) | val[i]; 1307 } else { 1308 for (i = 0; i < len; i ++) 1309 inst->scratch[i] = (inst->buffer[i] & ~mask[i]) 1310 | (val[i] & mask[i]); 1311 } 1312 } 1313 1314 static int pmac_i2c_do_rmw(PMF_STD_ARGS, u32 masklen, u32 valuelen, 1315 u32 totallen, const u8 *maskdata, 1316 const u8 *valuedata) 1317 { 1318 struct pmac_i2c_pf_inst *inst = instdata; 1319 1320 if (masklen > inst->bytes || valuelen > inst->bytes || 1321 totallen > inst->bytes || valuelen > masklen) 1322 return -EINVAL; 1323 1324 pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata); 1325 1326 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0, 1327 inst->scratch, totallen); 1328 } 1329 1330 static int pmac_i2c_do_read_sub(PMF_STD_ARGS, u8 subaddr, u32 len) 1331 { 1332 struct pmac_i2c_pf_inst *inst = instdata; 1333 1334 inst->bytes = len; 1335 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 1, subaddr, 1336 inst->buffer, len); 1337 } 1338 1339 static int pmac_i2c_do_write_sub(PMF_STD_ARGS, u8 subaddr, u32 len, 1340 const u8 *data) 1341 { 1342 struct pmac_i2c_pf_inst *inst = instdata; 1343 1344 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1, 1345 subaddr, (u8 *)data, len); 1346 } 1347 1348 static int pmac_i2c_do_set_mode(PMF_STD_ARGS, int mode) 1349 { 1350 struct pmac_i2c_pf_inst *inst = instdata; 1351 1352 return pmac_i2c_setmode(inst->bus, mode); 1353 } 1354 1355 static int pmac_i2c_do_rmw_sub(PMF_STD_ARGS, u8 subaddr, u32 masklen, 1356 u32 valuelen, u32 totallen, const u8 *maskdata, 1357 const u8 *valuedata) 1358 { 1359 struct pmac_i2c_pf_inst *inst = instdata; 1360 1361 if (masklen > inst->bytes || valuelen > inst->bytes || 1362 totallen > inst->bytes || valuelen > masklen) 1363 return -EINVAL; 1364 1365 pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata); 1366 1367 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1, 1368 subaddr, inst->scratch, totallen); 1369 } 1370 1371 static int pmac_i2c_do_mask_and_comp(PMF_STD_ARGS, u32 len, 1372 const u8 *maskdata, 1373 const u8 *valuedata) 1374 { 1375 struct pmac_i2c_pf_inst *inst = instdata; 1376 int i, match; 1377 1378 /* Get return value pointer, it's assumed to be a u32 */ 1379 if (!args || !args->count || !args->u[0].p) 1380 return -EINVAL; 1381 1382 /* Check buffer */ 1383 if (len > inst->bytes) 1384 return -EINVAL; 1385 1386 for (i = 0, match = 1; match && i < len; i ++) 1387 if ((inst->buffer[i] & maskdata[i]) != valuedata[i]) 1388 match = 0; 1389 *args->u[0].p = match; 1390 return 0; 1391 } 1392 1393 static int pmac_i2c_do_delay(PMF_STD_ARGS, u32 duration) 1394 { 1395 msleep((duration + 999) / 1000); 1396 return 0; 1397 } 1398 1399 1400 static struct pmf_handlers pmac_i2c_pfunc_handlers = { 1401 .begin = pmac_i2c_do_begin, 1402 .end = pmac_i2c_do_end, 1403 .read_i2c = pmac_i2c_do_read, 1404 .write_i2c = pmac_i2c_do_write, 1405 .rmw_i2c = pmac_i2c_do_rmw, 1406 .read_i2c_sub = pmac_i2c_do_read_sub, 1407 .write_i2c_sub = pmac_i2c_do_write_sub, 1408 .rmw_i2c_sub = pmac_i2c_do_rmw_sub, 1409 .set_i2c_mode = pmac_i2c_do_set_mode, 1410 .mask_and_compare = pmac_i2c_do_mask_and_comp, 1411 .delay = pmac_i2c_do_delay, 1412 }; 1413 1414 static void __init pmac_i2c_dev_create(struct device_node *np, int quirks) 1415 { 1416 DBG("dev_create(%s)\n", np->full_name); 1417 1418 pmf_register_driver(np, &pmac_i2c_pfunc_handlers, 1419 (void *)(long)quirks); 1420 } 1421 1422 static void __init pmac_i2c_dev_init(struct device_node *np, int quirks) 1423 { 1424 DBG("dev_create(%s)\n", np->full_name); 1425 1426 pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_INIT, NULL); 1427 } 1428 1429 static void pmac_i2c_dev_suspend(struct device_node *np, int quirks) 1430 { 1431 DBG("dev_suspend(%s)\n", np->full_name); 1432 pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_SLEEP, NULL); 1433 } 1434 1435 static void pmac_i2c_dev_resume(struct device_node *np, int quirks) 1436 { 1437 DBG("dev_resume(%s)\n", np->full_name); 1438 pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_WAKE, NULL); 1439 } 1440 1441 void pmac_pfunc_i2c_suspend(void) 1442 { 1443 pmac_i2c_devscan(pmac_i2c_dev_suspend); 1444 } 1445 1446 void pmac_pfunc_i2c_resume(void) 1447 { 1448 pmac_i2c_devscan(pmac_i2c_dev_resume); 1449 } 1450 1451 /* 1452 * Initialize us: probe all i2c busses on the machine, instantiate 1453 * busses and platform functions as needed. 1454 */ 1455 /* This is non-static as it might be called early by smp code */ 1456 int __init pmac_i2c_init(void) 1457 { 1458 static int i2c_inited; 1459 1460 if (i2c_inited) 1461 return 0; 1462 i2c_inited = 1; 1463 1464 /* Probe keywest-i2c busses */ 1465 kw_i2c_probe(); 1466 1467 #ifdef CONFIG_ADB_PMU 1468 /* Probe PMU i2c busses */ 1469 pmu_i2c_probe(); 1470 #endif 1471 1472 #ifdef CONFIG_PMAC_SMU 1473 /* Probe SMU i2c busses */ 1474 smu_i2c_probe(); 1475 #endif 1476 1477 /* Now add plaform functions for some known devices */ 1478 pmac_i2c_devscan(pmac_i2c_dev_create); 1479 1480 return 0; 1481 } 1482 machine_arch_initcall(powermac, pmac_i2c_init); 1483 1484 /* Since pmac_i2c_init can be called too early for the platform device 1485 * registration, we need to do it at a later time. In our case, subsys 1486 * happens to fit well, though I agree it's a bit of a hack... 1487 */ 1488 static int __init pmac_i2c_create_platform_devices(void) 1489 { 1490 struct pmac_i2c_bus *bus; 1491 int i = 0; 1492 1493 /* In the case where we are initialized from smp_init(), we must 1494 * not use the timer (and thus the irq). It's safe from now on 1495 * though 1496 */ 1497 pmac_i2c_force_poll = 0; 1498 1499 /* Create platform devices */ 1500 list_for_each_entry(bus, &pmac_i2c_busses, link) { 1501 bus->platform_dev = 1502 platform_device_alloc("i2c-powermac", i++); 1503 if (bus->platform_dev == NULL) 1504 return -ENOMEM; 1505 bus->platform_dev->dev.platform_data = bus; 1506 bus->platform_dev->dev.of_node = bus->busnode; 1507 platform_device_add(bus->platform_dev); 1508 } 1509 1510 /* Now call platform "init" functions */ 1511 pmac_i2c_devscan(pmac_i2c_dev_init); 1512 1513 return 0; 1514 } 1515 machine_subsys_initcall(powermac, pmac_i2c_create_platform_devices); 1516