1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * arch/powerpc/platforms/powermac/low_i2c.c 4 * 5 * Copyright (C) 2003-2005 Ben. Herrenschmidt (benh@kernel.crashing.org) 6 * 7 * The linux i2c layer isn't completely suitable for our needs for various 8 * reasons ranging from too late initialisation to semantics not perfectly 9 * matching some requirements of the apple platform functions etc... 10 * 11 * This file thus provides a simple low level unified i2c interface for 12 * powermac that covers the various types of i2c busses used in Apple machines. 13 * For now, keywest, PMU and SMU, though we could add Cuda, or other bit 14 * banging busses found on older chipsets in earlier machines if we ever need 15 * one of them. 16 * 17 * The drivers in this file are synchronous/blocking. In addition, the 18 * keywest one is fairly slow due to the use of msleep instead of interrupts 19 * as the interrupt is currently used by i2c-keywest. In the long run, we 20 * might want to get rid of those high-level interfaces to linux i2c layer 21 * either completely (converting all drivers) or replacing them all with a 22 * single stub driver on top of this one. Once done, the interrupt will be 23 * available for our use. 24 */ 25 26 #undef DEBUG 27 #undef DEBUG_LOW 28 29 #include <linux/types.h> 30 #include <linux/sched.h> 31 #include <linux/init.h> 32 #include <linux/export.h> 33 #include <linux/adb.h> 34 #include <linux/pmu.h> 35 #include <linux/delay.h> 36 #include <linux/completion.h> 37 #include <linux/platform_device.h> 38 #include <linux/interrupt.h> 39 #include <linux/timer.h> 40 #include <linux/mutex.h> 41 #include <linux/i2c.h> 42 #include <linux/slab.h> 43 #include <asm/keylargo.h> 44 #include <asm/uninorth.h> 45 #include <asm/io.h> 46 #include <asm/prom.h> 47 #include <asm/machdep.h> 48 #include <asm/smu.h> 49 #include <asm/pmac_pfunc.h> 50 #include <asm/pmac_low_i2c.h> 51 52 #ifdef DEBUG 53 #define DBG(x...) do {\ 54 printk(KERN_DEBUG "low_i2c:" x); \ 55 } while(0) 56 #else 57 #define DBG(x...) 58 #endif 59 60 #ifdef DEBUG_LOW 61 #define DBG_LOW(x...) do {\ 62 printk(KERN_DEBUG "low_i2c:" x); \ 63 } while(0) 64 #else 65 #define DBG_LOW(x...) 66 #endif 67 68 69 static int pmac_i2c_force_poll = 1; 70 71 /* 72 * A bus structure. Each bus in the system has such a structure associated. 73 */ 74 struct pmac_i2c_bus 75 { 76 struct list_head link; 77 struct device_node *controller; 78 struct device_node *busnode; 79 int type; 80 int flags; 81 struct i2c_adapter adapter; 82 void *hostdata; 83 int channel; /* some hosts have multiple */ 84 int mode; /* current mode */ 85 struct mutex mutex; 86 int opened; 87 int polled; /* open mode */ 88 struct platform_device *platform_dev; 89 struct lock_class_key lock_key; 90 91 /* ops */ 92 int (*open)(struct pmac_i2c_bus *bus); 93 void (*close)(struct pmac_i2c_bus *bus); 94 int (*xfer)(struct pmac_i2c_bus *bus, u8 addrdir, int subsize, 95 u32 subaddr, u8 *data, int len); 96 }; 97 98 static LIST_HEAD(pmac_i2c_busses); 99 100 /* 101 * Keywest implementation 102 */ 103 104 struct pmac_i2c_host_kw 105 { 106 struct mutex mutex; /* Access mutex for use by 107 * i2c-keywest */ 108 void __iomem *base; /* register base address */ 109 int bsteps; /* register stepping */ 110 int speed; /* speed */ 111 int irq; 112 u8 *data; 113 unsigned len; 114 int state; 115 int rw; 116 int polled; 117 int result; 118 struct completion complete; 119 spinlock_t lock; 120 struct timer_list timeout_timer; 121 }; 122 123 /* Register indices */ 124 typedef enum { 125 reg_mode = 0, 126 reg_control, 127 reg_status, 128 reg_isr, 129 reg_ier, 130 reg_addr, 131 reg_subaddr, 132 reg_data 133 } reg_t; 134 135 /* The Tumbler audio equalizer can be really slow sometimes */ 136 #define KW_POLL_TIMEOUT (2*HZ) 137 138 /* Mode register */ 139 #define KW_I2C_MODE_100KHZ 0x00 140 #define KW_I2C_MODE_50KHZ 0x01 141 #define KW_I2C_MODE_25KHZ 0x02 142 #define KW_I2C_MODE_DUMB 0x00 143 #define KW_I2C_MODE_STANDARD 0x04 144 #define KW_I2C_MODE_STANDARDSUB 0x08 145 #define KW_I2C_MODE_COMBINED 0x0C 146 #define KW_I2C_MODE_MODE_MASK 0x0C 147 #define KW_I2C_MODE_CHAN_MASK 0xF0 148 149 /* Control register */ 150 #define KW_I2C_CTL_AAK 0x01 151 #define KW_I2C_CTL_XADDR 0x02 152 #define KW_I2C_CTL_STOP 0x04 153 #define KW_I2C_CTL_START 0x08 154 155 /* Status register */ 156 #define KW_I2C_STAT_BUSY 0x01 157 #define KW_I2C_STAT_LAST_AAK 0x02 158 #define KW_I2C_STAT_LAST_RW 0x04 159 #define KW_I2C_STAT_SDA 0x08 160 #define KW_I2C_STAT_SCL 0x10 161 162 /* IER & ISR registers */ 163 #define KW_I2C_IRQ_DATA 0x01 164 #define KW_I2C_IRQ_ADDR 0x02 165 #define KW_I2C_IRQ_STOP 0x04 166 #define KW_I2C_IRQ_START 0x08 167 #define KW_I2C_IRQ_MASK 0x0F 168 169 /* State machine states */ 170 enum { 171 state_idle, 172 state_addr, 173 state_read, 174 state_write, 175 state_stop, 176 state_dead 177 }; 178 179 #define WRONG_STATE(name) do {\ 180 printk(KERN_DEBUG "KW: wrong state. Got %s, state: %s " \ 181 "(isr: %02x)\n", \ 182 name, __kw_state_names[host->state], isr); \ 183 } while(0) 184 185 static const char *__kw_state_names[] = { 186 "state_idle", 187 "state_addr", 188 "state_read", 189 "state_write", 190 "state_stop", 191 "state_dead" 192 }; 193 194 static inline u8 __kw_read_reg(struct pmac_i2c_host_kw *host, reg_t reg) 195 { 196 return readb(host->base + (((unsigned int)reg) << host->bsteps)); 197 } 198 199 static inline void __kw_write_reg(struct pmac_i2c_host_kw *host, 200 reg_t reg, u8 val) 201 { 202 writeb(val, host->base + (((unsigned)reg) << host->bsteps)); 203 (void)__kw_read_reg(host, reg_subaddr); 204 } 205 206 #define kw_write_reg(reg, val) __kw_write_reg(host, reg, val) 207 #define kw_read_reg(reg) __kw_read_reg(host, reg) 208 209 static u8 kw_i2c_wait_interrupt(struct pmac_i2c_host_kw *host) 210 { 211 int i, j; 212 u8 isr; 213 214 for (i = 0; i < 1000; i++) { 215 isr = kw_read_reg(reg_isr) & KW_I2C_IRQ_MASK; 216 if (isr != 0) 217 return isr; 218 219 /* This code is used with the timebase frozen, we cannot rely 220 * on udelay nor schedule when in polled mode ! 221 * For now, just use a bogus loop.... 222 */ 223 if (host->polled) { 224 for (j = 1; j < 100000; j++) 225 mb(); 226 } else 227 msleep(1); 228 } 229 return isr; 230 } 231 232 static void kw_i2c_do_stop(struct pmac_i2c_host_kw *host, int result) 233 { 234 kw_write_reg(reg_control, KW_I2C_CTL_STOP); 235 host->state = state_stop; 236 host->result = result; 237 } 238 239 240 static void kw_i2c_handle_interrupt(struct pmac_i2c_host_kw *host, u8 isr) 241 { 242 u8 ack; 243 244 DBG_LOW("kw_handle_interrupt(%s, isr: %x)\n", 245 __kw_state_names[host->state], isr); 246 247 if (host->state == state_idle) { 248 printk(KERN_WARNING "low_i2c: Keywest got an out of state" 249 " interrupt, ignoring\n"); 250 kw_write_reg(reg_isr, isr); 251 return; 252 } 253 254 if (isr == 0) { 255 printk(KERN_WARNING "low_i2c: Timeout in i2c transfer" 256 " on keywest !\n"); 257 if (host->state != state_stop) { 258 kw_i2c_do_stop(host, -EIO); 259 return; 260 } 261 ack = kw_read_reg(reg_status); 262 if (ack & KW_I2C_STAT_BUSY) 263 kw_write_reg(reg_status, 0); 264 host->state = state_idle; 265 kw_write_reg(reg_ier, 0x00); 266 if (!host->polled) 267 complete(&host->complete); 268 return; 269 } 270 271 if (isr & KW_I2C_IRQ_ADDR) { 272 ack = kw_read_reg(reg_status); 273 if (host->state != state_addr) { 274 WRONG_STATE("KW_I2C_IRQ_ADDR"); 275 kw_i2c_do_stop(host, -EIO); 276 } 277 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) { 278 host->result = -ENXIO; 279 host->state = state_stop; 280 DBG_LOW("KW: NAK on address\n"); 281 } else { 282 if (host->len == 0) 283 kw_i2c_do_stop(host, 0); 284 else if (host->rw) { 285 host->state = state_read; 286 if (host->len > 1) 287 kw_write_reg(reg_control, 288 KW_I2C_CTL_AAK); 289 } else { 290 host->state = state_write; 291 kw_write_reg(reg_data, *(host->data++)); 292 host->len--; 293 } 294 } 295 kw_write_reg(reg_isr, KW_I2C_IRQ_ADDR); 296 } 297 298 if (isr & KW_I2C_IRQ_DATA) { 299 if (host->state == state_read) { 300 *(host->data++) = kw_read_reg(reg_data); 301 host->len--; 302 kw_write_reg(reg_isr, KW_I2C_IRQ_DATA); 303 if (host->len == 0) 304 host->state = state_stop; 305 else if (host->len == 1) 306 kw_write_reg(reg_control, 0); 307 } else if (host->state == state_write) { 308 ack = kw_read_reg(reg_status); 309 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) { 310 DBG_LOW("KW: nack on data write\n"); 311 host->result = -EFBIG; 312 host->state = state_stop; 313 } else if (host->len) { 314 kw_write_reg(reg_data, *(host->data++)); 315 host->len--; 316 } else 317 kw_i2c_do_stop(host, 0); 318 } else { 319 WRONG_STATE("KW_I2C_IRQ_DATA"); 320 if (host->state != state_stop) 321 kw_i2c_do_stop(host, -EIO); 322 } 323 kw_write_reg(reg_isr, KW_I2C_IRQ_DATA); 324 } 325 326 if (isr & KW_I2C_IRQ_STOP) { 327 kw_write_reg(reg_isr, KW_I2C_IRQ_STOP); 328 if (host->state != state_stop) { 329 WRONG_STATE("KW_I2C_IRQ_STOP"); 330 host->result = -EIO; 331 } 332 host->state = state_idle; 333 if (!host->polled) 334 complete(&host->complete); 335 } 336 337 /* Below should only happen in manual mode which we don't use ... */ 338 if (isr & KW_I2C_IRQ_START) 339 kw_write_reg(reg_isr, KW_I2C_IRQ_START); 340 341 } 342 343 /* Interrupt handler */ 344 static irqreturn_t kw_i2c_irq(int irq, void *dev_id) 345 { 346 struct pmac_i2c_host_kw *host = dev_id; 347 unsigned long flags; 348 349 spin_lock_irqsave(&host->lock, flags); 350 del_timer(&host->timeout_timer); 351 kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr)); 352 if (host->state != state_idle) { 353 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT; 354 add_timer(&host->timeout_timer); 355 } 356 spin_unlock_irqrestore(&host->lock, flags); 357 return IRQ_HANDLED; 358 } 359 360 static void kw_i2c_timeout(struct timer_list *t) 361 { 362 struct pmac_i2c_host_kw *host = from_timer(host, t, timeout_timer); 363 unsigned long flags; 364 365 spin_lock_irqsave(&host->lock, flags); 366 367 /* 368 * If the timer is pending, that means we raced with the 369 * irq, in which case we just return 370 */ 371 if (timer_pending(&host->timeout_timer)) 372 goto skip; 373 374 kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr)); 375 if (host->state != state_idle) { 376 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT; 377 add_timer(&host->timeout_timer); 378 } 379 skip: 380 spin_unlock_irqrestore(&host->lock, flags); 381 } 382 383 static int kw_i2c_open(struct pmac_i2c_bus *bus) 384 { 385 struct pmac_i2c_host_kw *host = bus->hostdata; 386 mutex_lock(&host->mutex); 387 return 0; 388 } 389 390 static void kw_i2c_close(struct pmac_i2c_bus *bus) 391 { 392 struct pmac_i2c_host_kw *host = bus->hostdata; 393 mutex_unlock(&host->mutex); 394 } 395 396 static int kw_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize, 397 u32 subaddr, u8 *data, int len) 398 { 399 struct pmac_i2c_host_kw *host = bus->hostdata; 400 u8 mode_reg = host->speed; 401 int use_irq = host->irq && !bus->polled; 402 403 /* Setup mode & subaddress if any */ 404 switch(bus->mode) { 405 case pmac_i2c_mode_dumb: 406 return -EINVAL; 407 case pmac_i2c_mode_std: 408 mode_reg |= KW_I2C_MODE_STANDARD; 409 if (subsize != 0) 410 return -EINVAL; 411 break; 412 case pmac_i2c_mode_stdsub: 413 mode_reg |= KW_I2C_MODE_STANDARDSUB; 414 if (subsize != 1) 415 return -EINVAL; 416 break; 417 case pmac_i2c_mode_combined: 418 mode_reg |= KW_I2C_MODE_COMBINED; 419 if (subsize != 1) 420 return -EINVAL; 421 break; 422 } 423 424 /* Setup channel & clear pending irqs */ 425 kw_write_reg(reg_isr, kw_read_reg(reg_isr)); 426 kw_write_reg(reg_mode, mode_reg | (bus->channel << 4)); 427 kw_write_reg(reg_status, 0); 428 429 /* Set up address and r/w bit, strip possible stale bus number from 430 * address top bits 431 */ 432 kw_write_reg(reg_addr, addrdir & 0xff); 433 434 /* Set up the sub address */ 435 if ((mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_STANDARDSUB 436 || (mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_COMBINED) 437 kw_write_reg(reg_subaddr, subaddr); 438 439 /* Prepare for async operations */ 440 host->data = data; 441 host->len = len; 442 host->state = state_addr; 443 host->result = 0; 444 host->rw = (addrdir & 1); 445 host->polled = bus->polled; 446 447 /* Enable interrupt if not using polled mode and interrupt is 448 * available 449 */ 450 if (use_irq) { 451 /* Clear completion */ 452 reinit_completion(&host->complete); 453 /* Ack stale interrupts */ 454 kw_write_reg(reg_isr, kw_read_reg(reg_isr)); 455 /* Arm timeout */ 456 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT; 457 add_timer(&host->timeout_timer); 458 /* Enable emission */ 459 kw_write_reg(reg_ier, KW_I2C_IRQ_MASK); 460 } 461 462 /* Start sending address */ 463 kw_write_reg(reg_control, KW_I2C_CTL_XADDR); 464 465 /* Wait for completion */ 466 if (use_irq) 467 wait_for_completion(&host->complete); 468 else { 469 while(host->state != state_idle) { 470 unsigned long flags; 471 472 u8 isr = kw_i2c_wait_interrupt(host); 473 spin_lock_irqsave(&host->lock, flags); 474 kw_i2c_handle_interrupt(host, isr); 475 spin_unlock_irqrestore(&host->lock, flags); 476 } 477 } 478 479 /* Disable emission */ 480 kw_write_reg(reg_ier, 0); 481 482 return host->result; 483 } 484 485 static struct pmac_i2c_host_kw *__init kw_i2c_host_init(struct device_node *np) 486 { 487 struct pmac_i2c_host_kw *host; 488 const u32 *psteps, *prate, *addrp; 489 u32 steps; 490 491 host = kzalloc(sizeof(*host), GFP_KERNEL); 492 if (host == NULL) { 493 printk(KERN_ERR "low_i2c: Can't allocate host for %pOF\n", 494 np); 495 return NULL; 496 } 497 498 /* Apple is kind enough to provide a valid AAPL,address property 499 * on all i2c keywest nodes so far ... we would have to fallback 500 * to macio parsing if that wasn't the case 501 */ 502 addrp = of_get_property(np, "AAPL,address", NULL); 503 if (addrp == NULL) { 504 printk(KERN_ERR "low_i2c: Can't find address for %pOF\n", 505 np); 506 kfree(host); 507 return NULL; 508 } 509 mutex_init(&host->mutex); 510 init_completion(&host->complete); 511 spin_lock_init(&host->lock); 512 timer_setup(&host->timeout_timer, kw_i2c_timeout, 0); 513 514 psteps = of_get_property(np, "AAPL,address-step", NULL); 515 steps = psteps ? (*psteps) : 0x10; 516 for (host->bsteps = 0; (steps & 0x01) == 0; host->bsteps++) 517 steps >>= 1; 518 /* Select interface rate */ 519 host->speed = KW_I2C_MODE_25KHZ; 520 prate = of_get_property(np, "AAPL,i2c-rate", NULL); 521 if (prate) switch(*prate) { 522 case 100: 523 host->speed = KW_I2C_MODE_100KHZ; 524 break; 525 case 50: 526 host->speed = KW_I2C_MODE_50KHZ; 527 break; 528 case 25: 529 host->speed = KW_I2C_MODE_25KHZ; 530 break; 531 } 532 host->irq = irq_of_parse_and_map(np, 0); 533 if (!host->irq) 534 printk(KERN_WARNING 535 "low_i2c: Failed to map interrupt for %pOF\n", 536 np); 537 538 host->base = ioremap((*addrp), 0x1000); 539 if (host->base == NULL) { 540 printk(KERN_ERR "low_i2c: Can't map registers for %pOF\n", 541 np); 542 kfree(host); 543 return NULL; 544 } 545 546 /* Make sure IRQ is disabled */ 547 kw_write_reg(reg_ier, 0); 548 549 /* Request chip interrupt. We set IRQF_NO_SUSPEND because we don't 550 * want that interrupt disabled between the 2 passes of driver 551 * suspend or we'll have issues running the pfuncs 552 */ 553 if (request_irq(host->irq, kw_i2c_irq, IRQF_NO_SUSPEND, 554 "keywest i2c", host)) 555 host->irq = 0; 556 557 printk(KERN_INFO "KeyWest i2c @0x%08x irq %d %pOF\n", 558 *addrp, host->irq, np); 559 560 return host; 561 } 562 563 564 static void __init kw_i2c_add(struct pmac_i2c_host_kw *host, 565 struct device_node *controller, 566 struct device_node *busnode, 567 int channel) 568 { 569 struct pmac_i2c_bus *bus; 570 571 bus = kzalloc(sizeof(struct pmac_i2c_bus), GFP_KERNEL); 572 if (bus == NULL) 573 return; 574 575 bus->controller = of_node_get(controller); 576 bus->busnode = of_node_get(busnode); 577 bus->type = pmac_i2c_bus_keywest; 578 bus->hostdata = host; 579 bus->channel = channel; 580 bus->mode = pmac_i2c_mode_std; 581 bus->open = kw_i2c_open; 582 bus->close = kw_i2c_close; 583 bus->xfer = kw_i2c_xfer; 584 mutex_init(&bus->mutex); 585 lockdep_set_class(&bus->mutex, &bus->lock_key); 586 if (controller == busnode) 587 bus->flags = pmac_i2c_multibus; 588 list_add(&bus->link, &pmac_i2c_busses); 589 590 printk(KERN_INFO " channel %d bus %s\n", channel, 591 (controller == busnode) ? "<multibus>" : busnode->full_name); 592 } 593 594 static void __init kw_i2c_probe(void) 595 { 596 struct device_node *np, *child, *parent; 597 598 /* Probe keywest-i2c busses */ 599 for_each_compatible_node(np, "i2c","keywest-i2c") { 600 struct pmac_i2c_host_kw *host; 601 int multibus; 602 603 /* Found one, init a host structure */ 604 host = kw_i2c_host_init(np); 605 if (host == NULL) 606 continue; 607 608 /* Now check if we have a multibus setup (old style) or if we 609 * have proper bus nodes. Note that the "new" way (proper bus 610 * nodes) might cause us to not create some busses that are 611 * kept hidden in the device-tree. In the future, we might 612 * want to work around that by creating busses without a node 613 * but not for now 614 */ 615 child = of_get_next_child(np, NULL); 616 multibus = !of_node_name_eq(child, "i2c-bus"); 617 of_node_put(child); 618 619 /* For a multibus setup, we get the bus count based on the 620 * parent type 621 */ 622 if (multibus) { 623 int chans, i; 624 625 parent = of_get_parent(np); 626 if (parent == NULL) 627 continue; 628 chans = parent->name[0] == 'u' ? 2 : 1; 629 for (i = 0; i < chans; i++) 630 kw_i2c_add(host, np, np, i); 631 } else { 632 for_each_child_of_node(np, child) { 633 const u32 *reg = of_get_property(child, 634 "reg", NULL); 635 if (reg == NULL) 636 continue; 637 kw_i2c_add(host, np, child, *reg); 638 } 639 } 640 } 641 } 642 643 644 /* 645 * 646 * PMU implementation 647 * 648 */ 649 650 #ifdef CONFIG_ADB_PMU 651 652 /* 653 * i2c command block to the PMU 654 */ 655 struct pmu_i2c_hdr { 656 u8 bus; 657 u8 mode; 658 u8 bus2; 659 u8 address; 660 u8 sub_addr; 661 u8 comb_addr; 662 u8 count; 663 u8 data[]; 664 }; 665 666 static void pmu_i2c_complete(struct adb_request *req) 667 { 668 complete(req->arg); 669 } 670 671 static int pmu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize, 672 u32 subaddr, u8 *data, int len) 673 { 674 struct adb_request *req = bus->hostdata; 675 struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req->data[1]; 676 struct completion comp; 677 int read = addrdir & 1; 678 int retry; 679 int rc = 0; 680 681 /* For now, limit ourselves to 16 bytes transfers */ 682 if (len > 16) 683 return -EINVAL; 684 685 init_completion(&comp); 686 687 for (retry = 0; retry < 16; retry++) { 688 memset(req, 0, sizeof(struct adb_request)); 689 hdr->bus = bus->channel; 690 hdr->count = len; 691 692 switch(bus->mode) { 693 case pmac_i2c_mode_std: 694 if (subsize != 0) 695 return -EINVAL; 696 hdr->address = addrdir; 697 hdr->mode = PMU_I2C_MODE_SIMPLE; 698 break; 699 case pmac_i2c_mode_stdsub: 700 case pmac_i2c_mode_combined: 701 if (subsize != 1) 702 return -EINVAL; 703 hdr->address = addrdir & 0xfe; 704 hdr->comb_addr = addrdir; 705 hdr->sub_addr = subaddr; 706 if (bus->mode == pmac_i2c_mode_stdsub) 707 hdr->mode = PMU_I2C_MODE_STDSUB; 708 else 709 hdr->mode = PMU_I2C_MODE_COMBINED; 710 break; 711 default: 712 return -EINVAL; 713 } 714 715 reinit_completion(&comp); 716 req->data[0] = PMU_I2C_CMD; 717 req->reply[0] = 0xff; 718 req->nbytes = sizeof(struct pmu_i2c_hdr) + 1; 719 req->done = pmu_i2c_complete; 720 req->arg = ∁ 721 if (!read && len) { 722 memcpy(hdr->data, data, len); 723 req->nbytes += len; 724 } 725 rc = pmu_queue_request(req); 726 if (rc) 727 return rc; 728 wait_for_completion(&comp); 729 if (req->reply[0] == PMU_I2C_STATUS_OK) 730 break; 731 msleep(15); 732 } 733 if (req->reply[0] != PMU_I2C_STATUS_OK) 734 return -EIO; 735 736 for (retry = 0; retry < 16; retry++) { 737 memset(req, 0, sizeof(struct adb_request)); 738 739 /* I know that looks like a lot, slow as hell, but darwin 740 * does it so let's be on the safe side for now 741 */ 742 msleep(15); 743 744 hdr->bus = PMU_I2C_BUS_STATUS; 745 746 reinit_completion(&comp); 747 req->data[0] = PMU_I2C_CMD; 748 req->reply[0] = 0xff; 749 req->nbytes = 2; 750 req->done = pmu_i2c_complete; 751 req->arg = ∁ 752 rc = pmu_queue_request(req); 753 if (rc) 754 return rc; 755 wait_for_completion(&comp); 756 757 if (req->reply[0] == PMU_I2C_STATUS_OK && !read) 758 return 0; 759 if (req->reply[0] == PMU_I2C_STATUS_DATAREAD && read) { 760 int rlen = req->reply_len - 1; 761 762 if (rlen != len) { 763 printk(KERN_WARNING "low_i2c: PMU returned %d" 764 " bytes, expected %d !\n", rlen, len); 765 return -EIO; 766 } 767 if (len) 768 memcpy(data, &req->reply[1], len); 769 return 0; 770 } 771 } 772 return -EIO; 773 } 774 775 static void __init pmu_i2c_probe(void) 776 { 777 struct pmac_i2c_bus *bus; 778 struct device_node *busnode; 779 int channel, sz; 780 781 if (!pmu_present()) 782 return; 783 784 /* There might or might not be a "pmu-i2c" node, we use that 785 * or via-pmu itself, whatever we find. I haven't seen a machine 786 * with separate bus nodes, so we assume a multibus setup 787 */ 788 busnode = of_find_node_by_name(NULL, "pmu-i2c"); 789 if (busnode == NULL) 790 busnode = of_find_node_by_name(NULL, "via-pmu"); 791 if (busnode == NULL) 792 return; 793 794 printk(KERN_INFO "PMU i2c %pOF\n", busnode); 795 796 /* 797 * We add bus 1 and 2 only for now, bus 0 is "special" 798 */ 799 for (channel = 1; channel <= 2; channel++) { 800 sz = sizeof(struct pmac_i2c_bus) + sizeof(struct adb_request); 801 bus = kzalloc(sz, GFP_KERNEL); 802 if (bus == NULL) 803 return; 804 805 bus->controller = busnode; 806 bus->busnode = busnode; 807 bus->type = pmac_i2c_bus_pmu; 808 bus->channel = channel; 809 bus->mode = pmac_i2c_mode_std; 810 bus->hostdata = bus + 1; 811 bus->xfer = pmu_i2c_xfer; 812 mutex_init(&bus->mutex); 813 lockdep_set_class(&bus->mutex, &bus->lock_key); 814 bus->flags = pmac_i2c_multibus; 815 list_add(&bus->link, &pmac_i2c_busses); 816 817 printk(KERN_INFO " channel %d bus <multibus>\n", channel); 818 } 819 } 820 821 #endif /* CONFIG_ADB_PMU */ 822 823 824 /* 825 * 826 * SMU implementation 827 * 828 */ 829 830 #ifdef CONFIG_PMAC_SMU 831 832 static void smu_i2c_complete(struct smu_i2c_cmd *cmd, void *misc) 833 { 834 complete(misc); 835 } 836 837 static int smu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize, 838 u32 subaddr, u8 *data, int len) 839 { 840 struct smu_i2c_cmd *cmd = bus->hostdata; 841 struct completion comp; 842 int read = addrdir & 1; 843 int rc = 0; 844 845 if ((read && len > SMU_I2C_READ_MAX) || 846 ((!read) && len > SMU_I2C_WRITE_MAX)) 847 return -EINVAL; 848 849 memset(cmd, 0, sizeof(struct smu_i2c_cmd)); 850 cmd->info.bus = bus->channel; 851 cmd->info.devaddr = addrdir; 852 cmd->info.datalen = len; 853 854 switch(bus->mode) { 855 case pmac_i2c_mode_std: 856 if (subsize != 0) 857 return -EINVAL; 858 cmd->info.type = SMU_I2C_TRANSFER_SIMPLE; 859 break; 860 case pmac_i2c_mode_stdsub: 861 case pmac_i2c_mode_combined: 862 if (subsize > 3 || subsize < 1) 863 return -EINVAL; 864 cmd->info.sublen = subsize; 865 /* that's big-endian only but heh ! */ 866 memcpy(&cmd->info.subaddr, ((char *)&subaddr) + (4 - subsize), 867 subsize); 868 if (bus->mode == pmac_i2c_mode_stdsub) 869 cmd->info.type = SMU_I2C_TRANSFER_STDSUB; 870 else 871 cmd->info.type = SMU_I2C_TRANSFER_COMBINED; 872 break; 873 default: 874 return -EINVAL; 875 } 876 if (!read && len) 877 memcpy(cmd->info.data, data, len); 878 879 init_completion(&comp); 880 cmd->done = smu_i2c_complete; 881 cmd->misc = ∁ 882 rc = smu_queue_i2c(cmd); 883 if (rc < 0) 884 return rc; 885 wait_for_completion(&comp); 886 rc = cmd->status; 887 888 if (read && len) 889 memcpy(data, cmd->info.data, len); 890 return rc < 0 ? rc : 0; 891 } 892 893 static void __init smu_i2c_probe(void) 894 { 895 struct device_node *controller, *busnode; 896 struct pmac_i2c_bus *bus; 897 const u32 *reg; 898 int sz; 899 900 if (!smu_present()) 901 return; 902 903 controller = of_find_node_by_name(NULL, "smu-i2c-control"); 904 if (controller == NULL) 905 controller = of_find_node_by_name(NULL, "smu"); 906 if (controller == NULL) 907 return; 908 909 printk(KERN_INFO "SMU i2c %pOF\n", controller); 910 911 /* Look for childs, note that they might not be of the right 912 * type as older device trees mix i2c busses and other things 913 * at the same level 914 */ 915 for_each_child_of_node(controller, busnode) { 916 if (!of_node_is_type(busnode, "i2c") && 917 !of_node_is_type(busnode, "i2c-bus")) 918 continue; 919 reg = of_get_property(busnode, "reg", NULL); 920 if (reg == NULL) 921 continue; 922 923 sz = sizeof(struct pmac_i2c_bus) + sizeof(struct smu_i2c_cmd); 924 bus = kzalloc(sz, GFP_KERNEL); 925 if (bus == NULL) 926 return; 927 928 bus->controller = controller; 929 bus->busnode = of_node_get(busnode); 930 bus->type = pmac_i2c_bus_smu; 931 bus->channel = *reg; 932 bus->mode = pmac_i2c_mode_std; 933 bus->hostdata = bus + 1; 934 bus->xfer = smu_i2c_xfer; 935 mutex_init(&bus->mutex); 936 lockdep_set_class(&bus->mutex, &bus->lock_key); 937 bus->flags = 0; 938 list_add(&bus->link, &pmac_i2c_busses); 939 940 printk(KERN_INFO " channel %x bus %pOF\n", 941 bus->channel, busnode); 942 } 943 } 944 945 #endif /* CONFIG_PMAC_SMU */ 946 947 /* 948 * 949 * Core code 950 * 951 */ 952 953 954 struct pmac_i2c_bus *pmac_i2c_find_bus(struct device_node *node) 955 { 956 struct device_node *p = of_node_get(node); 957 struct device_node *prev = NULL; 958 struct pmac_i2c_bus *bus; 959 960 while(p) { 961 list_for_each_entry(bus, &pmac_i2c_busses, link) { 962 if (p == bus->busnode) { 963 if (prev && bus->flags & pmac_i2c_multibus) { 964 const u32 *reg; 965 reg = of_get_property(prev, "reg", 966 NULL); 967 if (!reg) 968 continue; 969 if (((*reg) >> 8) != bus->channel) 970 continue; 971 } 972 of_node_put(p); 973 of_node_put(prev); 974 return bus; 975 } 976 } 977 of_node_put(prev); 978 prev = p; 979 p = of_get_parent(p); 980 } 981 return NULL; 982 } 983 EXPORT_SYMBOL_GPL(pmac_i2c_find_bus); 984 985 u8 pmac_i2c_get_dev_addr(struct device_node *device) 986 { 987 const u32 *reg = of_get_property(device, "reg", NULL); 988 989 if (reg == NULL) 990 return 0; 991 992 return (*reg) & 0xff; 993 } 994 EXPORT_SYMBOL_GPL(pmac_i2c_get_dev_addr); 995 996 struct device_node *pmac_i2c_get_controller(struct pmac_i2c_bus *bus) 997 { 998 return bus->controller; 999 } 1000 EXPORT_SYMBOL_GPL(pmac_i2c_get_controller); 1001 1002 struct device_node *pmac_i2c_get_bus_node(struct pmac_i2c_bus *bus) 1003 { 1004 return bus->busnode; 1005 } 1006 EXPORT_SYMBOL_GPL(pmac_i2c_get_bus_node); 1007 1008 int pmac_i2c_get_type(struct pmac_i2c_bus *bus) 1009 { 1010 return bus->type; 1011 } 1012 EXPORT_SYMBOL_GPL(pmac_i2c_get_type); 1013 1014 int pmac_i2c_get_flags(struct pmac_i2c_bus *bus) 1015 { 1016 return bus->flags; 1017 } 1018 EXPORT_SYMBOL_GPL(pmac_i2c_get_flags); 1019 1020 int pmac_i2c_get_channel(struct pmac_i2c_bus *bus) 1021 { 1022 return bus->channel; 1023 } 1024 EXPORT_SYMBOL_GPL(pmac_i2c_get_channel); 1025 1026 1027 struct i2c_adapter *pmac_i2c_get_adapter(struct pmac_i2c_bus *bus) 1028 { 1029 return &bus->adapter; 1030 } 1031 EXPORT_SYMBOL_GPL(pmac_i2c_get_adapter); 1032 1033 struct pmac_i2c_bus *pmac_i2c_adapter_to_bus(struct i2c_adapter *adapter) 1034 { 1035 struct pmac_i2c_bus *bus; 1036 1037 list_for_each_entry(bus, &pmac_i2c_busses, link) 1038 if (&bus->adapter == adapter) 1039 return bus; 1040 return NULL; 1041 } 1042 EXPORT_SYMBOL_GPL(pmac_i2c_adapter_to_bus); 1043 1044 int pmac_i2c_match_adapter(struct device_node *dev, struct i2c_adapter *adapter) 1045 { 1046 struct pmac_i2c_bus *bus = pmac_i2c_find_bus(dev); 1047 1048 if (bus == NULL) 1049 return 0; 1050 return (&bus->adapter == adapter); 1051 } 1052 EXPORT_SYMBOL_GPL(pmac_i2c_match_adapter); 1053 1054 int pmac_low_i2c_lock(struct device_node *np) 1055 { 1056 struct pmac_i2c_bus *bus, *found = NULL; 1057 1058 list_for_each_entry(bus, &pmac_i2c_busses, link) { 1059 if (np == bus->controller) { 1060 found = bus; 1061 break; 1062 } 1063 } 1064 if (!found) 1065 return -ENODEV; 1066 return pmac_i2c_open(bus, 0); 1067 } 1068 EXPORT_SYMBOL_GPL(pmac_low_i2c_lock); 1069 1070 int pmac_low_i2c_unlock(struct device_node *np) 1071 { 1072 struct pmac_i2c_bus *bus, *found = NULL; 1073 1074 list_for_each_entry(bus, &pmac_i2c_busses, link) { 1075 if (np == bus->controller) { 1076 found = bus; 1077 break; 1078 } 1079 } 1080 if (!found) 1081 return -ENODEV; 1082 pmac_i2c_close(bus); 1083 return 0; 1084 } 1085 EXPORT_SYMBOL_GPL(pmac_low_i2c_unlock); 1086 1087 1088 int pmac_i2c_open(struct pmac_i2c_bus *bus, int polled) 1089 { 1090 int rc; 1091 1092 mutex_lock(&bus->mutex); 1093 bus->polled = polled || pmac_i2c_force_poll; 1094 bus->opened = 1; 1095 bus->mode = pmac_i2c_mode_std; 1096 if (bus->open && (rc = bus->open(bus)) != 0) { 1097 bus->opened = 0; 1098 mutex_unlock(&bus->mutex); 1099 return rc; 1100 } 1101 return 0; 1102 } 1103 EXPORT_SYMBOL_GPL(pmac_i2c_open); 1104 1105 void pmac_i2c_close(struct pmac_i2c_bus *bus) 1106 { 1107 WARN_ON(!bus->opened); 1108 if (bus->close) 1109 bus->close(bus); 1110 bus->opened = 0; 1111 mutex_unlock(&bus->mutex); 1112 } 1113 EXPORT_SYMBOL_GPL(pmac_i2c_close); 1114 1115 int pmac_i2c_setmode(struct pmac_i2c_bus *bus, int mode) 1116 { 1117 WARN_ON(!bus->opened); 1118 1119 /* Report me if you see the error below as there might be a new 1120 * "combined4" mode that I need to implement for the SMU bus 1121 */ 1122 if (mode < pmac_i2c_mode_dumb || mode > pmac_i2c_mode_combined) { 1123 printk(KERN_ERR "low_i2c: Invalid mode %d requested on" 1124 " bus %pOF !\n", mode, bus->busnode); 1125 return -EINVAL; 1126 } 1127 bus->mode = mode; 1128 1129 return 0; 1130 } 1131 EXPORT_SYMBOL_GPL(pmac_i2c_setmode); 1132 1133 int pmac_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize, 1134 u32 subaddr, u8 *data, int len) 1135 { 1136 int rc; 1137 1138 WARN_ON(!bus->opened); 1139 1140 DBG("xfer() chan=%d, addrdir=0x%x, mode=%d, subsize=%d, subaddr=0x%x," 1141 " %d bytes, bus %pOF\n", bus->channel, addrdir, bus->mode, subsize, 1142 subaddr, len, bus->busnode); 1143 1144 rc = bus->xfer(bus, addrdir, subsize, subaddr, data, len); 1145 1146 #ifdef DEBUG 1147 if (rc) 1148 DBG("xfer error %d\n", rc); 1149 #endif 1150 return rc; 1151 } 1152 EXPORT_SYMBOL_GPL(pmac_i2c_xfer); 1153 1154 /* some quirks for platform function decoding */ 1155 enum { 1156 pmac_i2c_quirk_invmask = 0x00000001u, 1157 pmac_i2c_quirk_skip = 0x00000002u, 1158 }; 1159 1160 static void pmac_i2c_devscan(void (*callback)(struct device_node *dev, 1161 int quirks)) 1162 { 1163 struct pmac_i2c_bus *bus; 1164 struct device_node *np; 1165 static struct whitelist_ent { 1166 char *name; 1167 char *compatible; 1168 int quirks; 1169 } whitelist[] = { 1170 /* XXX Study device-tree's & apple drivers are get the quirks 1171 * right ! 1172 */ 1173 /* Workaround: It seems that running the clockspreading 1174 * properties on the eMac will cause lockups during boot. 1175 * The machine seems to work fine without that. So for now, 1176 * let's make sure i2c-hwclock doesn't match about "imic" 1177 * clocks and we'll figure out if we really need to do 1178 * something special about those later. 1179 */ 1180 { "i2c-hwclock", "imic5002", pmac_i2c_quirk_skip }, 1181 { "i2c-hwclock", "imic5003", pmac_i2c_quirk_skip }, 1182 { "i2c-hwclock", NULL, pmac_i2c_quirk_invmask }, 1183 { "i2c-cpu-voltage", NULL, 0}, 1184 { "temp-monitor", NULL, 0 }, 1185 { "supply-monitor", NULL, 0 }, 1186 { NULL, NULL, 0 }, 1187 }; 1188 1189 /* Only some devices need to have platform functions instantiated 1190 * here. For now, we have a table. Others, like 9554 i2c GPIOs used 1191 * on Xserve, if we ever do a driver for them, will use their own 1192 * platform function instance 1193 */ 1194 list_for_each_entry(bus, &pmac_i2c_busses, link) { 1195 for_each_child_of_node(bus->busnode, np) { 1196 struct whitelist_ent *p; 1197 /* If multibus, check if device is on that bus */ 1198 if (bus->flags & pmac_i2c_multibus) 1199 if (bus != pmac_i2c_find_bus(np)) 1200 continue; 1201 for (p = whitelist; p->name != NULL; p++) { 1202 if (!of_node_name_eq(np, p->name)) 1203 continue; 1204 if (p->compatible && 1205 !of_device_is_compatible(np, p->compatible)) 1206 continue; 1207 if (p->quirks & pmac_i2c_quirk_skip) 1208 break; 1209 callback(np, p->quirks); 1210 break; 1211 } 1212 } 1213 } 1214 } 1215 1216 #define MAX_I2C_DATA 64 1217 1218 struct pmac_i2c_pf_inst 1219 { 1220 struct pmac_i2c_bus *bus; 1221 u8 addr; 1222 u8 buffer[MAX_I2C_DATA]; 1223 u8 scratch[MAX_I2C_DATA]; 1224 int bytes; 1225 int quirks; 1226 }; 1227 1228 static void* pmac_i2c_do_begin(struct pmf_function *func, struct pmf_args *args) 1229 { 1230 struct pmac_i2c_pf_inst *inst; 1231 struct pmac_i2c_bus *bus; 1232 1233 bus = pmac_i2c_find_bus(func->node); 1234 if (bus == NULL) { 1235 printk(KERN_ERR "low_i2c: Can't find bus for %pOF (pfunc)\n", 1236 func->node); 1237 return NULL; 1238 } 1239 if (pmac_i2c_open(bus, 0)) { 1240 printk(KERN_ERR "low_i2c: Can't open i2c bus for %pOF (pfunc)\n", 1241 func->node); 1242 return NULL; 1243 } 1244 1245 /* XXX might need GFP_ATOMIC when called during the suspend process, 1246 * but then, there are already lots of issues with suspending when 1247 * near OOM that need to be resolved, the allocator itself should 1248 * probably make GFP_NOIO implicit during suspend 1249 */ 1250 inst = kzalloc(sizeof(struct pmac_i2c_pf_inst), GFP_KERNEL); 1251 if (inst == NULL) { 1252 pmac_i2c_close(bus); 1253 return NULL; 1254 } 1255 inst->bus = bus; 1256 inst->addr = pmac_i2c_get_dev_addr(func->node); 1257 inst->quirks = (int)(long)func->driver_data; 1258 return inst; 1259 } 1260 1261 static void pmac_i2c_do_end(struct pmf_function *func, void *instdata) 1262 { 1263 struct pmac_i2c_pf_inst *inst = instdata; 1264 1265 if (inst == NULL) 1266 return; 1267 pmac_i2c_close(inst->bus); 1268 kfree(inst); 1269 } 1270 1271 static int pmac_i2c_do_read(PMF_STD_ARGS, u32 len) 1272 { 1273 struct pmac_i2c_pf_inst *inst = instdata; 1274 1275 inst->bytes = len; 1276 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 0, 0, 1277 inst->buffer, len); 1278 } 1279 1280 static int pmac_i2c_do_write(PMF_STD_ARGS, u32 len, const u8 *data) 1281 { 1282 struct pmac_i2c_pf_inst *inst = instdata; 1283 1284 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0, 1285 (u8 *)data, len); 1286 } 1287 1288 /* This function is used to do the masking & OR'ing for the "rmw" type 1289 * callbacks. Ze should apply the mask and OR in the values in the 1290 * buffer before writing back. The problem is that it seems that 1291 * various darwin drivers implement the mask/or differently, thus 1292 * we need to check the quirks first 1293 */ 1294 static void pmac_i2c_do_apply_rmw(struct pmac_i2c_pf_inst *inst, 1295 u32 len, const u8 *mask, const u8 *val) 1296 { 1297 int i; 1298 1299 if (inst->quirks & pmac_i2c_quirk_invmask) { 1300 for (i = 0; i < len; i ++) 1301 inst->scratch[i] = (inst->buffer[i] & mask[i]) | val[i]; 1302 } else { 1303 for (i = 0; i < len; i ++) 1304 inst->scratch[i] = (inst->buffer[i] & ~mask[i]) 1305 | (val[i] & mask[i]); 1306 } 1307 } 1308 1309 static int pmac_i2c_do_rmw(PMF_STD_ARGS, u32 masklen, u32 valuelen, 1310 u32 totallen, const u8 *maskdata, 1311 const u8 *valuedata) 1312 { 1313 struct pmac_i2c_pf_inst *inst = instdata; 1314 1315 if (masklen > inst->bytes || valuelen > inst->bytes || 1316 totallen > inst->bytes || valuelen > masklen) 1317 return -EINVAL; 1318 1319 pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata); 1320 1321 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0, 1322 inst->scratch, totallen); 1323 } 1324 1325 static int pmac_i2c_do_read_sub(PMF_STD_ARGS, u8 subaddr, u32 len) 1326 { 1327 struct pmac_i2c_pf_inst *inst = instdata; 1328 1329 inst->bytes = len; 1330 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 1, subaddr, 1331 inst->buffer, len); 1332 } 1333 1334 static int pmac_i2c_do_write_sub(PMF_STD_ARGS, u8 subaddr, u32 len, 1335 const u8 *data) 1336 { 1337 struct pmac_i2c_pf_inst *inst = instdata; 1338 1339 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1, 1340 subaddr, (u8 *)data, len); 1341 } 1342 1343 static int pmac_i2c_do_set_mode(PMF_STD_ARGS, int mode) 1344 { 1345 struct pmac_i2c_pf_inst *inst = instdata; 1346 1347 return pmac_i2c_setmode(inst->bus, mode); 1348 } 1349 1350 static int pmac_i2c_do_rmw_sub(PMF_STD_ARGS, u8 subaddr, u32 masklen, 1351 u32 valuelen, u32 totallen, const u8 *maskdata, 1352 const u8 *valuedata) 1353 { 1354 struct pmac_i2c_pf_inst *inst = instdata; 1355 1356 if (masklen > inst->bytes || valuelen > inst->bytes || 1357 totallen > inst->bytes || valuelen > masklen) 1358 return -EINVAL; 1359 1360 pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata); 1361 1362 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1, 1363 subaddr, inst->scratch, totallen); 1364 } 1365 1366 static int pmac_i2c_do_mask_and_comp(PMF_STD_ARGS, u32 len, 1367 const u8 *maskdata, 1368 const u8 *valuedata) 1369 { 1370 struct pmac_i2c_pf_inst *inst = instdata; 1371 int i, match; 1372 1373 /* Get return value pointer, it's assumed to be a u32 */ 1374 if (!args || !args->count || !args->u[0].p) 1375 return -EINVAL; 1376 1377 /* Check buffer */ 1378 if (len > inst->bytes) 1379 return -EINVAL; 1380 1381 for (i = 0, match = 1; match && i < len; i ++) 1382 if ((inst->buffer[i] & maskdata[i]) != valuedata[i]) 1383 match = 0; 1384 *args->u[0].p = match; 1385 return 0; 1386 } 1387 1388 static int pmac_i2c_do_delay(PMF_STD_ARGS, u32 duration) 1389 { 1390 msleep((duration + 999) / 1000); 1391 return 0; 1392 } 1393 1394 1395 static struct pmf_handlers pmac_i2c_pfunc_handlers = { 1396 .begin = pmac_i2c_do_begin, 1397 .end = pmac_i2c_do_end, 1398 .read_i2c = pmac_i2c_do_read, 1399 .write_i2c = pmac_i2c_do_write, 1400 .rmw_i2c = pmac_i2c_do_rmw, 1401 .read_i2c_sub = pmac_i2c_do_read_sub, 1402 .write_i2c_sub = pmac_i2c_do_write_sub, 1403 .rmw_i2c_sub = pmac_i2c_do_rmw_sub, 1404 .set_i2c_mode = pmac_i2c_do_set_mode, 1405 .mask_and_compare = pmac_i2c_do_mask_and_comp, 1406 .delay = pmac_i2c_do_delay, 1407 }; 1408 1409 static void __init pmac_i2c_dev_create(struct device_node *np, int quirks) 1410 { 1411 DBG("dev_create(%pOF)\n", np); 1412 1413 pmf_register_driver(np, &pmac_i2c_pfunc_handlers, 1414 (void *)(long)quirks); 1415 } 1416 1417 static void __init pmac_i2c_dev_init(struct device_node *np, int quirks) 1418 { 1419 DBG("dev_create(%pOF)\n", np); 1420 1421 pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_INIT, NULL); 1422 } 1423 1424 static void pmac_i2c_dev_suspend(struct device_node *np, int quirks) 1425 { 1426 DBG("dev_suspend(%pOF)\n", np); 1427 pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_SLEEP, NULL); 1428 } 1429 1430 static void pmac_i2c_dev_resume(struct device_node *np, int quirks) 1431 { 1432 DBG("dev_resume(%pOF)\n", np); 1433 pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_WAKE, NULL); 1434 } 1435 1436 void pmac_pfunc_i2c_suspend(void) 1437 { 1438 pmac_i2c_devscan(pmac_i2c_dev_suspend); 1439 } 1440 1441 void pmac_pfunc_i2c_resume(void) 1442 { 1443 pmac_i2c_devscan(pmac_i2c_dev_resume); 1444 } 1445 1446 /* 1447 * Initialize us: probe all i2c busses on the machine, instantiate 1448 * busses and platform functions as needed. 1449 */ 1450 /* This is non-static as it might be called early by smp code */ 1451 int __init pmac_i2c_init(void) 1452 { 1453 static int i2c_inited; 1454 1455 if (i2c_inited) 1456 return 0; 1457 i2c_inited = 1; 1458 1459 /* Probe keywest-i2c busses */ 1460 kw_i2c_probe(); 1461 1462 #ifdef CONFIG_ADB_PMU 1463 /* Probe PMU i2c busses */ 1464 pmu_i2c_probe(); 1465 #endif 1466 1467 #ifdef CONFIG_PMAC_SMU 1468 /* Probe SMU i2c busses */ 1469 smu_i2c_probe(); 1470 #endif 1471 1472 /* Now add plaform functions for some known devices */ 1473 pmac_i2c_devscan(pmac_i2c_dev_create); 1474 1475 return 0; 1476 } 1477 machine_arch_initcall(powermac, pmac_i2c_init); 1478 1479 /* Since pmac_i2c_init can be called too early for the platform device 1480 * registration, we need to do it at a later time. In our case, subsys 1481 * happens to fit well, though I agree it's a bit of a hack... 1482 */ 1483 static int __init pmac_i2c_create_platform_devices(void) 1484 { 1485 struct pmac_i2c_bus *bus; 1486 int i = 0; 1487 1488 /* In the case where we are initialized from smp_init(), we must 1489 * not use the timer (and thus the irq). It's safe from now on 1490 * though 1491 */ 1492 pmac_i2c_force_poll = 0; 1493 1494 /* Create platform devices */ 1495 list_for_each_entry(bus, &pmac_i2c_busses, link) { 1496 bus->platform_dev = 1497 platform_device_alloc("i2c-powermac", i++); 1498 if (bus->platform_dev == NULL) 1499 return -ENOMEM; 1500 bus->platform_dev->dev.platform_data = bus; 1501 bus->platform_dev->dev.of_node = bus->busnode; 1502 platform_device_add(bus->platform_dev); 1503 } 1504 1505 /* Now call platform "init" functions */ 1506 pmac_i2c_devscan(pmac_i2c_dev_init); 1507 1508 return 0; 1509 } 1510 machine_subsys_initcall(powermac, pmac_i2c_create_platform_devices); 1511