1 /* 2 * arch/ppc/platforms/pmac_feature.c 3 * 4 * Copyright (C) 1996-2001 Paul Mackerras (paulus@cs.anu.edu.au) 5 * Ben. Herrenschmidt (benh@kernel.crashing.org) 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 * 12 * TODO: 13 * 14 * - Replace mdelay with some schedule loop if possible 15 * - Shorten some obfuscated delays on some routines (like modem 16 * power) 17 * - Refcount some clocks (see darwin) 18 * - Split split split... 19 * 20 */ 21 #include <linux/config.h> 22 #include <linux/types.h> 23 #include <linux/init.h> 24 #include <linux/delay.h> 25 #include <linux/kernel.h> 26 #include <linux/sched.h> 27 #include <linux/spinlock.h> 28 #include <linux/adb.h> 29 #include <linux/pmu.h> 30 #include <linux/ioport.h> 31 #include <linux/pci.h> 32 #include <asm/sections.h> 33 #include <asm/errno.h> 34 #include <asm/ohare.h> 35 #include <asm/heathrow.h> 36 #include <asm/keylargo.h> 37 #include <asm/uninorth.h> 38 #include <asm/io.h> 39 #include <asm/prom.h> 40 #include <asm/machdep.h> 41 #include <asm/pmac_feature.h> 42 #include <asm/dbdma.h> 43 #include <asm/pci-bridge.h> 44 #include <asm/pmac_low_i2c.h> 45 46 #undef DEBUG_FEATURE 47 48 #ifdef DEBUG_FEATURE 49 #define DBG(fmt...) printk(KERN_DEBUG fmt) 50 #else 51 #define DBG(fmt...) 52 #endif 53 54 #ifdef CONFIG_6xx 55 extern int powersave_lowspeed; 56 #endif 57 58 extern int powersave_nap; 59 extern struct device_node *k2_skiplist[2]; 60 61 62 /* 63 * We use a single global lock to protect accesses. Each driver has 64 * to take care of its own locking 65 */ 66 static DEFINE_SPINLOCK(feature_lock); 67 68 #define LOCK(flags) spin_lock_irqsave(&feature_lock, flags); 69 #define UNLOCK(flags) spin_unlock_irqrestore(&feature_lock, flags); 70 71 72 /* 73 * Instance of some macio stuffs 74 */ 75 struct macio_chip macio_chips[MAX_MACIO_CHIPS]; 76 77 struct macio_chip *macio_find(struct device_node *child, int type) 78 { 79 while(child) { 80 int i; 81 82 for (i=0; i < MAX_MACIO_CHIPS && macio_chips[i].of_node; i++) 83 if (child == macio_chips[i].of_node && 84 (!type || macio_chips[i].type == type)) 85 return &macio_chips[i]; 86 child = child->parent; 87 } 88 return NULL; 89 } 90 EXPORT_SYMBOL_GPL(macio_find); 91 92 static const char *macio_names[] = 93 { 94 "Unknown", 95 "Grand Central", 96 "OHare", 97 "OHareII", 98 "Heathrow", 99 "Gatwick", 100 "Paddington", 101 "Keylargo", 102 "Pangea", 103 "Intrepid", 104 "K2" 105 }; 106 107 108 109 /* 110 * Uninorth reg. access. Note that Uni-N regs are big endian 111 */ 112 113 #define UN_REG(r) (uninorth_base + ((r) >> 2)) 114 #define UN_IN(r) (in_be32(UN_REG(r))) 115 #define UN_OUT(r,v) (out_be32(UN_REG(r), (v))) 116 #define UN_BIS(r,v) (UN_OUT((r), UN_IN(r) | (v))) 117 #define UN_BIC(r,v) (UN_OUT((r), UN_IN(r) & ~(v))) 118 119 static struct device_node *uninorth_node; 120 static u32 __iomem *uninorth_base; 121 static u32 uninorth_rev; 122 static int uninorth_u3; 123 static void __iomem *u3_ht; 124 125 /* 126 * For each motherboard family, we have a table of functions pointers 127 * that handle the various features. 128 */ 129 130 typedef long (*feature_call)(struct device_node *node, long param, long value); 131 132 struct feature_table_entry { 133 unsigned int selector; 134 feature_call function; 135 }; 136 137 struct pmac_mb_def 138 { 139 const char* model_string; 140 const char* model_name; 141 int model_id; 142 struct feature_table_entry* features; 143 unsigned long board_flags; 144 }; 145 static struct pmac_mb_def pmac_mb; 146 147 /* 148 * Here are the chip specific feature functions 149 */ 150 151 static inline int simple_feature_tweak(struct device_node *node, int type, 152 int reg, u32 mask, int value) 153 { 154 struct macio_chip* macio; 155 unsigned long flags; 156 157 macio = macio_find(node, type); 158 if (!macio) 159 return -ENODEV; 160 LOCK(flags); 161 if (value) 162 MACIO_BIS(reg, mask); 163 else 164 MACIO_BIC(reg, mask); 165 (void)MACIO_IN32(reg); 166 UNLOCK(flags); 167 168 return 0; 169 } 170 171 #ifndef CONFIG_POWER4 172 173 static long ohare_htw_scc_enable(struct device_node *node, long param, 174 long value) 175 { 176 struct macio_chip* macio; 177 unsigned long chan_mask; 178 unsigned long fcr; 179 unsigned long flags; 180 int htw, trans; 181 unsigned long rmask; 182 183 macio = macio_find(node, 0); 184 if (!macio) 185 return -ENODEV; 186 if (!strcmp(node->name, "ch-a")) 187 chan_mask = MACIO_FLAG_SCCA_ON; 188 else if (!strcmp(node->name, "ch-b")) 189 chan_mask = MACIO_FLAG_SCCB_ON; 190 else 191 return -ENODEV; 192 193 htw = (macio->type == macio_heathrow || macio->type == macio_paddington 194 || macio->type == macio_gatwick); 195 /* On these machines, the HRW_SCC_TRANS_EN_N bit mustn't be touched */ 196 trans = (pmac_mb.model_id != PMAC_TYPE_YOSEMITE && 197 pmac_mb.model_id != PMAC_TYPE_YIKES); 198 if (value) { 199 #ifdef CONFIG_ADB_PMU 200 if ((param & 0xfff) == PMAC_SCC_IRDA) 201 pmu_enable_irled(1); 202 #endif /* CONFIG_ADB_PMU */ 203 LOCK(flags); 204 fcr = MACIO_IN32(OHARE_FCR); 205 /* Check if scc cell need enabling */ 206 if (!(fcr & OH_SCC_ENABLE)) { 207 fcr |= OH_SCC_ENABLE; 208 if (htw) { 209 /* Side effect: this will also power up the 210 * modem, but it's too messy to figure out on which 211 * ports this controls the tranceiver and on which 212 * it controls the modem 213 */ 214 if (trans) 215 fcr &= ~HRW_SCC_TRANS_EN_N; 216 MACIO_OUT32(OHARE_FCR, fcr); 217 fcr |= (rmask = HRW_RESET_SCC); 218 MACIO_OUT32(OHARE_FCR, fcr); 219 } else { 220 fcr |= (rmask = OH_SCC_RESET); 221 MACIO_OUT32(OHARE_FCR, fcr); 222 } 223 UNLOCK(flags); 224 (void)MACIO_IN32(OHARE_FCR); 225 mdelay(15); 226 LOCK(flags); 227 fcr &= ~rmask; 228 MACIO_OUT32(OHARE_FCR, fcr); 229 } 230 if (chan_mask & MACIO_FLAG_SCCA_ON) 231 fcr |= OH_SCCA_IO; 232 if (chan_mask & MACIO_FLAG_SCCB_ON) 233 fcr |= OH_SCCB_IO; 234 MACIO_OUT32(OHARE_FCR, fcr); 235 macio->flags |= chan_mask; 236 UNLOCK(flags); 237 if (param & PMAC_SCC_FLAG_XMON) 238 macio->flags |= MACIO_FLAG_SCC_LOCKED; 239 } else { 240 if (macio->flags & MACIO_FLAG_SCC_LOCKED) 241 return -EPERM; 242 LOCK(flags); 243 fcr = MACIO_IN32(OHARE_FCR); 244 if (chan_mask & MACIO_FLAG_SCCA_ON) 245 fcr &= ~OH_SCCA_IO; 246 if (chan_mask & MACIO_FLAG_SCCB_ON) 247 fcr &= ~OH_SCCB_IO; 248 MACIO_OUT32(OHARE_FCR, fcr); 249 if ((fcr & (OH_SCCA_IO | OH_SCCB_IO)) == 0) { 250 fcr &= ~OH_SCC_ENABLE; 251 if (htw && trans) 252 fcr |= HRW_SCC_TRANS_EN_N; 253 MACIO_OUT32(OHARE_FCR, fcr); 254 } 255 macio->flags &= ~(chan_mask); 256 UNLOCK(flags); 257 mdelay(10); 258 #ifdef CONFIG_ADB_PMU 259 if ((param & 0xfff) == PMAC_SCC_IRDA) 260 pmu_enable_irled(0); 261 #endif /* CONFIG_ADB_PMU */ 262 } 263 return 0; 264 } 265 266 static long ohare_floppy_enable(struct device_node *node, long param, 267 long value) 268 { 269 return simple_feature_tweak(node, macio_ohare, 270 OHARE_FCR, OH_FLOPPY_ENABLE, value); 271 } 272 273 static long ohare_mesh_enable(struct device_node *node, long param, long value) 274 { 275 return simple_feature_tweak(node, macio_ohare, 276 OHARE_FCR, OH_MESH_ENABLE, value); 277 } 278 279 static long ohare_ide_enable(struct device_node *node, long param, long value) 280 { 281 switch(param) { 282 case 0: 283 /* For some reason, setting the bit in set_initial_features() 284 * doesn't stick. I'm still investigating... --BenH. 285 */ 286 if (value) 287 simple_feature_tweak(node, macio_ohare, 288 OHARE_FCR, OH_IOBUS_ENABLE, 1); 289 return simple_feature_tweak(node, macio_ohare, 290 OHARE_FCR, OH_IDE0_ENABLE, value); 291 case 1: 292 return simple_feature_tweak(node, macio_ohare, 293 OHARE_FCR, OH_BAY_IDE_ENABLE, value); 294 default: 295 return -ENODEV; 296 } 297 } 298 299 static long ohare_ide_reset(struct device_node *node, long param, long value) 300 { 301 switch(param) { 302 case 0: 303 return simple_feature_tweak(node, macio_ohare, 304 OHARE_FCR, OH_IDE0_RESET_N, !value); 305 case 1: 306 return simple_feature_tweak(node, macio_ohare, 307 OHARE_FCR, OH_IDE1_RESET_N, !value); 308 default: 309 return -ENODEV; 310 } 311 } 312 313 static long ohare_sleep_state(struct device_node *node, long param, long value) 314 { 315 struct macio_chip* macio = &macio_chips[0]; 316 317 if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0) 318 return -EPERM; 319 if (value == 1) { 320 MACIO_BIC(OHARE_FCR, OH_IOBUS_ENABLE); 321 } else if (value == 0) { 322 MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE); 323 } 324 325 return 0; 326 } 327 328 static long heathrow_modem_enable(struct device_node *node, long param, 329 long value) 330 { 331 struct macio_chip* macio; 332 u8 gpio; 333 unsigned long flags; 334 335 macio = macio_find(node, macio_unknown); 336 if (!macio) 337 return -ENODEV; 338 gpio = MACIO_IN8(HRW_GPIO_MODEM_RESET) & ~1; 339 if (!value) { 340 LOCK(flags); 341 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio); 342 UNLOCK(flags); 343 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET); 344 mdelay(250); 345 } 346 if (pmac_mb.model_id != PMAC_TYPE_YOSEMITE && 347 pmac_mb.model_id != PMAC_TYPE_YIKES) { 348 LOCK(flags); 349 if (value) 350 MACIO_BIC(HEATHROW_FCR, HRW_SCC_TRANS_EN_N); 351 else 352 MACIO_BIS(HEATHROW_FCR, HRW_SCC_TRANS_EN_N); 353 UNLOCK(flags); 354 (void)MACIO_IN32(HEATHROW_FCR); 355 mdelay(250); 356 } 357 if (value) { 358 LOCK(flags); 359 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio | 1); 360 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET); 361 UNLOCK(flags); mdelay(250); LOCK(flags); 362 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio); 363 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET); 364 UNLOCK(flags); mdelay(250); LOCK(flags); 365 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio | 1); 366 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET); 367 UNLOCK(flags); mdelay(250); 368 } 369 return 0; 370 } 371 372 static long heathrow_floppy_enable(struct device_node *node, long param, 373 long value) 374 { 375 return simple_feature_tweak(node, macio_unknown, 376 HEATHROW_FCR, 377 HRW_SWIM_ENABLE|HRW_BAY_FLOPPY_ENABLE, 378 value); 379 } 380 381 static long heathrow_mesh_enable(struct device_node *node, long param, 382 long value) 383 { 384 struct macio_chip* macio; 385 unsigned long flags; 386 387 macio = macio_find(node, macio_unknown); 388 if (!macio) 389 return -ENODEV; 390 LOCK(flags); 391 /* Set clear mesh cell enable */ 392 if (value) 393 MACIO_BIS(HEATHROW_FCR, HRW_MESH_ENABLE); 394 else 395 MACIO_BIC(HEATHROW_FCR, HRW_MESH_ENABLE); 396 (void)MACIO_IN32(HEATHROW_FCR); 397 udelay(10); 398 /* Set/Clear termination power */ 399 if (value) 400 MACIO_BIC(HEATHROW_MBCR, 0x04000000); 401 else 402 MACIO_BIS(HEATHROW_MBCR, 0x04000000); 403 (void)MACIO_IN32(HEATHROW_MBCR); 404 udelay(10); 405 UNLOCK(flags); 406 407 return 0; 408 } 409 410 static long heathrow_ide_enable(struct device_node *node, long param, 411 long value) 412 { 413 switch(param) { 414 case 0: 415 return simple_feature_tweak(node, macio_unknown, 416 HEATHROW_FCR, HRW_IDE0_ENABLE, value); 417 case 1: 418 return simple_feature_tweak(node, macio_unknown, 419 HEATHROW_FCR, HRW_BAY_IDE_ENABLE, value); 420 default: 421 return -ENODEV; 422 } 423 } 424 425 static long heathrow_ide_reset(struct device_node *node, long param, 426 long value) 427 { 428 switch(param) { 429 case 0: 430 return simple_feature_tweak(node, macio_unknown, 431 HEATHROW_FCR, HRW_IDE0_RESET_N, !value); 432 case 1: 433 return simple_feature_tweak(node, macio_unknown, 434 HEATHROW_FCR, HRW_IDE1_RESET_N, !value); 435 default: 436 return -ENODEV; 437 } 438 } 439 440 static long heathrow_bmac_enable(struct device_node *node, long param, 441 long value) 442 { 443 struct macio_chip* macio; 444 unsigned long flags; 445 446 macio = macio_find(node, 0); 447 if (!macio) 448 return -ENODEV; 449 if (value) { 450 LOCK(flags); 451 MACIO_BIS(HEATHROW_FCR, HRW_BMAC_IO_ENABLE); 452 MACIO_BIS(HEATHROW_FCR, HRW_BMAC_RESET); 453 UNLOCK(flags); 454 (void)MACIO_IN32(HEATHROW_FCR); 455 mdelay(10); 456 LOCK(flags); 457 MACIO_BIC(HEATHROW_FCR, HRW_BMAC_RESET); 458 UNLOCK(flags); 459 (void)MACIO_IN32(HEATHROW_FCR); 460 mdelay(10); 461 } else { 462 LOCK(flags); 463 MACIO_BIC(HEATHROW_FCR, HRW_BMAC_IO_ENABLE); 464 UNLOCK(flags); 465 } 466 return 0; 467 } 468 469 static long heathrow_sound_enable(struct device_node *node, long param, 470 long value) 471 { 472 struct macio_chip* macio; 473 unsigned long flags; 474 475 /* B&W G3 and Yikes don't support that properly (the 476 * sound appear to never come back after beeing shut down). 477 */ 478 if (pmac_mb.model_id == PMAC_TYPE_YOSEMITE || 479 pmac_mb.model_id == PMAC_TYPE_YIKES) 480 return 0; 481 482 macio = macio_find(node, 0); 483 if (!macio) 484 return -ENODEV; 485 if (value) { 486 LOCK(flags); 487 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE); 488 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_POWER_N); 489 UNLOCK(flags); 490 (void)MACIO_IN32(HEATHROW_FCR); 491 } else { 492 LOCK(flags); 493 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_POWER_N); 494 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE); 495 UNLOCK(flags); 496 } 497 return 0; 498 } 499 500 static u32 save_fcr[6]; 501 static u32 save_mbcr; 502 static u32 save_gpio_levels[2]; 503 static u8 save_gpio_extint[KEYLARGO_GPIO_EXTINT_CNT]; 504 static u8 save_gpio_normal[KEYLARGO_GPIO_CNT]; 505 static u32 save_unin_clock_ctl; 506 static struct dbdma_regs save_dbdma[13]; 507 static struct dbdma_regs save_alt_dbdma[13]; 508 509 static void dbdma_save(struct macio_chip *macio, struct dbdma_regs *save) 510 { 511 int i; 512 513 /* Save state & config of DBDMA channels */ 514 for (i = 0; i < 13; i++) { 515 volatile struct dbdma_regs __iomem * chan = (void __iomem *) 516 (macio->base + ((0x8000+i*0x100)>>2)); 517 save[i].cmdptr_hi = in_le32(&chan->cmdptr_hi); 518 save[i].cmdptr = in_le32(&chan->cmdptr); 519 save[i].intr_sel = in_le32(&chan->intr_sel); 520 save[i].br_sel = in_le32(&chan->br_sel); 521 save[i].wait_sel = in_le32(&chan->wait_sel); 522 } 523 } 524 525 static void dbdma_restore(struct macio_chip *macio, struct dbdma_regs *save) 526 { 527 int i; 528 529 /* Save state & config of DBDMA channels */ 530 for (i = 0; i < 13; i++) { 531 volatile struct dbdma_regs __iomem * chan = (void __iomem *) 532 (macio->base + ((0x8000+i*0x100)>>2)); 533 out_le32(&chan->control, (ACTIVE|DEAD|WAKE|FLUSH|PAUSE|RUN)<<16); 534 while (in_le32(&chan->status) & ACTIVE) 535 mb(); 536 out_le32(&chan->cmdptr_hi, save[i].cmdptr_hi); 537 out_le32(&chan->cmdptr, save[i].cmdptr); 538 out_le32(&chan->intr_sel, save[i].intr_sel); 539 out_le32(&chan->br_sel, save[i].br_sel); 540 out_le32(&chan->wait_sel, save[i].wait_sel); 541 } 542 } 543 544 static void heathrow_sleep(struct macio_chip *macio, int secondary) 545 { 546 if (secondary) { 547 dbdma_save(macio, save_alt_dbdma); 548 save_fcr[2] = MACIO_IN32(0x38); 549 save_fcr[3] = MACIO_IN32(0x3c); 550 } else { 551 dbdma_save(macio, save_dbdma); 552 save_fcr[0] = MACIO_IN32(0x38); 553 save_fcr[1] = MACIO_IN32(0x3c); 554 save_mbcr = MACIO_IN32(0x34); 555 /* Make sure sound is shut down */ 556 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_POWER_N); 557 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE); 558 /* This seems to be necessary as well or the fan 559 * keeps coming up and battery drains fast */ 560 MACIO_BIC(HEATHROW_FCR, HRW_IOBUS_ENABLE); 561 MACIO_BIC(HEATHROW_FCR, HRW_IDE0_RESET_N); 562 /* Make sure eth is down even if module or sleep 563 * won't work properly */ 564 MACIO_BIC(HEATHROW_FCR, HRW_BMAC_IO_ENABLE | HRW_BMAC_RESET); 565 } 566 /* Make sure modem is shut down */ 567 MACIO_OUT8(HRW_GPIO_MODEM_RESET, 568 MACIO_IN8(HRW_GPIO_MODEM_RESET) & ~1); 569 MACIO_BIS(HEATHROW_FCR, HRW_SCC_TRANS_EN_N); 570 MACIO_BIC(HEATHROW_FCR, OH_SCCA_IO|OH_SCCB_IO|HRW_SCC_ENABLE); 571 572 /* Let things settle */ 573 (void)MACIO_IN32(HEATHROW_FCR); 574 } 575 576 static void heathrow_wakeup(struct macio_chip *macio, int secondary) 577 { 578 if (secondary) { 579 MACIO_OUT32(0x38, save_fcr[2]); 580 (void)MACIO_IN32(0x38); 581 mdelay(1); 582 MACIO_OUT32(0x3c, save_fcr[3]); 583 (void)MACIO_IN32(0x38); 584 mdelay(10); 585 dbdma_restore(macio, save_alt_dbdma); 586 } else { 587 MACIO_OUT32(0x38, save_fcr[0] | HRW_IOBUS_ENABLE); 588 (void)MACIO_IN32(0x38); 589 mdelay(1); 590 MACIO_OUT32(0x3c, save_fcr[1]); 591 (void)MACIO_IN32(0x38); 592 mdelay(1); 593 MACIO_OUT32(0x34, save_mbcr); 594 (void)MACIO_IN32(0x38); 595 mdelay(10); 596 dbdma_restore(macio, save_dbdma); 597 } 598 } 599 600 static long heathrow_sleep_state(struct device_node *node, long param, 601 long value) 602 { 603 if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0) 604 return -EPERM; 605 if (value == 1) { 606 if (macio_chips[1].type == macio_gatwick) 607 heathrow_sleep(&macio_chips[0], 1); 608 heathrow_sleep(&macio_chips[0], 0); 609 } else if (value == 0) { 610 heathrow_wakeup(&macio_chips[0], 0); 611 if (macio_chips[1].type == macio_gatwick) 612 heathrow_wakeup(&macio_chips[0], 1); 613 } 614 return 0; 615 } 616 617 static long core99_scc_enable(struct device_node *node, long param, long value) 618 { 619 struct macio_chip* macio; 620 unsigned long flags; 621 unsigned long chan_mask; 622 u32 fcr; 623 624 macio = macio_find(node, 0); 625 if (!macio) 626 return -ENODEV; 627 if (!strcmp(node->name, "ch-a")) 628 chan_mask = MACIO_FLAG_SCCA_ON; 629 else if (!strcmp(node->name, "ch-b")) 630 chan_mask = MACIO_FLAG_SCCB_ON; 631 else 632 return -ENODEV; 633 634 if (value) { 635 int need_reset_scc = 0; 636 int need_reset_irda = 0; 637 638 LOCK(flags); 639 fcr = MACIO_IN32(KEYLARGO_FCR0); 640 /* Check if scc cell need enabling */ 641 if (!(fcr & KL0_SCC_CELL_ENABLE)) { 642 fcr |= KL0_SCC_CELL_ENABLE; 643 need_reset_scc = 1; 644 } 645 if (chan_mask & MACIO_FLAG_SCCA_ON) { 646 fcr |= KL0_SCCA_ENABLE; 647 /* Don't enable line drivers for I2S modem */ 648 if ((param & 0xfff) == PMAC_SCC_I2S1) 649 fcr &= ~KL0_SCC_A_INTF_ENABLE; 650 else 651 fcr |= KL0_SCC_A_INTF_ENABLE; 652 } 653 if (chan_mask & MACIO_FLAG_SCCB_ON) { 654 fcr |= KL0_SCCB_ENABLE; 655 /* Perform irda specific inits */ 656 if ((param & 0xfff) == PMAC_SCC_IRDA) { 657 fcr &= ~KL0_SCC_B_INTF_ENABLE; 658 fcr |= KL0_IRDA_ENABLE; 659 fcr |= KL0_IRDA_CLK32_ENABLE | KL0_IRDA_CLK19_ENABLE; 660 fcr |= KL0_IRDA_SOURCE1_SEL; 661 fcr &= ~(KL0_IRDA_FAST_CONNECT|KL0_IRDA_DEFAULT1|KL0_IRDA_DEFAULT0); 662 fcr &= ~(KL0_IRDA_SOURCE2_SEL|KL0_IRDA_HIGH_BAND); 663 need_reset_irda = 1; 664 } else 665 fcr |= KL0_SCC_B_INTF_ENABLE; 666 } 667 MACIO_OUT32(KEYLARGO_FCR0, fcr); 668 macio->flags |= chan_mask; 669 if (need_reset_scc) { 670 MACIO_BIS(KEYLARGO_FCR0, KL0_SCC_RESET); 671 (void)MACIO_IN32(KEYLARGO_FCR0); 672 UNLOCK(flags); 673 mdelay(15); 674 LOCK(flags); 675 MACIO_BIC(KEYLARGO_FCR0, KL0_SCC_RESET); 676 } 677 if (need_reset_irda) { 678 MACIO_BIS(KEYLARGO_FCR0, KL0_IRDA_RESET); 679 (void)MACIO_IN32(KEYLARGO_FCR0); 680 UNLOCK(flags); 681 mdelay(15); 682 LOCK(flags); 683 MACIO_BIC(KEYLARGO_FCR0, KL0_IRDA_RESET); 684 } 685 UNLOCK(flags); 686 if (param & PMAC_SCC_FLAG_XMON) 687 macio->flags |= MACIO_FLAG_SCC_LOCKED; 688 } else { 689 if (macio->flags & MACIO_FLAG_SCC_LOCKED) 690 return -EPERM; 691 LOCK(flags); 692 fcr = MACIO_IN32(KEYLARGO_FCR0); 693 if (chan_mask & MACIO_FLAG_SCCA_ON) 694 fcr &= ~KL0_SCCA_ENABLE; 695 if (chan_mask & MACIO_FLAG_SCCB_ON) { 696 fcr &= ~KL0_SCCB_ENABLE; 697 /* Perform irda specific clears */ 698 if ((param & 0xfff) == PMAC_SCC_IRDA) { 699 fcr &= ~KL0_IRDA_ENABLE; 700 fcr &= ~(KL0_IRDA_CLK32_ENABLE | KL0_IRDA_CLK19_ENABLE); 701 fcr &= ~(KL0_IRDA_FAST_CONNECT|KL0_IRDA_DEFAULT1|KL0_IRDA_DEFAULT0); 702 fcr &= ~(KL0_IRDA_SOURCE1_SEL|KL0_IRDA_SOURCE2_SEL|KL0_IRDA_HIGH_BAND); 703 } 704 } 705 MACIO_OUT32(KEYLARGO_FCR0, fcr); 706 if ((fcr & (KL0_SCCA_ENABLE | KL0_SCCB_ENABLE)) == 0) { 707 fcr &= ~KL0_SCC_CELL_ENABLE; 708 MACIO_OUT32(KEYLARGO_FCR0, fcr); 709 } 710 macio->flags &= ~(chan_mask); 711 UNLOCK(flags); 712 mdelay(10); 713 } 714 return 0; 715 } 716 717 static long 718 core99_modem_enable(struct device_node *node, long param, long value) 719 { 720 struct macio_chip* macio; 721 u8 gpio; 722 unsigned long flags; 723 724 /* Hack for internal USB modem */ 725 if (node == NULL) { 726 if (macio_chips[0].type != macio_keylargo) 727 return -ENODEV; 728 node = macio_chips[0].of_node; 729 } 730 macio = macio_find(node, 0); 731 if (!macio) 732 return -ENODEV; 733 gpio = MACIO_IN8(KL_GPIO_MODEM_RESET); 734 gpio |= KEYLARGO_GPIO_OUTPUT_ENABLE; 735 gpio &= ~KEYLARGO_GPIO_OUTOUT_DATA; 736 737 if (!value) { 738 LOCK(flags); 739 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio); 740 UNLOCK(flags); 741 (void)MACIO_IN8(KL_GPIO_MODEM_RESET); 742 mdelay(250); 743 } 744 LOCK(flags); 745 if (value) { 746 MACIO_BIC(KEYLARGO_FCR2, KL2_ALT_DATA_OUT); 747 UNLOCK(flags); 748 (void)MACIO_IN32(KEYLARGO_FCR2); 749 mdelay(250); 750 } else { 751 MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT); 752 UNLOCK(flags); 753 } 754 if (value) { 755 LOCK(flags); 756 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA); 757 (void)MACIO_IN8(KL_GPIO_MODEM_RESET); 758 UNLOCK(flags); mdelay(250); LOCK(flags); 759 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio); 760 (void)MACIO_IN8(KL_GPIO_MODEM_RESET); 761 UNLOCK(flags); mdelay(250); LOCK(flags); 762 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA); 763 (void)MACIO_IN8(KL_GPIO_MODEM_RESET); 764 UNLOCK(flags); mdelay(250); 765 } 766 return 0; 767 } 768 769 static long 770 pangea_modem_enable(struct device_node *node, long param, long value) 771 { 772 struct macio_chip* macio; 773 u8 gpio; 774 unsigned long flags; 775 776 /* Hack for internal USB modem */ 777 if (node == NULL) { 778 if (macio_chips[0].type != macio_pangea && 779 macio_chips[0].type != macio_intrepid) 780 return -ENODEV; 781 node = macio_chips[0].of_node; 782 } 783 macio = macio_find(node, 0); 784 if (!macio) 785 return -ENODEV; 786 gpio = MACIO_IN8(KL_GPIO_MODEM_RESET); 787 gpio |= KEYLARGO_GPIO_OUTPUT_ENABLE; 788 gpio &= ~KEYLARGO_GPIO_OUTOUT_DATA; 789 790 if (!value) { 791 LOCK(flags); 792 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio); 793 UNLOCK(flags); 794 (void)MACIO_IN8(KL_GPIO_MODEM_RESET); 795 mdelay(250); 796 } 797 LOCK(flags); 798 if (value) { 799 MACIO_OUT8(KL_GPIO_MODEM_POWER, 800 KEYLARGO_GPIO_OUTPUT_ENABLE); 801 UNLOCK(flags); 802 (void)MACIO_IN32(KEYLARGO_FCR2); 803 mdelay(250); 804 } else { 805 MACIO_OUT8(KL_GPIO_MODEM_POWER, 806 KEYLARGO_GPIO_OUTPUT_ENABLE | KEYLARGO_GPIO_OUTOUT_DATA); 807 UNLOCK(flags); 808 } 809 if (value) { 810 LOCK(flags); 811 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA); 812 (void)MACIO_IN8(KL_GPIO_MODEM_RESET); 813 UNLOCK(flags); mdelay(250); LOCK(flags); 814 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio); 815 (void)MACIO_IN8(KL_GPIO_MODEM_RESET); 816 UNLOCK(flags); mdelay(250); LOCK(flags); 817 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA); 818 (void)MACIO_IN8(KL_GPIO_MODEM_RESET); 819 UNLOCK(flags); mdelay(250); 820 } 821 return 0; 822 } 823 824 static long 825 core99_ata100_enable(struct device_node *node, long value) 826 { 827 unsigned long flags; 828 struct pci_dev *pdev = NULL; 829 u8 pbus, pid; 830 831 if (uninorth_rev < 0x24) 832 return -ENODEV; 833 834 LOCK(flags); 835 if (value) 836 UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_ATA100); 837 else 838 UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_ATA100); 839 (void)UN_IN(UNI_N_CLOCK_CNTL); 840 UNLOCK(flags); 841 udelay(20); 842 843 if (value) { 844 if (pci_device_from_OF_node(node, &pbus, &pid) == 0) 845 pdev = pci_find_slot(pbus, pid); 846 if (pdev == NULL) 847 return 0; 848 pci_enable_device(pdev); 849 pci_set_master(pdev); 850 } 851 return 0; 852 } 853 854 static long 855 core99_ide_enable(struct device_node *node, long param, long value) 856 { 857 /* Bus ID 0 to 2 are KeyLargo based IDE, busID 3 is U2 858 * based ata-100 859 */ 860 switch(param) { 861 case 0: 862 return simple_feature_tweak(node, macio_unknown, 863 KEYLARGO_FCR1, KL1_EIDE0_ENABLE, value); 864 case 1: 865 return simple_feature_tweak(node, macio_unknown, 866 KEYLARGO_FCR1, KL1_EIDE1_ENABLE, value); 867 case 2: 868 return simple_feature_tweak(node, macio_unknown, 869 KEYLARGO_FCR1, KL1_UIDE_ENABLE, value); 870 case 3: 871 return core99_ata100_enable(node, value); 872 default: 873 return -ENODEV; 874 } 875 } 876 877 static long 878 core99_ide_reset(struct device_node *node, long param, long value) 879 { 880 switch(param) { 881 case 0: 882 return simple_feature_tweak(node, macio_unknown, 883 KEYLARGO_FCR1, KL1_EIDE0_RESET_N, !value); 884 case 1: 885 return simple_feature_tweak(node, macio_unknown, 886 KEYLARGO_FCR1, KL1_EIDE1_RESET_N, !value); 887 case 2: 888 return simple_feature_tweak(node, macio_unknown, 889 KEYLARGO_FCR1, KL1_UIDE_RESET_N, !value); 890 default: 891 return -ENODEV; 892 } 893 } 894 895 static long 896 core99_gmac_enable(struct device_node *node, long param, long value) 897 { 898 unsigned long flags; 899 900 LOCK(flags); 901 if (value) 902 UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_GMAC); 903 else 904 UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_GMAC); 905 (void)UN_IN(UNI_N_CLOCK_CNTL); 906 UNLOCK(flags); 907 udelay(20); 908 909 return 0; 910 } 911 912 static long 913 core99_gmac_phy_reset(struct device_node *node, long param, long value) 914 { 915 unsigned long flags; 916 struct macio_chip *macio; 917 918 macio = &macio_chips[0]; 919 if (macio->type != macio_keylargo && macio->type != macio_pangea && 920 macio->type != macio_intrepid) 921 return -ENODEV; 922 923 LOCK(flags); 924 MACIO_OUT8(KL_GPIO_ETH_PHY_RESET, KEYLARGO_GPIO_OUTPUT_ENABLE); 925 (void)MACIO_IN8(KL_GPIO_ETH_PHY_RESET); 926 UNLOCK(flags); 927 mdelay(10); 928 LOCK(flags); 929 MACIO_OUT8(KL_GPIO_ETH_PHY_RESET, /*KEYLARGO_GPIO_OUTPUT_ENABLE | */ 930 KEYLARGO_GPIO_OUTOUT_DATA); 931 UNLOCK(flags); 932 mdelay(10); 933 934 return 0; 935 } 936 937 static long 938 core99_sound_chip_enable(struct device_node *node, long param, long value) 939 { 940 struct macio_chip* macio; 941 unsigned long flags; 942 943 macio = macio_find(node, 0); 944 if (!macio) 945 return -ENODEV; 946 947 /* Do a better probe code, screamer G4 desktops & 948 * iMacs can do that too, add a recalibrate in 949 * the driver as well 950 */ 951 if (pmac_mb.model_id == PMAC_TYPE_PISMO || 952 pmac_mb.model_id == PMAC_TYPE_TITANIUM) { 953 LOCK(flags); 954 if (value) 955 MACIO_OUT8(KL_GPIO_SOUND_POWER, 956 KEYLARGO_GPIO_OUTPUT_ENABLE | 957 KEYLARGO_GPIO_OUTOUT_DATA); 958 else 959 MACIO_OUT8(KL_GPIO_SOUND_POWER, 960 KEYLARGO_GPIO_OUTPUT_ENABLE); 961 (void)MACIO_IN8(KL_GPIO_SOUND_POWER); 962 UNLOCK(flags); 963 } 964 return 0; 965 } 966 967 static long 968 core99_airport_enable(struct device_node *node, long param, long value) 969 { 970 struct macio_chip* macio; 971 unsigned long flags; 972 int state; 973 974 macio = macio_find(node, 0); 975 if (!macio) 976 return -ENODEV; 977 978 /* Hint: we allow passing of macio itself for the sake of the 979 * sleep code 980 */ 981 if (node != macio->of_node && 982 (!node->parent || node->parent != macio->of_node)) 983 return -ENODEV; 984 state = (macio->flags & MACIO_FLAG_AIRPORT_ON) != 0; 985 if (value == state) 986 return 0; 987 if (value) { 988 /* This code is a reproduction of OF enable-cardslot 989 * and init-wireless methods, slightly hacked until 990 * I got it working. 991 */ 992 LOCK(flags); 993 MACIO_OUT8(KEYLARGO_GPIO_0+0xf, 5); 994 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xf); 995 UNLOCK(flags); 996 mdelay(10); 997 LOCK(flags); 998 MACIO_OUT8(KEYLARGO_GPIO_0+0xf, 4); 999 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xf); 1000 UNLOCK(flags); 1001 1002 mdelay(10); 1003 1004 LOCK(flags); 1005 MACIO_BIC(KEYLARGO_FCR2, KL2_CARDSEL_16); 1006 (void)MACIO_IN32(KEYLARGO_FCR2); 1007 udelay(10); 1008 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xb, 0); 1009 (void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xb); 1010 udelay(10); 1011 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xa, 0x28); 1012 (void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xa); 1013 udelay(10); 1014 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xd, 0x28); 1015 (void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xd); 1016 udelay(10); 1017 MACIO_OUT8(KEYLARGO_GPIO_0+0xd, 0x28); 1018 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xd); 1019 udelay(10); 1020 MACIO_OUT8(KEYLARGO_GPIO_0+0xe, 0x28); 1021 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xe); 1022 UNLOCK(flags); 1023 udelay(10); 1024 MACIO_OUT32(0x1c000, 0); 1025 mdelay(1); 1026 MACIO_OUT8(0x1a3e0, 0x41); 1027 (void)MACIO_IN8(0x1a3e0); 1028 udelay(10); 1029 LOCK(flags); 1030 MACIO_BIS(KEYLARGO_FCR2, KL2_CARDSEL_16); 1031 (void)MACIO_IN32(KEYLARGO_FCR2); 1032 UNLOCK(flags); 1033 mdelay(100); 1034 1035 macio->flags |= MACIO_FLAG_AIRPORT_ON; 1036 } else { 1037 LOCK(flags); 1038 MACIO_BIC(KEYLARGO_FCR2, KL2_CARDSEL_16); 1039 (void)MACIO_IN32(KEYLARGO_FCR2); 1040 MACIO_OUT8(KL_GPIO_AIRPORT_0, 0); 1041 MACIO_OUT8(KL_GPIO_AIRPORT_1, 0); 1042 MACIO_OUT8(KL_GPIO_AIRPORT_2, 0); 1043 MACIO_OUT8(KL_GPIO_AIRPORT_3, 0); 1044 MACIO_OUT8(KL_GPIO_AIRPORT_4, 0); 1045 (void)MACIO_IN8(KL_GPIO_AIRPORT_4); 1046 UNLOCK(flags); 1047 1048 macio->flags &= ~MACIO_FLAG_AIRPORT_ON; 1049 } 1050 return 0; 1051 } 1052 1053 #ifdef CONFIG_SMP 1054 static long 1055 core99_reset_cpu(struct device_node *node, long param, long value) 1056 { 1057 unsigned int reset_io = 0; 1058 unsigned long flags; 1059 struct macio_chip *macio; 1060 struct device_node *np; 1061 const int dflt_reset_lines[] = { KL_GPIO_RESET_CPU0, 1062 KL_GPIO_RESET_CPU1, 1063 KL_GPIO_RESET_CPU2, 1064 KL_GPIO_RESET_CPU3 }; 1065 1066 macio = &macio_chips[0]; 1067 if (macio->type != macio_keylargo) 1068 return -ENODEV; 1069 1070 np = find_path_device("/cpus"); 1071 if (np == NULL) 1072 return -ENODEV; 1073 for (np = np->child; np != NULL; np = np->sibling) { 1074 u32 *num = (u32 *)get_property(np, "reg", NULL); 1075 u32 *rst = (u32 *)get_property(np, "soft-reset", NULL); 1076 if (num == NULL || rst == NULL) 1077 continue; 1078 if (param == *num) { 1079 reset_io = *rst; 1080 break; 1081 } 1082 } 1083 if (np == NULL || reset_io == 0) 1084 reset_io = dflt_reset_lines[param]; 1085 1086 LOCK(flags); 1087 MACIO_OUT8(reset_io, KEYLARGO_GPIO_OUTPUT_ENABLE); 1088 (void)MACIO_IN8(reset_io); 1089 udelay(1); 1090 MACIO_OUT8(reset_io, 0); 1091 (void)MACIO_IN8(reset_io); 1092 UNLOCK(flags); 1093 1094 return 0; 1095 } 1096 #endif /* CONFIG_SMP */ 1097 1098 static long 1099 core99_usb_enable(struct device_node *node, long param, long value) 1100 { 1101 struct macio_chip *macio; 1102 unsigned long flags; 1103 char *prop; 1104 int number; 1105 u32 reg; 1106 1107 macio = &macio_chips[0]; 1108 if (macio->type != macio_keylargo && macio->type != macio_pangea && 1109 macio->type != macio_intrepid) 1110 return -ENODEV; 1111 1112 prop = (char *)get_property(node, "AAPL,clock-id", NULL); 1113 if (!prop) 1114 return -ENODEV; 1115 if (strncmp(prop, "usb0u048", 8) == 0) 1116 number = 0; 1117 else if (strncmp(prop, "usb1u148", 8) == 0) 1118 number = 2; 1119 else if (strncmp(prop, "usb2u248", 8) == 0) 1120 number = 4; 1121 else 1122 return -ENODEV; 1123 1124 /* Sorry for the brute-force locking, but this is only used during 1125 * sleep and the timing seem to be critical 1126 */ 1127 LOCK(flags); 1128 if (value) { 1129 /* Turn ON */ 1130 if (number == 0) { 1131 MACIO_BIC(KEYLARGO_FCR0, (KL0_USB0_PAD_SUSPEND0 | KL0_USB0_PAD_SUSPEND1)); 1132 (void)MACIO_IN32(KEYLARGO_FCR0); 1133 UNLOCK(flags); 1134 mdelay(1); 1135 LOCK(flags); 1136 MACIO_BIS(KEYLARGO_FCR0, KL0_USB0_CELL_ENABLE); 1137 } else if (number == 2) { 1138 MACIO_BIC(KEYLARGO_FCR0, (KL0_USB1_PAD_SUSPEND0 | KL0_USB1_PAD_SUSPEND1)); 1139 UNLOCK(flags); 1140 (void)MACIO_IN32(KEYLARGO_FCR0); 1141 mdelay(1); 1142 LOCK(flags); 1143 MACIO_BIS(KEYLARGO_FCR0, KL0_USB1_CELL_ENABLE); 1144 } else if (number == 4) { 1145 MACIO_BIC(KEYLARGO_FCR1, (KL1_USB2_PAD_SUSPEND0 | KL1_USB2_PAD_SUSPEND1)); 1146 UNLOCK(flags); 1147 (void)MACIO_IN32(KEYLARGO_FCR1); 1148 mdelay(1); 1149 LOCK(flags); 1150 MACIO_BIS(KEYLARGO_FCR1, KL1_USB2_CELL_ENABLE); 1151 } 1152 if (number < 4) { 1153 reg = MACIO_IN32(KEYLARGO_FCR4); 1154 reg &= ~(KL4_PORT_WAKEUP_ENABLE(number) | KL4_PORT_RESUME_WAKE_EN(number) | 1155 KL4_PORT_CONNECT_WAKE_EN(number) | KL4_PORT_DISCONNECT_WAKE_EN(number)); 1156 reg &= ~(KL4_PORT_WAKEUP_ENABLE(number+1) | KL4_PORT_RESUME_WAKE_EN(number+1) | 1157 KL4_PORT_CONNECT_WAKE_EN(number+1) | KL4_PORT_DISCONNECT_WAKE_EN(number+1)); 1158 MACIO_OUT32(KEYLARGO_FCR4, reg); 1159 (void)MACIO_IN32(KEYLARGO_FCR4); 1160 udelay(10); 1161 } else { 1162 reg = MACIO_IN32(KEYLARGO_FCR3); 1163 reg &= ~(KL3_IT_PORT_WAKEUP_ENABLE(0) | KL3_IT_PORT_RESUME_WAKE_EN(0) | 1164 KL3_IT_PORT_CONNECT_WAKE_EN(0) | KL3_IT_PORT_DISCONNECT_WAKE_EN(0)); 1165 reg &= ~(KL3_IT_PORT_WAKEUP_ENABLE(1) | KL3_IT_PORT_RESUME_WAKE_EN(1) | 1166 KL3_IT_PORT_CONNECT_WAKE_EN(1) | KL3_IT_PORT_DISCONNECT_WAKE_EN(1)); 1167 MACIO_OUT32(KEYLARGO_FCR3, reg); 1168 (void)MACIO_IN32(KEYLARGO_FCR3); 1169 udelay(10); 1170 } 1171 if (macio->type == macio_intrepid) { 1172 /* wait for clock stopped bits to clear */ 1173 u32 test0 = 0, test1 = 0; 1174 u32 status0, status1; 1175 int timeout = 1000; 1176 1177 UNLOCK(flags); 1178 switch (number) { 1179 case 0: 1180 test0 = UNI_N_CLOCK_STOPPED_USB0; 1181 test1 = UNI_N_CLOCK_STOPPED_USB0PCI; 1182 break; 1183 case 2: 1184 test0 = UNI_N_CLOCK_STOPPED_USB1; 1185 test1 = UNI_N_CLOCK_STOPPED_USB1PCI; 1186 break; 1187 case 4: 1188 test0 = UNI_N_CLOCK_STOPPED_USB2; 1189 test1 = UNI_N_CLOCK_STOPPED_USB2PCI; 1190 break; 1191 } 1192 do { 1193 if (--timeout <= 0) { 1194 printk(KERN_ERR "core99_usb_enable: " 1195 "Timeout waiting for clocks\n"); 1196 break; 1197 } 1198 mdelay(1); 1199 status0 = UN_IN(UNI_N_CLOCK_STOP_STATUS0); 1200 status1 = UN_IN(UNI_N_CLOCK_STOP_STATUS1); 1201 } while ((status0 & test0) | (status1 & test1)); 1202 LOCK(flags); 1203 } 1204 } else { 1205 /* Turn OFF */ 1206 if (number < 4) { 1207 reg = MACIO_IN32(KEYLARGO_FCR4); 1208 reg |= KL4_PORT_WAKEUP_ENABLE(number) | KL4_PORT_RESUME_WAKE_EN(number) | 1209 KL4_PORT_CONNECT_WAKE_EN(number) | KL4_PORT_DISCONNECT_WAKE_EN(number); 1210 reg |= KL4_PORT_WAKEUP_ENABLE(number+1) | KL4_PORT_RESUME_WAKE_EN(number+1) | 1211 KL4_PORT_CONNECT_WAKE_EN(number+1) | KL4_PORT_DISCONNECT_WAKE_EN(number+1); 1212 MACIO_OUT32(KEYLARGO_FCR4, reg); 1213 (void)MACIO_IN32(KEYLARGO_FCR4); 1214 udelay(1); 1215 } else { 1216 reg = MACIO_IN32(KEYLARGO_FCR3); 1217 reg |= KL3_IT_PORT_WAKEUP_ENABLE(0) | KL3_IT_PORT_RESUME_WAKE_EN(0) | 1218 KL3_IT_PORT_CONNECT_WAKE_EN(0) | KL3_IT_PORT_DISCONNECT_WAKE_EN(0); 1219 reg |= KL3_IT_PORT_WAKEUP_ENABLE(1) | KL3_IT_PORT_RESUME_WAKE_EN(1) | 1220 KL3_IT_PORT_CONNECT_WAKE_EN(1) | KL3_IT_PORT_DISCONNECT_WAKE_EN(1); 1221 MACIO_OUT32(KEYLARGO_FCR3, reg); 1222 (void)MACIO_IN32(KEYLARGO_FCR3); 1223 udelay(1); 1224 } 1225 if (number == 0) { 1226 if (macio->type != macio_intrepid) 1227 MACIO_BIC(KEYLARGO_FCR0, KL0_USB0_CELL_ENABLE); 1228 (void)MACIO_IN32(KEYLARGO_FCR0); 1229 udelay(1); 1230 MACIO_BIS(KEYLARGO_FCR0, (KL0_USB0_PAD_SUSPEND0 | KL0_USB0_PAD_SUSPEND1)); 1231 (void)MACIO_IN32(KEYLARGO_FCR0); 1232 } else if (number == 2) { 1233 if (macio->type != macio_intrepid) 1234 MACIO_BIC(KEYLARGO_FCR0, KL0_USB1_CELL_ENABLE); 1235 (void)MACIO_IN32(KEYLARGO_FCR0); 1236 udelay(1); 1237 MACIO_BIS(KEYLARGO_FCR0, (KL0_USB1_PAD_SUSPEND0 | KL0_USB1_PAD_SUSPEND1)); 1238 (void)MACIO_IN32(KEYLARGO_FCR0); 1239 } else if (number == 4) { 1240 udelay(1); 1241 MACIO_BIS(KEYLARGO_FCR1, (KL1_USB2_PAD_SUSPEND0 | KL1_USB2_PAD_SUSPEND1)); 1242 (void)MACIO_IN32(KEYLARGO_FCR1); 1243 } 1244 udelay(1); 1245 } 1246 UNLOCK(flags); 1247 1248 return 0; 1249 } 1250 1251 static long 1252 core99_firewire_enable(struct device_node *node, long param, long value) 1253 { 1254 unsigned long flags; 1255 struct macio_chip *macio; 1256 1257 macio = &macio_chips[0]; 1258 if (macio->type != macio_keylargo && macio->type != macio_pangea && 1259 macio->type != macio_intrepid) 1260 return -ENODEV; 1261 if (!(macio->flags & MACIO_FLAG_FW_SUPPORTED)) 1262 return -ENODEV; 1263 1264 LOCK(flags); 1265 if (value) { 1266 UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_FW); 1267 (void)UN_IN(UNI_N_CLOCK_CNTL); 1268 } else { 1269 UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_FW); 1270 (void)UN_IN(UNI_N_CLOCK_CNTL); 1271 } 1272 UNLOCK(flags); 1273 mdelay(1); 1274 1275 return 0; 1276 } 1277 1278 static long 1279 core99_firewire_cable_power(struct device_node *node, long param, long value) 1280 { 1281 unsigned long flags; 1282 struct macio_chip *macio; 1283 1284 /* Trick: we allow NULL node */ 1285 if ((pmac_mb.board_flags & PMAC_MB_HAS_FW_POWER) == 0) 1286 return -ENODEV; 1287 macio = &macio_chips[0]; 1288 if (macio->type != macio_keylargo && macio->type != macio_pangea && 1289 macio->type != macio_intrepid) 1290 return -ENODEV; 1291 if (!(macio->flags & MACIO_FLAG_FW_SUPPORTED)) 1292 return -ENODEV; 1293 1294 LOCK(flags); 1295 if (value) { 1296 MACIO_OUT8(KL_GPIO_FW_CABLE_POWER , 0); 1297 MACIO_IN8(KL_GPIO_FW_CABLE_POWER); 1298 udelay(10); 1299 } else { 1300 MACIO_OUT8(KL_GPIO_FW_CABLE_POWER , 4); 1301 MACIO_IN8(KL_GPIO_FW_CABLE_POWER); udelay(10); 1302 } 1303 UNLOCK(flags); 1304 mdelay(1); 1305 1306 return 0; 1307 } 1308 1309 static long 1310 intrepid_aack_delay_enable(struct device_node *node, long param, long value) 1311 { 1312 unsigned long flags; 1313 1314 if (uninorth_rev < 0xd2) 1315 return -ENODEV; 1316 1317 LOCK(flags); 1318 if (param) 1319 UN_BIS(UNI_N_AACK_DELAY, UNI_N_AACK_DELAY_ENABLE); 1320 else 1321 UN_BIC(UNI_N_AACK_DELAY, UNI_N_AACK_DELAY_ENABLE); 1322 UNLOCK(flags); 1323 1324 return 0; 1325 } 1326 1327 1328 #endif /* CONFIG_POWER4 */ 1329 1330 static long 1331 core99_read_gpio(struct device_node *node, long param, long value) 1332 { 1333 struct macio_chip *macio = &macio_chips[0]; 1334 1335 return MACIO_IN8(param); 1336 } 1337 1338 1339 static long 1340 core99_write_gpio(struct device_node *node, long param, long value) 1341 { 1342 struct macio_chip *macio = &macio_chips[0]; 1343 1344 MACIO_OUT8(param, (u8)(value & 0xff)); 1345 return 0; 1346 } 1347 1348 #ifdef CONFIG_POWER4 1349 static long g5_gmac_enable(struct device_node *node, long param, long value) 1350 { 1351 struct macio_chip *macio = &macio_chips[0]; 1352 unsigned long flags; 1353 1354 if (node == NULL) 1355 return -ENODEV; 1356 1357 LOCK(flags); 1358 if (value) { 1359 MACIO_BIS(KEYLARGO_FCR1, K2_FCR1_GMAC_CLK_ENABLE); 1360 mb(); 1361 k2_skiplist[0] = NULL; 1362 } else { 1363 k2_skiplist[0] = node; 1364 mb(); 1365 MACIO_BIC(KEYLARGO_FCR1, K2_FCR1_GMAC_CLK_ENABLE); 1366 } 1367 1368 UNLOCK(flags); 1369 mdelay(1); 1370 1371 return 0; 1372 } 1373 1374 static long g5_fw_enable(struct device_node *node, long param, long value) 1375 { 1376 struct macio_chip *macio = &macio_chips[0]; 1377 unsigned long flags; 1378 1379 if (node == NULL) 1380 return -ENODEV; 1381 1382 LOCK(flags); 1383 if (value) { 1384 MACIO_BIS(KEYLARGO_FCR1, K2_FCR1_FW_CLK_ENABLE); 1385 mb(); 1386 k2_skiplist[1] = NULL; 1387 } else { 1388 k2_skiplist[1] = node; 1389 mb(); 1390 MACIO_BIC(KEYLARGO_FCR1, K2_FCR1_FW_CLK_ENABLE); 1391 } 1392 1393 UNLOCK(flags); 1394 mdelay(1); 1395 1396 return 0; 1397 } 1398 1399 static long g5_mpic_enable(struct device_node *node, long param, long value) 1400 { 1401 unsigned long flags; 1402 1403 if (node->parent == NULL || strcmp(node->parent->name, "u3")) 1404 return 0; 1405 1406 LOCK(flags); 1407 UN_BIS(U3_TOGGLE_REG, U3_MPIC_RESET | U3_MPIC_OUTPUT_ENABLE); 1408 UNLOCK(flags); 1409 1410 return 0; 1411 } 1412 1413 static long g5_eth_phy_reset(struct device_node *node, long param, long value) 1414 { 1415 struct macio_chip *macio = &macio_chips[0]; 1416 struct device_node *phy; 1417 int need_reset; 1418 1419 /* 1420 * We must not reset the combo PHYs, only the BCM5221 found in 1421 * the iMac G5. 1422 */ 1423 phy = of_get_next_child(node, NULL); 1424 if (!phy) 1425 return -ENODEV; 1426 need_reset = device_is_compatible(phy, "B5221"); 1427 of_node_put(phy); 1428 if (!need_reset) 1429 return 0; 1430 1431 /* PHY reset is GPIO 29, not in device-tree unfortunately */ 1432 MACIO_OUT8(K2_GPIO_EXTINT_0 + 29, 1433 KEYLARGO_GPIO_OUTPUT_ENABLE | KEYLARGO_GPIO_OUTOUT_DATA); 1434 /* Thankfully, this is now always called at a time when we can 1435 * schedule by sungem. 1436 */ 1437 msleep(10); 1438 MACIO_OUT8(K2_GPIO_EXTINT_0 + 29, 0); 1439 1440 return 0; 1441 } 1442 1443 static long g5_i2s_enable(struct device_node *node, long param, long value) 1444 { 1445 /* Very crude implementation for now */ 1446 struct macio_chip *macio = &macio_chips[0]; 1447 unsigned long flags; 1448 1449 if (value == 0) 1450 return 0; /* don't disable yet */ 1451 1452 LOCK(flags); 1453 MACIO_BIS(KEYLARGO_FCR3, KL3_CLK45_ENABLE | KL3_CLK49_ENABLE | 1454 KL3_I2S0_CLK18_ENABLE); 1455 udelay(10); 1456 MACIO_BIS(KEYLARGO_FCR1, K2_FCR1_I2S0_CELL_ENABLE | 1457 K2_FCR1_I2S0_CLK_ENABLE_BIT | K2_FCR1_I2S0_ENABLE); 1458 udelay(10); 1459 MACIO_BIC(KEYLARGO_FCR1, K2_FCR1_I2S0_RESET); 1460 UNLOCK(flags); 1461 udelay(10); 1462 1463 return 0; 1464 } 1465 1466 1467 #ifdef CONFIG_SMP 1468 static long g5_reset_cpu(struct device_node *node, long param, long value) 1469 { 1470 unsigned int reset_io = 0; 1471 unsigned long flags; 1472 struct macio_chip *macio; 1473 struct device_node *np; 1474 1475 macio = &macio_chips[0]; 1476 if (macio->type != macio_keylargo2) 1477 return -ENODEV; 1478 1479 np = find_path_device("/cpus"); 1480 if (np == NULL) 1481 return -ENODEV; 1482 for (np = np->child; np != NULL; np = np->sibling) { 1483 u32 *num = (u32 *)get_property(np, "reg", NULL); 1484 u32 *rst = (u32 *)get_property(np, "soft-reset", NULL); 1485 if (num == NULL || rst == NULL) 1486 continue; 1487 if (param == *num) { 1488 reset_io = *rst; 1489 break; 1490 } 1491 } 1492 if (np == NULL || reset_io == 0) 1493 return -ENODEV; 1494 1495 LOCK(flags); 1496 MACIO_OUT8(reset_io, KEYLARGO_GPIO_OUTPUT_ENABLE); 1497 (void)MACIO_IN8(reset_io); 1498 udelay(1); 1499 MACIO_OUT8(reset_io, 0); 1500 (void)MACIO_IN8(reset_io); 1501 UNLOCK(flags); 1502 1503 return 0; 1504 } 1505 #endif /* CONFIG_SMP */ 1506 1507 /* 1508 * This can be called from pmac_smp so isn't static 1509 * 1510 * This takes the second CPU off the bus on dual CPU machines 1511 * running UP 1512 */ 1513 void g5_phy_disable_cpu1(void) 1514 { 1515 UN_OUT(U3_API_PHY_CONFIG_1, 0); 1516 } 1517 #endif /* CONFIG_POWER4 */ 1518 1519 #ifndef CONFIG_POWER4 1520 1521 static void 1522 keylargo_shutdown(struct macio_chip *macio, int sleep_mode) 1523 { 1524 u32 temp; 1525 1526 if (sleep_mode) { 1527 mdelay(1); 1528 MACIO_BIS(KEYLARGO_FCR0, KL0_USB_REF_SUSPEND); 1529 (void)MACIO_IN32(KEYLARGO_FCR0); 1530 mdelay(1); 1531 } 1532 1533 MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE | 1534 KL0_SCC_CELL_ENABLE | 1535 KL0_IRDA_ENABLE | KL0_IRDA_CLK32_ENABLE | 1536 KL0_IRDA_CLK19_ENABLE); 1537 1538 MACIO_BIC(KEYLARGO_MBCR, KL_MBCR_MB0_DEV_MASK); 1539 MACIO_BIS(KEYLARGO_MBCR, KL_MBCR_MB0_IDE_ENABLE); 1540 1541 MACIO_BIC(KEYLARGO_FCR1, 1542 KL1_AUDIO_SEL_22MCLK | KL1_AUDIO_CLK_ENABLE_BIT | 1543 KL1_AUDIO_CLK_OUT_ENABLE | KL1_AUDIO_CELL_ENABLE | 1544 KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT | 1545 KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE | 1546 KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE | 1547 KL1_EIDE0_ENABLE | KL1_EIDE0_RESET_N | 1548 KL1_EIDE1_ENABLE | KL1_EIDE1_RESET_N | 1549 KL1_UIDE_ENABLE); 1550 1551 MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT); 1552 MACIO_BIC(KEYLARGO_FCR2, KL2_IOBUS_ENABLE); 1553 1554 temp = MACIO_IN32(KEYLARGO_FCR3); 1555 if (macio->rev >= 2) { 1556 temp |= KL3_SHUTDOWN_PLL2X; 1557 if (sleep_mode) 1558 temp |= KL3_SHUTDOWN_PLL_TOTAL; 1559 } 1560 1561 temp |= KL3_SHUTDOWN_PLLKW6 | KL3_SHUTDOWN_PLLKW4 | 1562 KL3_SHUTDOWN_PLLKW35; 1563 if (sleep_mode) 1564 temp |= KL3_SHUTDOWN_PLLKW12; 1565 temp &= ~(KL3_CLK66_ENABLE | KL3_CLK49_ENABLE | KL3_CLK45_ENABLE 1566 | KL3_CLK31_ENABLE | KL3_I2S1_CLK18_ENABLE | KL3_I2S0_CLK18_ENABLE); 1567 if (sleep_mode) 1568 temp &= ~(KL3_TIMER_CLK18_ENABLE | KL3_VIA_CLK16_ENABLE); 1569 MACIO_OUT32(KEYLARGO_FCR3, temp); 1570 1571 /* Flush posted writes & wait a bit */ 1572 (void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1); 1573 } 1574 1575 static void 1576 pangea_shutdown(struct macio_chip *macio, int sleep_mode) 1577 { 1578 u32 temp; 1579 1580 MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE | 1581 KL0_SCC_CELL_ENABLE | 1582 KL0_USB0_CELL_ENABLE | KL0_USB1_CELL_ENABLE); 1583 1584 MACIO_BIC(KEYLARGO_FCR1, 1585 KL1_AUDIO_SEL_22MCLK | KL1_AUDIO_CLK_ENABLE_BIT | 1586 KL1_AUDIO_CLK_OUT_ENABLE | KL1_AUDIO_CELL_ENABLE | 1587 KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT | 1588 KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE | 1589 KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE | 1590 KL1_UIDE_ENABLE); 1591 if (pmac_mb.board_flags & PMAC_MB_MOBILE) 1592 MACIO_BIC(KEYLARGO_FCR1, KL1_UIDE_RESET_N); 1593 1594 MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT); 1595 1596 temp = MACIO_IN32(KEYLARGO_FCR3); 1597 temp |= KL3_SHUTDOWN_PLLKW6 | KL3_SHUTDOWN_PLLKW4 | 1598 KL3_SHUTDOWN_PLLKW35; 1599 temp &= ~(KL3_CLK49_ENABLE | KL3_CLK45_ENABLE | KL3_CLK31_ENABLE 1600 | KL3_I2S0_CLK18_ENABLE | KL3_I2S1_CLK18_ENABLE); 1601 if (sleep_mode) 1602 temp &= ~(KL3_VIA_CLK16_ENABLE | KL3_TIMER_CLK18_ENABLE); 1603 MACIO_OUT32(KEYLARGO_FCR3, temp); 1604 1605 /* Flush posted writes & wait a bit */ 1606 (void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1); 1607 } 1608 1609 static void 1610 intrepid_shutdown(struct macio_chip *macio, int sleep_mode) 1611 { 1612 u32 temp; 1613 1614 MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE | 1615 KL0_SCC_CELL_ENABLE); 1616 1617 MACIO_BIC(KEYLARGO_FCR1, 1618 /*KL1_USB2_CELL_ENABLE |*/ 1619 KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT | 1620 KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE | 1621 KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE); 1622 if (pmac_mb.board_flags & PMAC_MB_MOBILE) 1623 MACIO_BIC(KEYLARGO_FCR1, KL1_UIDE_RESET_N); 1624 1625 temp = MACIO_IN32(KEYLARGO_FCR3); 1626 temp &= ~(KL3_CLK49_ENABLE | KL3_CLK45_ENABLE | 1627 KL3_I2S1_CLK18_ENABLE | KL3_I2S0_CLK18_ENABLE); 1628 if (sleep_mode) 1629 temp &= ~(KL3_TIMER_CLK18_ENABLE | KL3_IT_VIA_CLK32_ENABLE); 1630 MACIO_OUT32(KEYLARGO_FCR3, temp); 1631 1632 /* Flush posted writes & wait a bit */ 1633 (void)MACIO_IN32(KEYLARGO_FCR0); 1634 mdelay(10); 1635 } 1636 1637 1638 void pmac_tweak_clock_spreading(int enable) 1639 { 1640 struct macio_chip *macio = &macio_chips[0]; 1641 1642 /* Hack for doing clock spreading on some machines PowerBooks and 1643 * iBooks. This implements the "platform-do-clockspreading" OF 1644 * property as decoded manually on various models. For safety, we also 1645 * check the product ID in the device-tree in cases we'll whack the i2c 1646 * chip to make reasonably sure we won't set wrong values in there 1647 * 1648 * Of course, ultimately, we have to implement a real parser for 1649 * the platform-do-* stuff... 1650 */ 1651 1652 if (macio->type == macio_intrepid) { 1653 struct device_node *clock = 1654 of_find_node_by_path("/uni-n@f8000000/hw-clock"); 1655 if (clock && get_property(clock, "platform-do-clockspreading", 1656 NULL)) { 1657 printk(KERN_INFO "%sabling clock spreading on Intrepid" 1658 " ASIC\n", enable ? "En" : "Dis"); 1659 if (enable) 1660 UN_OUT(UNI_N_CLOCK_SPREADING, 2); 1661 else 1662 UN_OUT(UNI_N_CLOCK_SPREADING, 0); 1663 mdelay(40); 1664 } 1665 of_node_put(clock); 1666 } 1667 1668 while (machine_is_compatible("PowerBook5,2") || 1669 machine_is_compatible("PowerBook5,3") || 1670 machine_is_compatible("PowerBook6,2") || 1671 machine_is_compatible("PowerBook6,3")) { 1672 struct device_node *ui2c = of_find_node_by_type(NULL, "i2c"); 1673 struct device_node *dt = of_find_node_by_name(NULL, "device-tree"); 1674 u8 buffer[9]; 1675 u32 *productID; 1676 int i, rc, changed = 0; 1677 1678 if (dt == NULL) 1679 break; 1680 productID = (u32 *)get_property(dt, "pid#", NULL); 1681 if (productID == NULL) 1682 break; 1683 while(ui2c) { 1684 struct device_node *p = of_get_parent(ui2c); 1685 if (p && !strcmp(p->name, "uni-n")) 1686 break; 1687 ui2c = of_find_node_by_type(ui2c, "i2c"); 1688 } 1689 if (ui2c == NULL) 1690 break; 1691 DBG("Trying to bump clock speed for PID: %08x...\n", *productID); 1692 rc = pmac_low_i2c_open(ui2c, 1); 1693 if (rc != 0) 1694 break; 1695 pmac_low_i2c_setmode(ui2c, pmac_low_i2c_mode_combined); 1696 rc = pmac_low_i2c_xfer(ui2c, 0xd2 | pmac_low_i2c_read, 0x80, buffer, 9); 1697 DBG("read result: %d,", rc); 1698 if (rc != 0) { 1699 pmac_low_i2c_close(ui2c); 1700 break; 1701 } 1702 for (i=0; i<9; i++) 1703 DBG(" %02x", buffer[i]); 1704 DBG("\n"); 1705 1706 switch(*productID) { 1707 case 0x1182: /* AlBook 12" rev 2 */ 1708 case 0x1183: /* iBook G4 12" */ 1709 buffer[0] = (buffer[0] & 0x8f) | 0x70; 1710 buffer[2] = (buffer[2] & 0x7f) | 0x00; 1711 buffer[5] = (buffer[5] & 0x80) | 0x31; 1712 buffer[6] = (buffer[6] & 0x40) | 0xb0; 1713 buffer[7] = (buffer[7] & 0x00) | (enable ? 0xc0 : 0xba); 1714 buffer[8] = (buffer[8] & 0x00) | 0x30; 1715 changed = 1; 1716 break; 1717 case 0x3142: /* AlBook 15" (ATI M10) */ 1718 case 0x3143: /* AlBook 17" (ATI M10) */ 1719 buffer[0] = (buffer[0] & 0xaf) | 0x50; 1720 buffer[2] = (buffer[2] & 0x7f) | 0x00; 1721 buffer[5] = (buffer[5] & 0x80) | 0x31; 1722 buffer[6] = (buffer[6] & 0x40) | 0xb0; 1723 buffer[7] = (buffer[7] & 0x00) | (enable ? 0xd0 : 0xc0); 1724 buffer[8] = (buffer[8] & 0x00) | 0x30; 1725 changed = 1; 1726 break; 1727 default: 1728 DBG("i2c-hwclock: Machine model not handled\n"); 1729 break; 1730 } 1731 if (!changed) { 1732 pmac_low_i2c_close(ui2c); 1733 break; 1734 } 1735 printk(KERN_INFO "%sabling clock spreading on i2c clock chip\n", 1736 enable ? "En" : "Dis"); 1737 1738 pmac_low_i2c_setmode(ui2c, pmac_low_i2c_mode_stdsub); 1739 rc = pmac_low_i2c_xfer(ui2c, 0xd2 | pmac_low_i2c_write, 0x80, buffer, 9); 1740 DBG("write result: %d,", rc); 1741 pmac_low_i2c_setmode(ui2c, pmac_low_i2c_mode_combined); 1742 rc = pmac_low_i2c_xfer(ui2c, 0xd2 | pmac_low_i2c_read, 0x80, buffer, 9); 1743 DBG("read result: %d,", rc); 1744 if (rc != 0) { 1745 pmac_low_i2c_close(ui2c); 1746 break; 1747 } 1748 for (i=0; i<9; i++) 1749 DBG(" %02x", buffer[i]); 1750 pmac_low_i2c_close(ui2c); 1751 break; 1752 } 1753 } 1754 1755 1756 static int 1757 core99_sleep(void) 1758 { 1759 struct macio_chip *macio; 1760 int i; 1761 1762 macio = &macio_chips[0]; 1763 if (macio->type != macio_keylargo && macio->type != macio_pangea && 1764 macio->type != macio_intrepid) 1765 return -ENODEV; 1766 1767 /* We power off the wireless slot in case it was not done 1768 * by the driver. We don't power it on automatically however 1769 */ 1770 if (macio->flags & MACIO_FLAG_AIRPORT_ON) 1771 core99_airport_enable(macio->of_node, 0, 0); 1772 1773 /* We power off the FW cable. Should be done by the driver... */ 1774 if (macio->flags & MACIO_FLAG_FW_SUPPORTED) { 1775 core99_firewire_enable(NULL, 0, 0); 1776 core99_firewire_cable_power(NULL, 0, 0); 1777 } 1778 1779 /* We make sure int. modem is off (in case driver lost it) */ 1780 if (macio->type == macio_keylargo) 1781 core99_modem_enable(macio->of_node, 0, 0); 1782 else 1783 pangea_modem_enable(macio->of_node, 0, 0); 1784 1785 /* We make sure the sound is off as well */ 1786 core99_sound_chip_enable(macio->of_node, 0, 0); 1787 1788 /* 1789 * Save various bits of KeyLargo 1790 */ 1791 1792 /* Save the state of the various GPIOs */ 1793 save_gpio_levels[0] = MACIO_IN32(KEYLARGO_GPIO_LEVELS0); 1794 save_gpio_levels[1] = MACIO_IN32(KEYLARGO_GPIO_LEVELS1); 1795 for (i=0; i<KEYLARGO_GPIO_EXTINT_CNT; i++) 1796 save_gpio_extint[i] = MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+i); 1797 for (i=0; i<KEYLARGO_GPIO_CNT; i++) 1798 save_gpio_normal[i] = MACIO_IN8(KEYLARGO_GPIO_0+i); 1799 1800 /* Save the FCRs */ 1801 if (macio->type == macio_keylargo) 1802 save_mbcr = MACIO_IN32(KEYLARGO_MBCR); 1803 save_fcr[0] = MACIO_IN32(KEYLARGO_FCR0); 1804 save_fcr[1] = MACIO_IN32(KEYLARGO_FCR1); 1805 save_fcr[2] = MACIO_IN32(KEYLARGO_FCR2); 1806 save_fcr[3] = MACIO_IN32(KEYLARGO_FCR3); 1807 save_fcr[4] = MACIO_IN32(KEYLARGO_FCR4); 1808 if (macio->type == macio_pangea || macio->type == macio_intrepid) 1809 save_fcr[5] = MACIO_IN32(KEYLARGO_FCR5); 1810 1811 /* Save state & config of DBDMA channels */ 1812 dbdma_save(macio, save_dbdma); 1813 1814 /* 1815 * Turn off as much as we can 1816 */ 1817 if (macio->type == macio_pangea) 1818 pangea_shutdown(macio, 1); 1819 else if (macio->type == macio_intrepid) 1820 intrepid_shutdown(macio, 1); 1821 else if (macio->type == macio_keylargo) 1822 keylargo_shutdown(macio, 1); 1823 1824 /* 1825 * Put the host bridge to sleep 1826 */ 1827 1828 save_unin_clock_ctl = UN_IN(UNI_N_CLOCK_CNTL); 1829 /* Note: do not switch GMAC off, driver does it when necessary, WOL must keep it 1830 * enabled ! 1831 */ 1832 UN_OUT(UNI_N_CLOCK_CNTL, save_unin_clock_ctl & 1833 ~(/*UNI_N_CLOCK_CNTL_GMAC|*/UNI_N_CLOCK_CNTL_FW/*|UNI_N_CLOCK_CNTL_PCI*/)); 1834 udelay(100); 1835 UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_SLEEPING); 1836 UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_SLEEP); 1837 mdelay(10); 1838 1839 /* 1840 * FIXME: A bit of black magic with OpenPIC (don't ask me why) 1841 */ 1842 if (pmac_mb.model_id == PMAC_TYPE_SAWTOOTH) { 1843 MACIO_BIS(0x506e0, 0x00400000); 1844 MACIO_BIS(0x506e0, 0x80000000); 1845 } 1846 return 0; 1847 } 1848 1849 static int 1850 core99_wake_up(void) 1851 { 1852 struct macio_chip *macio; 1853 int i; 1854 1855 macio = &macio_chips[0]; 1856 if (macio->type != macio_keylargo && macio->type != macio_pangea && 1857 macio->type != macio_intrepid) 1858 return -ENODEV; 1859 1860 /* 1861 * Wakeup the host bridge 1862 */ 1863 UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_NORMAL); 1864 udelay(10); 1865 UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_RUNNING); 1866 udelay(10); 1867 1868 /* 1869 * Restore KeyLargo 1870 */ 1871 1872 if (macio->type == macio_keylargo) { 1873 MACIO_OUT32(KEYLARGO_MBCR, save_mbcr); 1874 (void)MACIO_IN32(KEYLARGO_MBCR); udelay(10); 1875 } 1876 MACIO_OUT32(KEYLARGO_FCR0, save_fcr[0]); 1877 (void)MACIO_IN32(KEYLARGO_FCR0); udelay(10); 1878 MACIO_OUT32(KEYLARGO_FCR1, save_fcr[1]); 1879 (void)MACIO_IN32(KEYLARGO_FCR1); udelay(10); 1880 MACIO_OUT32(KEYLARGO_FCR2, save_fcr[2]); 1881 (void)MACIO_IN32(KEYLARGO_FCR2); udelay(10); 1882 MACIO_OUT32(KEYLARGO_FCR3, save_fcr[3]); 1883 (void)MACIO_IN32(KEYLARGO_FCR3); udelay(10); 1884 MACIO_OUT32(KEYLARGO_FCR4, save_fcr[4]); 1885 (void)MACIO_IN32(KEYLARGO_FCR4); udelay(10); 1886 if (macio->type == macio_pangea || macio->type == macio_intrepid) { 1887 MACIO_OUT32(KEYLARGO_FCR5, save_fcr[5]); 1888 (void)MACIO_IN32(KEYLARGO_FCR5); udelay(10); 1889 } 1890 1891 dbdma_restore(macio, save_dbdma); 1892 1893 MACIO_OUT32(KEYLARGO_GPIO_LEVELS0, save_gpio_levels[0]); 1894 MACIO_OUT32(KEYLARGO_GPIO_LEVELS1, save_gpio_levels[1]); 1895 for (i=0; i<KEYLARGO_GPIO_EXTINT_CNT; i++) 1896 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+i, save_gpio_extint[i]); 1897 for (i=0; i<KEYLARGO_GPIO_CNT; i++) 1898 MACIO_OUT8(KEYLARGO_GPIO_0+i, save_gpio_normal[i]); 1899 1900 /* FIXME more black magic with OpenPIC ... */ 1901 if (pmac_mb.model_id == PMAC_TYPE_SAWTOOTH) { 1902 MACIO_BIC(0x506e0, 0x00400000); 1903 MACIO_BIC(0x506e0, 0x80000000); 1904 } 1905 1906 UN_OUT(UNI_N_CLOCK_CNTL, save_unin_clock_ctl); 1907 udelay(100); 1908 1909 return 0; 1910 } 1911 1912 static long 1913 core99_sleep_state(struct device_node *node, long param, long value) 1914 { 1915 /* Param == 1 means to enter the "fake sleep" mode that is 1916 * used for CPU speed switch 1917 */ 1918 if (param == 1) { 1919 if (value == 1) { 1920 UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_SLEEPING); 1921 UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_IDLE2); 1922 } else { 1923 UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_NORMAL); 1924 udelay(10); 1925 UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_RUNNING); 1926 udelay(10); 1927 } 1928 return 0; 1929 } 1930 if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0) 1931 return -EPERM; 1932 1933 if (value == 1) 1934 return core99_sleep(); 1935 else if (value == 0) 1936 return core99_wake_up(); 1937 return 0; 1938 } 1939 1940 #endif /* CONFIG_POWER4 */ 1941 1942 static long 1943 generic_dev_can_wake(struct device_node *node, long param, long value) 1944 { 1945 /* Todo: eventually check we are really dealing with on-board 1946 * video device ... 1947 */ 1948 1949 if (pmac_mb.board_flags & PMAC_MB_MAY_SLEEP) 1950 pmac_mb.board_flags |= PMAC_MB_CAN_SLEEP; 1951 return 0; 1952 } 1953 1954 static long generic_get_mb_info(struct device_node *node, long param, long value) 1955 { 1956 switch(param) { 1957 case PMAC_MB_INFO_MODEL: 1958 return pmac_mb.model_id; 1959 case PMAC_MB_INFO_FLAGS: 1960 return pmac_mb.board_flags; 1961 case PMAC_MB_INFO_NAME: 1962 /* hack hack hack... but should work */ 1963 *((const char **)value) = pmac_mb.model_name; 1964 return 0; 1965 } 1966 return -EINVAL; 1967 } 1968 1969 1970 /* 1971 * Table definitions 1972 */ 1973 1974 /* Used on any machine 1975 */ 1976 static struct feature_table_entry any_features[] = { 1977 { PMAC_FTR_GET_MB_INFO, generic_get_mb_info }, 1978 { PMAC_FTR_DEVICE_CAN_WAKE, generic_dev_can_wake }, 1979 { 0, NULL } 1980 }; 1981 1982 #ifndef CONFIG_POWER4 1983 1984 /* OHare based motherboards. Currently, we only use these on the 1985 * 2400,3400 and 3500 series powerbooks. Some older desktops seem 1986 * to have issues with turning on/off those asic cells 1987 */ 1988 static struct feature_table_entry ohare_features[] = { 1989 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable }, 1990 { PMAC_FTR_SWIM3_ENABLE, ohare_floppy_enable }, 1991 { PMAC_FTR_MESH_ENABLE, ohare_mesh_enable }, 1992 { PMAC_FTR_IDE_ENABLE, ohare_ide_enable}, 1993 { PMAC_FTR_IDE_RESET, ohare_ide_reset}, 1994 { PMAC_FTR_SLEEP_STATE, ohare_sleep_state }, 1995 { 0, NULL } 1996 }; 1997 1998 /* Heathrow desktop machines (Beige G3). 1999 * Separated as some features couldn't be properly tested 2000 * and the serial port control bits appear to confuse it. 2001 */ 2002 static struct feature_table_entry heathrow_desktop_features[] = { 2003 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable }, 2004 { PMAC_FTR_MESH_ENABLE, heathrow_mesh_enable }, 2005 { PMAC_FTR_IDE_ENABLE, heathrow_ide_enable }, 2006 { PMAC_FTR_IDE_RESET, heathrow_ide_reset }, 2007 { PMAC_FTR_BMAC_ENABLE, heathrow_bmac_enable }, 2008 { 0, NULL } 2009 }; 2010 2011 /* Heathrow based laptop, that is the Wallstreet and mainstreet 2012 * powerbooks. 2013 */ 2014 static struct feature_table_entry heathrow_laptop_features[] = { 2015 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable }, 2016 { PMAC_FTR_MODEM_ENABLE, heathrow_modem_enable }, 2017 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable }, 2018 { PMAC_FTR_MESH_ENABLE, heathrow_mesh_enable }, 2019 { PMAC_FTR_IDE_ENABLE, heathrow_ide_enable }, 2020 { PMAC_FTR_IDE_RESET, heathrow_ide_reset }, 2021 { PMAC_FTR_BMAC_ENABLE, heathrow_bmac_enable }, 2022 { PMAC_FTR_SOUND_CHIP_ENABLE, heathrow_sound_enable }, 2023 { PMAC_FTR_SLEEP_STATE, heathrow_sleep_state }, 2024 { 0, NULL } 2025 }; 2026 2027 /* Paddington based machines 2028 * The lombard (101) powerbook, first iMac models, B&W G3 and Yikes G4. 2029 */ 2030 static struct feature_table_entry paddington_features[] = { 2031 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable }, 2032 { PMAC_FTR_MODEM_ENABLE, heathrow_modem_enable }, 2033 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable }, 2034 { PMAC_FTR_MESH_ENABLE, heathrow_mesh_enable }, 2035 { PMAC_FTR_IDE_ENABLE, heathrow_ide_enable }, 2036 { PMAC_FTR_IDE_RESET, heathrow_ide_reset }, 2037 { PMAC_FTR_BMAC_ENABLE, heathrow_bmac_enable }, 2038 { PMAC_FTR_SOUND_CHIP_ENABLE, heathrow_sound_enable }, 2039 { PMAC_FTR_SLEEP_STATE, heathrow_sleep_state }, 2040 { 0, NULL } 2041 }; 2042 2043 /* Core99 & MacRISC 2 machines (all machines released since the 2044 * iBook (included), that is all AGP machines, except pangea 2045 * chipset. The pangea chipset is the "combo" UniNorth/KeyLargo 2046 * used on iBook2 & iMac "flow power". 2047 */ 2048 static struct feature_table_entry core99_features[] = { 2049 { PMAC_FTR_SCC_ENABLE, core99_scc_enable }, 2050 { PMAC_FTR_MODEM_ENABLE, core99_modem_enable }, 2051 { PMAC_FTR_IDE_ENABLE, core99_ide_enable }, 2052 { PMAC_FTR_IDE_RESET, core99_ide_reset }, 2053 { PMAC_FTR_GMAC_ENABLE, core99_gmac_enable }, 2054 { PMAC_FTR_GMAC_PHY_RESET, core99_gmac_phy_reset }, 2055 { PMAC_FTR_SOUND_CHIP_ENABLE, core99_sound_chip_enable }, 2056 { PMAC_FTR_AIRPORT_ENABLE, core99_airport_enable }, 2057 { PMAC_FTR_USB_ENABLE, core99_usb_enable }, 2058 { PMAC_FTR_1394_ENABLE, core99_firewire_enable }, 2059 { PMAC_FTR_1394_CABLE_POWER, core99_firewire_cable_power }, 2060 { PMAC_FTR_SLEEP_STATE, core99_sleep_state }, 2061 #ifdef CONFIG_SMP 2062 { PMAC_FTR_RESET_CPU, core99_reset_cpu }, 2063 #endif /* CONFIG_SMP */ 2064 { PMAC_FTR_READ_GPIO, core99_read_gpio }, 2065 { PMAC_FTR_WRITE_GPIO, core99_write_gpio }, 2066 { 0, NULL } 2067 }; 2068 2069 /* RackMac 2070 */ 2071 static struct feature_table_entry rackmac_features[] = { 2072 { PMAC_FTR_SCC_ENABLE, core99_scc_enable }, 2073 { PMAC_FTR_IDE_ENABLE, core99_ide_enable }, 2074 { PMAC_FTR_IDE_RESET, core99_ide_reset }, 2075 { PMAC_FTR_GMAC_ENABLE, core99_gmac_enable }, 2076 { PMAC_FTR_GMAC_PHY_RESET, core99_gmac_phy_reset }, 2077 { PMAC_FTR_USB_ENABLE, core99_usb_enable }, 2078 { PMAC_FTR_1394_ENABLE, core99_firewire_enable }, 2079 { PMAC_FTR_1394_CABLE_POWER, core99_firewire_cable_power }, 2080 { PMAC_FTR_SLEEP_STATE, core99_sleep_state }, 2081 #ifdef CONFIG_SMP 2082 { PMAC_FTR_RESET_CPU, core99_reset_cpu }, 2083 #endif /* CONFIG_SMP */ 2084 { PMAC_FTR_READ_GPIO, core99_read_gpio }, 2085 { PMAC_FTR_WRITE_GPIO, core99_write_gpio }, 2086 { 0, NULL } 2087 }; 2088 2089 /* Pangea features 2090 */ 2091 static struct feature_table_entry pangea_features[] = { 2092 { PMAC_FTR_SCC_ENABLE, core99_scc_enable }, 2093 { PMAC_FTR_MODEM_ENABLE, pangea_modem_enable }, 2094 { PMAC_FTR_IDE_ENABLE, core99_ide_enable }, 2095 { PMAC_FTR_IDE_RESET, core99_ide_reset }, 2096 { PMAC_FTR_GMAC_ENABLE, core99_gmac_enable }, 2097 { PMAC_FTR_GMAC_PHY_RESET, core99_gmac_phy_reset }, 2098 { PMAC_FTR_SOUND_CHIP_ENABLE, core99_sound_chip_enable }, 2099 { PMAC_FTR_AIRPORT_ENABLE, core99_airport_enable }, 2100 { PMAC_FTR_USB_ENABLE, core99_usb_enable }, 2101 { PMAC_FTR_1394_ENABLE, core99_firewire_enable }, 2102 { PMAC_FTR_1394_CABLE_POWER, core99_firewire_cable_power }, 2103 { PMAC_FTR_SLEEP_STATE, core99_sleep_state }, 2104 { PMAC_FTR_READ_GPIO, core99_read_gpio }, 2105 { PMAC_FTR_WRITE_GPIO, core99_write_gpio }, 2106 { 0, NULL } 2107 }; 2108 2109 /* Intrepid features 2110 */ 2111 static struct feature_table_entry intrepid_features[] = { 2112 { PMAC_FTR_SCC_ENABLE, core99_scc_enable }, 2113 { PMAC_FTR_MODEM_ENABLE, pangea_modem_enable }, 2114 { PMAC_FTR_IDE_ENABLE, core99_ide_enable }, 2115 { PMAC_FTR_IDE_RESET, core99_ide_reset }, 2116 { PMAC_FTR_GMAC_ENABLE, core99_gmac_enable }, 2117 { PMAC_FTR_GMAC_PHY_RESET, core99_gmac_phy_reset }, 2118 { PMAC_FTR_SOUND_CHIP_ENABLE, core99_sound_chip_enable }, 2119 { PMAC_FTR_AIRPORT_ENABLE, core99_airport_enable }, 2120 { PMAC_FTR_USB_ENABLE, core99_usb_enable }, 2121 { PMAC_FTR_1394_ENABLE, core99_firewire_enable }, 2122 { PMAC_FTR_1394_CABLE_POWER, core99_firewire_cable_power }, 2123 { PMAC_FTR_SLEEP_STATE, core99_sleep_state }, 2124 { PMAC_FTR_READ_GPIO, core99_read_gpio }, 2125 { PMAC_FTR_WRITE_GPIO, core99_write_gpio }, 2126 { PMAC_FTR_AACK_DELAY_ENABLE, intrepid_aack_delay_enable }, 2127 { 0, NULL } 2128 }; 2129 2130 #else /* CONFIG_POWER4 */ 2131 2132 /* G5 features 2133 */ 2134 static struct feature_table_entry g5_features[] = { 2135 { PMAC_FTR_GMAC_ENABLE, g5_gmac_enable }, 2136 { PMAC_FTR_1394_ENABLE, g5_fw_enable }, 2137 { PMAC_FTR_ENABLE_MPIC, g5_mpic_enable }, 2138 { PMAC_FTR_GMAC_PHY_RESET, g5_eth_phy_reset }, 2139 { PMAC_FTR_SOUND_CHIP_ENABLE, g5_i2s_enable }, 2140 #ifdef CONFIG_SMP 2141 { PMAC_FTR_RESET_CPU, g5_reset_cpu }, 2142 #endif /* CONFIG_SMP */ 2143 { PMAC_FTR_READ_GPIO, core99_read_gpio }, 2144 { PMAC_FTR_WRITE_GPIO, core99_write_gpio }, 2145 { 0, NULL } 2146 }; 2147 2148 #endif /* CONFIG_POWER4 */ 2149 2150 static struct pmac_mb_def pmac_mb_defs[] = { 2151 #ifndef CONFIG_POWER4 2152 /* 2153 * Desktops 2154 */ 2155 2156 { "AAPL,8500", "PowerMac 8500/8600", 2157 PMAC_TYPE_PSURGE, NULL, 2158 0 2159 }, 2160 { "AAPL,9500", "PowerMac 9500/9600", 2161 PMAC_TYPE_PSURGE, NULL, 2162 0 2163 }, 2164 { "AAPL,7200", "PowerMac 7200", 2165 PMAC_TYPE_PSURGE, NULL, 2166 0 2167 }, 2168 { "AAPL,7300", "PowerMac 7200/7300", 2169 PMAC_TYPE_PSURGE, NULL, 2170 0 2171 }, 2172 { "AAPL,7500", "PowerMac 7500", 2173 PMAC_TYPE_PSURGE, NULL, 2174 0 2175 }, 2176 { "AAPL,ShinerESB", "Apple Network Server", 2177 PMAC_TYPE_ANS, NULL, 2178 0 2179 }, 2180 { "AAPL,e407", "Alchemy", 2181 PMAC_TYPE_ALCHEMY, NULL, 2182 0 2183 }, 2184 { "AAPL,e411", "Gazelle", 2185 PMAC_TYPE_GAZELLE, NULL, 2186 0 2187 }, 2188 { "AAPL,Gossamer", "PowerMac G3 (Gossamer)", 2189 PMAC_TYPE_GOSSAMER, heathrow_desktop_features, 2190 0 2191 }, 2192 { "AAPL,PowerMac G3", "PowerMac G3 (Silk)", 2193 PMAC_TYPE_SILK, heathrow_desktop_features, 2194 0 2195 }, 2196 { "PowerMac1,1", "Blue&White G3", 2197 PMAC_TYPE_YOSEMITE, paddington_features, 2198 0 2199 }, 2200 { "PowerMac1,2", "PowerMac G4 PCI Graphics", 2201 PMAC_TYPE_YIKES, paddington_features, 2202 0 2203 }, 2204 { "PowerMac2,1", "iMac FireWire", 2205 PMAC_TYPE_FW_IMAC, core99_features, 2206 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99 2207 }, 2208 { "PowerMac2,2", "iMac FireWire", 2209 PMAC_TYPE_FW_IMAC, core99_features, 2210 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99 2211 }, 2212 { "PowerMac3,1", "PowerMac G4 AGP Graphics", 2213 PMAC_TYPE_SAWTOOTH, core99_features, 2214 PMAC_MB_OLD_CORE99 2215 }, 2216 { "PowerMac3,2", "PowerMac G4 AGP Graphics", 2217 PMAC_TYPE_SAWTOOTH, core99_features, 2218 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99 2219 }, 2220 { "PowerMac3,3", "PowerMac G4 AGP Graphics", 2221 PMAC_TYPE_SAWTOOTH, core99_features, 2222 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99 2223 }, 2224 { "PowerMac3,4", "PowerMac G4 Silver", 2225 PMAC_TYPE_QUICKSILVER, core99_features, 2226 PMAC_MB_MAY_SLEEP 2227 }, 2228 { "PowerMac3,5", "PowerMac G4 Silver", 2229 PMAC_TYPE_QUICKSILVER, core99_features, 2230 PMAC_MB_MAY_SLEEP 2231 }, 2232 { "PowerMac3,6", "PowerMac G4 Windtunnel", 2233 PMAC_TYPE_WINDTUNNEL, core99_features, 2234 PMAC_MB_MAY_SLEEP, 2235 }, 2236 { "PowerMac4,1", "iMac \"Flower Power\"", 2237 PMAC_TYPE_PANGEA_IMAC, pangea_features, 2238 PMAC_MB_MAY_SLEEP 2239 }, 2240 { "PowerMac4,2", "Flat panel iMac", 2241 PMAC_TYPE_FLAT_PANEL_IMAC, pangea_features, 2242 PMAC_MB_CAN_SLEEP 2243 }, 2244 { "PowerMac4,4", "eMac", 2245 PMAC_TYPE_EMAC, core99_features, 2246 PMAC_MB_MAY_SLEEP 2247 }, 2248 { "PowerMac5,1", "PowerMac G4 Cube", 2249 PMAC_TYPE_CUBE, core99_features, 2250 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99 2251 }, 2252 { "PowerMac6,1", "Flat panel iMac", 2253 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2254 PMAC_MB_MAY_SLEEP, 2255 }, 2256 { "PowerMac6,3", "Flat panel iMac", 2257 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2258 PMAC_MB_MAY_SLEEP, 2259 }, 2260 { "PowerMac6,4", "eMac", 2261 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2262 PMAC_MB_MAY_SLEEP, 2263 }, 2264 { "PowerMac10,1", "Mac mini", 2265 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2266 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER, 2267 }, 2268 { "iMac,1", "iMac (first generation)", 2269 PMAC_TYPE_ORIG_IMAC, paddington_features, 2270 0 2271 }, 2272 2273 /* 2274 * Xserve's 2275 */ 2276 2277 { "RackMac1,1", "XServe", 2278 PMAC_TYPE_RACKMAC, rackmac_features, 2279 0, 2280 }, 2281 { "RackMac1,2", "XServe rev. 2", 2282 PMAC_TYPE_RACKMAC, rackmac_features, 2283 0, 2284 }, 2285 2286 /* 2287 * Laptops 2288 */ 2289 2290 { "AAPL,3400/2400", "PowerBook 3400", 2291 PMAC_TYPE_HOOPER, ohare_features, 2292 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE 2293 }, 2294 { "AAPL,3500", "PowerBook 3500", 2295 PMAC_TYPE_KANGA, ohare_features, 2296 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE 2297 }, 2298 { "AAPL,PowerBook1998", "PowerBook Wallstreet", 2299 PMAC_TYPE_WALLSTREET, heathrow_laptop_features, 2300 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE 2301 }, 2302 { "PowerBook1,1", "PowerBook 101 (Lombard)", 2303 PMAC_TYPE_101_PBOOK, paddington_features, 2304 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE 2305 }, 2306 { "PowerBook2,1", "iBook (first generation)", 2307 PMAC_TYPE_ORIG_IBOOK, core99_features, 2308 PMAC_MB_CAN_SLEEP | PMAC_MB_OLD_CORE99 | PMAC_MB_MOBILE 2309 }, 2310 { "PowerBook2,2", "iBook FireWire", 2311 PMAC_TYPE_FW_IBOOK, core99_features, 2312 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | 2313 PMAC_MB_OLD_CORE99 | PMAC_MB_MOBILE 2314 }, 2315 { "PowerBook3,1", "PowerBook Pismo", 2316 PMAC_TYPE_PISMO, core99_features, 2317 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | 2318 PMAC_MB_OLD_CORE99 | PMAC_MB_MOBILE 2319 }, 2320 { "PowerBook3,2", "PowerBook Titanium", 2321 PMAC_TYPE_TITANIUM, core99_features, 2322 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE 2323 }, 2324 { "PowerBook3,3", "PowerBook Titanium II", 2325 PMAC_TYPE_TITANIUM2, core99_features, 2326 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE 2327 }, 2328 { "PowerBook3,4", "PowerBook Titanium III", 2329 PMAC_TYPE_TITANIUM3, core99_features, 2330 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE 2331 }, 2332 { "PowerBook3,5", "PowerBook Titanium IV", 2333 PMAC_TYPE_TITANIUM4, core99_features, 2334 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE 2335 }, 2336 { "PowerBook4,1", "iBook 2", 2337 PMAC_TYPE_IBOOK2, pangea_features, 2338 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE 2339 }, 2340 { "PowerBook4,2", "iBook 2", 2341 PMAC_TYPE_IBOOK2, pangea_features, 2342 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE 2343 }, 2344 { "PowerBook4,3", "iBook 2 rev. 2", 2345 PMAC_TYPE_IBOOK2, pangea_features, 2346 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE 2347 }, 2348 { "PowerBook5,1", "PowerBook G4 17\"", 2349 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2350 PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, 2351 }, 2352 { "PowerBook5,2", "PowerBook G4 15\"", 2353 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2354 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, 2355 }, 2356 { "PowerBook5,3", "PowerBook G4 17\"", 2357 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2358 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, 2359 }, 2360 { "PowerBook5,4", "PowerBook G4 15\"", 2361 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2362 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, 2363 }, 2364 { "PowerBook5,5", "PowerBook G4 17\"", 2365 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2366 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, 2367 }, 2368 { "PowerBook5,6", "PowerBook G4 15\"", 2369 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2370 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, 2371 }, 2372 { "PowerBook5,7", "PowerBook G4 17\"", 2373 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2374 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, 2375 }, 2376 { "PowerBook5,8", "PowerBook G4 15\"", 2377 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2378 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, 2379 }, 2380 { "PowerBook5,9", "PowerBook G4 17\"", 2381 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2382 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, 2383 }, 2384 { "PowerBook6,1", "PowerBook G4 12\"", 2385 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2386 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, 2387 }, 2388 { "PowerBook6,2", "PowerBook G4", 2389 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2390 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, 2391 }, 2392 { "PowerBook6,3", "iBook G4", 2393 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2394 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, 2395 }, 2396 { "PowerBook6,4", "PowerBook G4 12\"", 2397 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2398 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, 2399 }, 2400 { "PowerBook6,5", "iBook G4", 2401 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2402 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, 2403 }, 2404 { "PowerBook6,7", "iBook G4", 2405 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2406 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, 2407 }, 2408 { "PowerBook6,8", "PowerBook G4 12\"", 2409 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2410 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, 2411 }, 2412 #else /* CONFIG_POWER4 */ 2413 { "PowerMac7,2", "PowerMac G5", 2414 PMAC_TYPE_POWERMAC_G5, g5_features, 2415 0, 2416 }, 2417 #ifdef CONFIG_PPC64 2418 { "PowerMac7,3", "PowerMac G5", 2419 PMAC_TYPE_POWERMAC_G5, g5_features, 2420 0, 2421 }, 2422 { "PowerMac8,1", "iMac G5", 2423 PMAC_TYPE_IMAC_G5, g5_features, 2424 0, 2425 }, 2426 { "PowerMac9,1", "PowerMac G5", 2427 PMAC_TYPE_POWERMAC_G5_U3L, g5_features, 2428 0, 2429 }, 2430 { "RackMac3,1", "XServe G5", 2431 PMAC_TYPE_XSERVE_G5, g5_features, 2432 0, 2433 }, 2434 #endif /* CONFIG_PPC64 */ 2435 #endif /* CONFIG_POWER4 */ 2436 }; 2437 2438 /* 2439 * The toplevel feature_call callback 2440 */ 2441 long pmac_do_feature_call(unsigned int selector, ...) 2442 { 2443 struct device_node *node; 2444 long param, value; 2445 int i; 2446 feature_call func = NULL; 2447 va_list args; 2448 2449 if (pmac_mb.features) 2450 for (i=0; pmac_mb.features[i].function; i++) 2451 if (pmac_mb.features[i].selector == selector) { 2452 func = pmac_mb.features[i].function; 2453 break; 2454 } 2455 if (!func) 2456 for (i=0; any_features[i].function; i++) 2457 if (any_features[i].selector == selector) { 2458 func = any_features[i].function; 2459 break; 2460 } 2461 if (!func) 2462 return -ENODEV; 2463 2464 va_start(args, selector); 2465 node = (struct device_node*)va_arg(args, void*); 2466 param = va_arg(args, long); 2467 value = va_arg(args, long); 2468 va_end(args); 2469 2470 return func(node, param, value); 2471 } 2472 2473 static int __init probe_motherboard(void) 2474 { 2475 int i; 2476 struct macio_chip *macio = &macio_chips[0]; 2477 const char *model = NULL; 2478 struct device_node *dt; 2479 2480 /* Lookup known motherboard type in device-tree. First try an 2481 * exact match on the "model" property, then try a "compatible" 2482 * match is none is found. 2483 */ 2484 dt = find_devices("device-tree"); 2485 if (dt != NULL) 2486 model = (const char *) get_property(dt, "model", NULL); 2487 for(i=0; model && i<(sizeof(pmac_mb_defs)/sizeof(struct pmac_mb_def)); i++) { 2488 if (strcmp(model, pmac_mb_defs[i].model_string) == 0) { 2489 pmac_mb = pmac_mb_defs[i]; 2490 goto found; 2491 } 2492 } 2493 for(i=0; i<(sizeof(pmac_mb_defs)/sizeof(struct pmac_mb_def)); i++) { 2494 if (machine_is_compatible(pmac_mb_defs[i].model_string)) { 2495 pmac_mb = pmac_mb_defs[i]; 2496 goto found; 2497 } 2498 } 2499 2500 /* Fallback to selection depending on mac-io chip type */ 2501 switch(macio->type) { 2502 #ifndef CONFIG_POWER4 2503 case macio_grand_central: 2504 pmac_mb.model_id = PMAC_TYPE_PSURGE; 2505 pmac_mb.model_name = "Unknown PowerSurge"; 2506 break; 2507 case macio_ohare: 2508 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_OHARE; 2509 pmac_mb.model_name = "Unknown OHare-based"; 2510 break; 2511 case macio_heathrow: 2512 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_HEATHROW; 2513 pmac_mb.model_name = "Unknown Heathrow-based"; 2514 pmac_mb.features = heathrow_desktop_features; 2515 break; 2516 case macio_paddington: 2517 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_PADDINGTON; 2518 pmac_mb.model_name = "Unknown Paddington-based"; 2519 pmac_mb.features = paddington_features; 2520 break; 2521 case macio_keylargo: 2522 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_CORE99; 2523 pmac_mb.model_name = "Unknown Keylargo-based"; 2524 pmac_mb.features = core99_features; 2525 break; 2526 case macio_pangea: 2527 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_PANGEA; 2528 pmac_mb.model_name = "Unknown Pangea-based"; 2529 pmac_mb.features = pangea_features; 2530 break; 2531 case macio_intrepid: 2532 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_INTREPID; 2533 pmac_mb.model_name = "Unknown Intrepid-based"; 2534 pmac_mb.features = intrepid_features; 2535 break; 2536 #else /* CONFIG_POWER4 */ 2537 case macio_keylargo2: 2538 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_K2; 2539 pmac_mb.model_name = "Unknown K2-based"; 2540 pmac_mb.features = g5_features; 2541 break; 2542 #endif /* CONFIG_POWER4 */ 2543 default: 2544 return -ENODEV; 2545 } 2546 found: 2547 #ifndef CONFIG_POWER4 2548 /* Fixup Hooper vs. Comet */ 2549 if (pmac_mb.model_id == PMAC_TYPE_HOOPER) { 2550 u32 __iomem * mach_id_ptr = ioremap(0xf3000034, 4); 2551 if (!mach_id_ptr) 2552 return -ENODEV; 2553 /* Here, I used to disable the media-bay on comet. It 2554 * appears this is wrong, the floppy connector is actually 2555 * a kind of media-bay and works with the current driver. 2556 */ 2557 if (__raw_readl(mach_id_ptr) & 0x20000000UL) 2558 pmac_mb.model_id = PMAC_TYPE_COMET; 2559 iounmap(mach_id_ptr); 2560 } 2561 #endif /* CONFIG_POWER4 */ 2562 2563 #ifdef CONFIG_6xx 2564 /* Set default value of powersave_nap on machines that support it. 2565 * It appears that uninorth rev 3 has a problem with it, we don't 2566 * enable it on those. In theory, the flush-on-lock property is 2567 * supposed to be set when not supported, but I'm not very confident 2568 * that all Apple OF revs did it properly, I do it the paranoid way. 2569 */ 2570 while (uninorth_base && uninorth_rev > 3) { 2571 struct device_node *np = find_path_device("/cpus"); 2572 if (!np || !np->child) { 2573 printk(KERN_WARNING "Can't find CPU(s) in device tree !\n"); 2574 break; 2575 } 2576 np = np->child; 2577 /* Nap mode not supported on SMP */ 2578 if (np->sibling) 2579 break; 2580 /* Nap mode not supported if flush-on-lock property is present */ 2581 if (get_property(np, "flush-on-lock", NULL)) 2582 break; 2583 powersave_nap = 1; 2584 printk(KERN_INFO "Processor NAP mode on idle enabled.\n"); 2585 break; 2586 } 2587 2588 /* On CPUs that support it (750FX), lowspeed by default during 2589 * NAP mode 2590 */ 2591 powersave_lowspeed = 1; 2592 #endif /* CONFIG_6xx */ 2593 #ifdef CONFIG_POWER4 2594 powersave_nap = 1; 2595 #endif 2596 /* Check for "mobile" machine */ 2597 if (model && (strncmp(model, "PowerBook", 9) == 0 2598 || strncmp(model, "iBook", 5) == 0)) 2599 pmac_mb.board_flags |= PMAC_MB_MOBILE; 2600 2601 2602 printk(KERN_INFO "PowerMac motherboard: %s\n", pmac_mb.model_name); 2603 return 0; 2604 } 2605 2606 /* Initialize the Core99 UniNorth host bridge and memory controller 2607 */ 2608 static void __init probe_uninorth(void) 2609 { 2610 unsigned long actrl; 2611 2612 /* Locate core99 Uni-N */ 2613 uninorth_node = of_find_node_by_name(NULL, "uni-n"); 2614 /* Locate G5 u3 */ 2615 if (uninorth_node == NULL) { 2616 uninorth_node = of_find_node_by_name(NULL, "u3"); 2617 uninorth_u3 = 1; 2618 } 2619 if (uninorth_node && uninorth_node->n_addrs > 0) { 2620 unsigned long address = uninorth_node->addrs[0].address; 2621 uninorth_base = ioremap(address, 0x40000); 2622 uninorth_rev = in_be32(UN_REG(UNI_N_VERSION)); 2623 if (uninorth_u3) 2624 u3_ht = ioremap(address + U3_HT_CONFIG_BASE, 0x1000); 2625 } else 2626 uninorth_node = NULL; 2627 2628 if (!uninorth_node) 2629 return; 2630 2631 printk(KERN_INFO "Found %s memory controller & host bridge, revision: %d\n", 2632 uninorth_u3 ? "U3" : "UniNorth", uninorth_rev); 2633 printk(KERN_INFO "Mapped at 0x%08lx\n", (unsigned long)uninorth_base); 2634 2635 /* Set the arbitrer QAck delay according to what Apple does 2636 */ 2637 if (uninorth_rev < 0x11) { 2638 actrl = UN_IN(UNI_N_ARB_CTRL) & ~UNI_N_ARB_CTRL_QACK_DELAY_MASK; 2639 actrl |= ((uninorth_rev < 3) ? UNI_N_ARB_CTRL_QACK_DELAY105 : 2640 UNI_N_ARB_CTRL_QACK_DELAY) << UNI_N_ARB_CTRL_QACK_DELAY_SHIFT; 2641 UN_OUT(UNI_N_ARB_CTRL, actrl); 2642 } 2643 2644 /* Some more magic as done by them in recent MacOS X on UniNorth 2645 * revs 1.5 to 2.O and Pangea. Seem to toggle the UniN Maxbus/PCI 2646 * memory timeout 2647 */ 2648 if ((uninorth_rev >= 0x11 && uninorth_rev <= 0x24) || uninorth_rev == 0xc0) 2649 UN_OUT(0x2160, UN_IN(0x2160) & 0x00ffffff); 2650 } 2651 2652 static void __init probe_one_macio(const char *name, const char *compat, int type) 2653 { 2654 struct device_node* node; 2655 int i; 2656 volatile u32 __iomem * base; 2657 u32* revp; 2658 2659 node = find_devices(name); 2660 if (!node || !node->n_addrs) 2661 return; 2662 if (compat) 2663 do { 2664 if (device_is_compatible(node, compat)) 2665 break; 2666 node = node->next; 2667 } while (node); 2668 if (!node) 2669 return; 2670 for(i=0; i<MAX_MACIO_CHIPS; i++) { 2671 if (!macio_chips[i].of_node) 2672 break; 2673 if (macio_chips[i].of_node == node) 2674 return; 2675 } 2676 if (i >= MAX_MACIO_CHIPS) { 2677 printk(KERN_ERR "pmac_feature: Please increase MAX_MACIO_CHIPS !\n"); 2678 printk(KERN_ERR "pmac_feature: %s skipped\n", node->full_name); 2679 return; 2680 } 2681 base = ioremap(node->addrs[0].address, node->addrs[0].size); 2682 if (!base) { 2683 printk(KERN_ERR "pmac_feature: Can't map mac-io chip !\n"); 2684 return; 2685 } 2686 if (type == macio_keylargo) { 2687 u32 *did = (u32 *)get_property(node, "device-id", NULL); 2688 if (*did == 0x00000025) 2689 type = macio_pangea; 2690 if (*did == 0x0000003e) 2691 type = macio_intrepid; 2692 } 2693 macio_chips[i].of_node = node; 2694 macio_chips[i].type = type; 2695 macio_chips[i].base = base; 2696 macio_chips[i].flags = MACIO_FLAG_SCCB_ON | MACIO_FLAG_SCCB_ON; 2697 macio_chips[i].name = macio_names[type]; 2698 revp = (u32 *)get_property(node, "revision-id", NULL); 2699 if (revp) 2700 macio_chips[i].rev = *revp; 2701 printk(KERN_INFO "Found a %s mac-io controller, rev: %d, mapped at 0x%p\n", 2702 macio_names[type], macio_chips[i].rev, macio_chips[i].base); 2703 } 2704 2705 static int __init 2706 probe_macios(void) 2707 { 2708 /* Warning, ordering is important */ 2709 probe_one_macio("gc", NULL, macio_grand_central); 2710 probe_one_macio("ohare", NULL, macio_ohare); 2711 probe_one_macio("pci106b,7", NULL, macio_ohareII); 2712 probe_one_macio("mac-io", "keylargo", macio_keylargo); 2713 probe_one_macio("mac-io", "paddington", macio_paddington); 2714 probe_one_macio("mac-io", "gatwick", macio_gatwick); 2715 probe_one_macio("mac-io", "heathrow", macio_heathrow); 2716 probe_one_macio("mac-io", "K2-Keylargo", macio_keylargo2); 2717 2718 /* Make sure the "main" macio chip appear first */ 2719 if (macio_chips[0].type == macio_gatwick 2720 && macio_chips[1].type == macio_heathrow) { 2721 struct macio_chip temp = macio_chips[0]; 2722 macio_chips[0] = macio_chips[1]; 2723 macio_chips[1] = temp; 2724 } 2725 if (macio_chips[0].type == macio_ohareII 2726 && macio_chips[1].type == macio_ohare) { 2727 struct macio_chip temp = macio_chips[0]; 2728 macio_chips[0] = macio_chips[1]; 2729 macio_chips[1] = temp; 2730 } 2731 macio_chips[0].lbus.index = 0; 2732 macio_chips[1].lbus.index = 1; 2733 2734 return (macio_chips[0].of_node == NULL) ? -ENODEV : 0; 2735 } 2736 2737 static void __init 2738 initial_serial_shutdown(struct device_node *np) 2739 { 2740 int len; 2741 struct slot_names_prop { 2742 int count; 2743 char name[1]; 2744 } *slots; 2745 char *conn; 2746 int port_type = PMAC_SCC_ASYNC; 2747 int modem = 0; 2748 2749 slots = (struct slot_names_prop *)get_property(np, "slot-names", &len); 2750 conn = get_property(np, "AAPL,connector", &len); 2751 if (conn && (strcmp(conn, "infrared") == 0)) 2752 port_type = PMAC_SCC_IRDA; 2753 else if (device_is_compatible(np, "cobalt")) 2754 modem = 1; 2755 else if (slots && slots->count > 0) { 2756 if (strcmp(slots->name, "IrDA") == 0) 2757 port_type = PMAC_SCC_IRDA; 2758 else if (strcmp(slots->name, "Modem") == 0) 2759 modem = 1; 2760 } 2761 if (modem) 2762 pmac_call_feature(PMAC_FTR_MODEM_ENABLE, np, 0, 0); 2763 pmac_call_feature(PMAC_FTR_SCC_ENABLE, np, port_type, 0); 2764 } 2765 2766 static void __init 2767 set_initial_features(void) 2768 { 2769 struct device_node *np; 2770 2771 /* That hack appears to be necessary for some StarMax motherboards 2772 * but I'm not too sure it was audited for side-effects on other 2773 * ohare based machines... 2774 * Since I still have difficulties figuring the right way to 2775 * differenciate them all and since that hack was there for a long 2776 * time, I'll keep it around 2777 */ 2778 if (macio_chips[0].type == macio_ohare && !find_devices("via-pmu")) { 2779 struct macio_chip *macio = &macio_chips[0]; 2780 MACIO_OUT32(OHARE_FCR, STARMAX_FEATURES); 2781 } else if (macio_chips[0].type == macio_ohare) { 2782 struct macio_chip *macio = &macio_chips[0]; 2783 MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE); 2784 } else if (macio_chips[1].type == macio_ohare) { 2785 struct macio_chip *macio = &macio_chips[1]; 2786 MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE); 2787 } 2788 2789 #ifdef CONFIG_POWER4 2790 if (macio_chips[0].type == macio_keylargo2) { 2791 #ifndef CONFIG_SMP 2792 /* On SMP machines running UP, we have the second CPU eating 2793 * bus cycles. We need to take it off the bus. This is done 2794 * from pmac_smp for SMP kernels running on one CPU 2795 */ 2796 np = of_find_node_by_type(NULL, "cpu"); 2797 if (np != NULL) 2798 np = of_find_node_by_type(np, "cpu"); 2799 if (np != NULL) { 2800 g5_phy_disable_cpu1(); 2801 of_node_put(np); 2802 } 2803 #endif /* CONFIG_SMP */ 2804 /* Enable GMAC for now for PCI probing. It will be disabled 2805 * later on after PCI probe 2806 */ 2807 np = of_find_node_by_name(NULL, "ethernet"); 2808 while(np) { 2809 if (device_is_compatible(np, "K2-GMAC")) 2810 g5_gmac_enable(np, 0, 1); 2811 np = of_find_node_by_name(np, "ethernet"); 2812 } 2813 2814 /* Enable FW before PCI probe. Will be disabled later on 2815 * Note: We should have a batter way to check that we are 2816 * dealing with uninorth internal cell and not a PCI cell 2817 * on the external PCI. The code below works though. 2818 */ 2819 np = of_find_node_by_name(NULL, "firewire"); 2820 while(np) { 2821 if (device_is_compatible(np, "pci106b,5811")) { 2822 macio_chips[0].flags |= MACIO_FLAG_FW_SUPPORTED; 2823 g5_fw_enable(np, 0, 1); 2824 } 2825 np = of_find_node_by_name(np, "firewire"); 2826 } 2827 } 2828 #else /* CONFIG_POWER4 */ 2829 2830 if (macio_chips[0].type == macio_keylargo || 2831 macio_chips[0].type == macio_pangea || 2832 macio_chips[0].type == macio_intrepid) { 2833 /* Enable GMAC for now for PCI probing. It will be disabled 2834 * later on after PCI probe 2835 */ 2836 np = of_find_node_by_name(NULL, "ethernet"); 2837 while(np) { 2838 if (np->parent 2839 && device_is_compatible(np->parent, "uni-north") 2840 && device_is_compatible(np, "gmac")) 2841 core99_gmac_enable(np, 0, 1); 2842 np = of_find_node_by_name(np, "ethernet"); 2843 } 2844 2845 /* Enable FW before PCI probe. Will be disabled later on 2846 * Note: We should have a batter way to check that we are 2847 * dealing with uninorth internal cell and not a PCI cell 2848 * on the external PCI. The code below works though. 2849 */ 2850 np = of_find_node_by_name(NULL, "firewire"); 2851 while(np) { 2852 if (np->parent 2853 && device_is_compatible(np->parent, "uni-north") 2854 && (device_is_compatible(np, "pci106b,18") || 2855 device_is_compatible(np, "pci106b,30") || 2856 device_is_compatible(np, "pci11c1,5811"))) { 2857 macio_chips[0].flags |= MACIO_FLAG_FW_SUPPORTED; 2858 core99_firewire_enable(np, 0, 1); 2859 } 2860 np = of_find_node_by_name(np, "firewire"); 2861 } 2862 2863 /* Enable ATA-100 before PCI probe. */ 2864 np = of_find_node_by_name(NULL, "ata-6"); 2865 while(np) { 2866 if (np->parent 2867 && device_is_compatible(np->parent, "uni-north") 2868 && device_is_compatible(np, "kauai-ata")) { 2869 core99_ata100_enable(np, 1); 2870 } 2871 np = of_find_node_by_name(np, "ata-6"); 2872 } 2873 2874 /* Switch airport off */ 2875 np = find_devices("radio"); 2876 while(np) { 2877 if (np && np->parent == macio_chips[0].of_node) { 2878 macio_chips[0].flags |= MACIO_FLAG_AIRPORT_ON; 2879 core99_airport_enable(np, 0, 0); 2880 } 2881 np = np->next; 2882 } 2883 } 2884 2885 /* On all machines that support sound PM, switch sound off */ 2886 if (macio_chips[0].of_node) 2887 pmac_do_feature_call(PMAC_FTR_SOUND_CHIP_ENABLE, 2888 macio_chips[0].of_node, 0, 0); 2889 2890 /* While on some desktop G3s, we turn it back on */ 2891 if (macio_chips[0].of_node && macio_chips[0].type == macio_heathrow 2892 && (pmac_mb.model_id == PMAC_TYPE_GOSSAMER || 2893 pmac_mb.model_id == PMAC_TYPE_SILK)) { 2894 struct macio_chip *macio = &macio_chips[0]; 2895 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE); 2896 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_POWER_N); 2897 } 2898 2899 /* Some machine models need the clock chip to be properly setup for 2900 * clock spreading now. This should be a platform function but we 2901 * don't do these at the moment 2902 */ 2903 pmac_tweak_clock_spreading(1); 2904 2905 #endif /* CONFIG_POWER4 */ 2906 2907 /* On all machines, switch modem & serial ports off */ 2908 np = find_devices("ch-a"); 2909 while(np) { 2910 initial_serial_shutdown(np); 2911 np = np->next; 2912 } 2913 np = find_devices("ch-b"); 2914 while(np) { 2915 initial_serial_shutdown(np); 2916 np = np->next; 2917 } 2918 } 2919 2920 void __init 2921 pmac_feature_init(void) 2922 { 2923 /* Detect the UniNorth memory controller */ 2924 probe_uninorth(); 2925 2926 /* Probe mac-io controllers */ 2927 if (probe_macios()) { 2928 printk(KERN_WARNING "No mac-io chip found\n"); 2929 return; 2930 } 2931 2932 /* Setup low-level i2c stuffs */ 2933 pmac_init_low_i2c(); 2934 2935 /* Probe machine type */ 2936 if (probe_motherboard()) 2937 printk(KERN_WARNING "Unknown PowerMac !\n"); 2938 2939 /* Set some initial features (turn off some chips that will 2940 * be later turned on) 2941 */ 2942 set_initial_features(); 2943 } 2944 2945 int __init pmac_feature_late_init(void) 2946 { 2947 #if 0 2948 struct device_node *np; 2949 2950 /* Request some resources late */ 2951 if (uninorth_node) 2952 request_OF_resource(uninorth_node, 0, NULL); 2953 np = find_devices("hammerhead"); 2954 if (np) 2955 request_OF_resource(np, 0, NULL); 2956 np = find_devices("interrupt-controller"); 2957 if (np) 2958 request_OF_resource(np, 0, NULL); 2959 #endif 2960 return 0; 2961 } 2962 2963 device_initcall(pmac_feature_late_init); 2964 2965 #if 0 2966 static void dump_HT_speeds(char *name, u32 cfg, u32 frq) 2967 { 2968 int freqs[16] = { 200,300,400,500,600,800,1000,0,0,0,0,0,0,0,0,0 }; 2969 int bits[8] = { 8,16,0,32,2,4,0,0 }; 2970 int freq = (frq >> 8) & 0xf; 2971 2972 if (freqs[freq] == 0) 2973 printk("%s: Unknown HT link frequency %x\n", name, freq); 2974 else 2975 printk("%s: %d MHz on main link, (%d in / %d out) bits width\n", 2976 name, freqs[freq], 2977 bits[(cfg >> 28) & 0x7], bits[(cfg >> 24) & 0x7]); 2978 } 2979 2980 void __init pmac_check_ht_link(void) 2981 { 2982 u32 ufreq, freq, ucfg, cfg; 2983 struct device_node *pcix_node; 2984 u8 px_bus, px_devfn; 2985 struct pci_controller *px_hose; 2986 2987 (void)in_be32(u3_ht + U3_HT_LINK_COMMAND); 2988 ucfg = cfg = in_be32(u3_ht + U3_HT_LINK_CONFIG); 2989 ufreq = freq = in_be32(u3_ht + U3_HT_LINK_FREQ); 2990 dump_HT_speeds("U3 HyperTransport", cfg, freq); 2991 2992 pcix_node = of_find_compatible_node(NULL, "pci", "pci-x"); 2993 if (pcix_node == NULL) { 2994 printk("No PCI-X bridge found\n"); 2995 return; 2996 } 2997 if (pci_device_from_OF_node(pcix_node, &px_bus, &px_devfn) != 0) { 2998 printk("PCI-X bridge found but not matched to pci\n"); 2999 return; 3000 } 3001 px_hose = pci_find_hose_for_OF_device(pcix_node); 3002 if (px_hose == NULL) { 3003 printk("PCI-X bridge found but not matched to host\n"); 3004 return; 3005 } 3006 early_read_config_dword(px_hose, px_bus, px_devfn, 0xc4, &cfg); 3007 early_read_config_dword(px_hose, px_bus, px_devfn, 0xcc, &freq); 3008 dump_HT_speeds("PCI-X HT Uplink", cfg, freq); 3009 early_read_config_dword(px_hose, px_bus, px_devfn, 0xc8, &cfg); 3010 early_read_config_dword(px_hose, px_bus, px_devfn, 0xd0, &freq); 3011 dump_HT_speeds("PCI-X HT Downlink", cfg, freq); 3012 } 3013 #endif /* 0 */ 3014 3015 /* 3016 * Early video resume hook 3017 */ 3018 3019 static void (*pmac_early_vresume_proc)(void *data); 3020 static void *pmac_early_vresume_data; 3021 3022 void pmac_set_early_video_resume(void (*proc)(void *data), void *data) 3023 { 3024 if (_machine != _MACH_Pmac) 3025 return; 3026 preempt_disable(); 3027 pmac_early_vresume_proc = proc; 3028 pmac_early_vresume_data = data; 3029 preempt_enable(); 3030 } 3031 EXPORT_SYMBOL(pmac_set_early_video_resume); 3032 3033 void pmac_call_early_video_resume(void) 3034 { 3035 if (pmac_early_vresume_proc) 3036 pmac_early_vresume_proc(pmac_early_vresume_data); 3037 } 3038 3039 /* 3040 * AGP related suspend/resume code 3041 */ 3042 3043 static struct pci_dev *pmac_agp_bridge; 3044 static int (*pmac_agp_suspend)(struct pci_dev *bridge); 3045 static int (*pmac_agp_resume)(struct pci_dev *bridge); 3046 3047 void pmac_register_agp_pm(struct pci_dev *bridge, 3048 int (*suspend)(struct pci_dev *bridge), 3049 int (*resume)(struct pci_dev *bridge)) 3050 { 3051 if (suspend || resume) { 3052 pmac_agp_bridge = bridge; 3053 pmac_agp_suspend = suspend; 3054 pmac_agp_resume = resume; 3055 return; 3056 } 3057 if (bridge != pmac_agp_bridge) 3058 return; 3059 pmac_agp_suspend = pmac_agp_resume = NULL; 3060 return; 3061 } 3062 EXPORT_SYMBOL(pmac_register_agp_pm); 3063 3064 void pmac_suspend_agp_for_card(struct pci_dev *dev) 3065 { 3066 if (pmac_agp_bridge == NULL || pmac_agp_suspend == NULL) 3067 return; 3068 if (pmac_agp_bridge->bus != dev->bus) 3069 return; 3070 pmac_agp_suspend(pmac_agp_bridge); 3071 } 3072 EXPORT_SYMBOL(pmac_suspend_agp_for_card); 3073 3074 void pmac_resume_agp_for_card(struct pci_dev *dev) 3075 { 3076 if (pmac_agp_bridge == NULL || pmac_agp_resume == NULL) 3077 return; 3078 if (pmac_agp_bridge->bus != dev->bus) 3079 return; 3080 pmac_agp_resume(pmac_agp_bridge); 3081 } 3082 EXPORT_SYMBOL(pmac_resume_agp_for_card); 3083