1 /* 2 * Copyright (C) 1996-2001 Paul Mackerras (paulus@cs.anu.edu.au) 3 * Ben. Herrenschmidt (benh@kernel.crashing.org) 4 * 5 * This program is free software; you can redistribute it and/or 6 * modify it under the terms of the GNU General Public License 7 * as published by the Free Software Foundation; either version 8 * 2 of the License, or (at your option) any later version. 9 * 10 * TODO: 11 * 12 * - Replace mdelay with some schedule loop if possible 13 * - Shorten some obfuscated delays on some routines (like modem 14 * power) 15 * - Refcount some clocks (see darwin) 16 * - Split split split... 17 * 18 */ 19 #include <linux/config.h> 20 #include <linux/types.h> 21 #include <linux/init.h> 22 #include <linux/delay.h> 23 #include <linux/kernel.h> 24 #include <linux/sched.h> 25 #include <linux/spinlock.h> 26 #include <linux/adb.h> 27 #include <linux/pmu.h> 28 #include <linux/ioport.h> 29 #include <linux/pci.h> 30 #include <asm/sections.h> 31 #include <asm/errno.h> 32 #include <asm/ohare.h> 33 #include <asm/heathrow.h> 34 #include <asm/keylargo.h> 35 #include <asm/uninorth.h> 36 #include <asm/io.h> 37 #include <asm/prom.h> 38 #include <asm/machdep.h> 39 #include <asm/pmac_feature.h> 40 #include <asm/dbdma.h> 41 #include <asm/pci-bridge.h> 42 #include <asm/pmac_low_i2c.h> 43 44 #undef DEBUG_FEATURE 45 46 #ifdef DEBUG_FEATURE 47 #define DBG(fmt...) printk(KERN_DEBUG fmt) 48 #else 49 #define DBG(fmt...) 50 #endif 51 52 #ifdef CONFIG_6xx 53 extern int powersave_lowspeed; 54 #endif 55 56 extern int powersave_nap; 57 extern struct device_node *k2_skiplist[2]; 58 59 /* 60 * We use a single global lock to protect accesses. Each driver has 61 * to take care of its own locking 62 */ 63 DEFINE_SPINLOCK(feature_lock); 64 65 #define LOCK(flags) spin_lock_irqsave(&feature_lock, flags); 66 #define UNLOCK(flags) spin_unlock_irqrestore(&feature_lock, flags); 67 68 69 /* 70 * Instance of some macio stuffs 71 */ 72 struct macio_chip macio_chips[MAX_MACIO_CHIPS]; 73 74 struct macio_chip *macio_find(struct device_node *child, int type) 75 { 76 while(child) { 77 int i; 78 79 for (i=0; i < MAX_MACIO_CHIPS && macio_chips[i].of_node; i++) 80 if (child == macio_chips[i].of_node && 81 (!type || macio_chips[i].type == type)) 82 return &macio_chips[i]; 83 child = child->parent; 84 } 85 return NULL; 86 } 87 EXPORT_SYMBOL_GPL(macio_find); 88 89 static const char *macio_names[] = 90 { 91 "Unknown", 92 "Grand Central", 93 "OHare", 94 "OHareII", 95 "Heathrow", 96 "Gatwick", 97 "Paddington", 98 "Keylargo", 99 "Pangea", 100 "Intrepid", 101 "K2", 102 "Shasta", 103 }; 104 105 106 struct device_node *uninorth_node; 107 u32 __iomem *uninorth_base; 108 109 static u32 uninorth_rev; 110 static int uninorth_maj; 111 static void __iomem *u3_ht_base; 112 113 /* 114 * For each motherboard family, we have a table of functions pointers 115 * that handle the various features. 116 */ 117 118 typedef long (*feature_call)(struct device_node *node, long param, long value); 119 120 struct feature_table_entry { 121 unsigned int selector; 122 feature_call function; 123 }; 124 125 struct pmac_mb_def 126 { 127 const char* model_string; 128 const char* model_name; 129 int model_id; 130 struct feature_table_entry* features; 131 unsigned long board_flags; 132 }; 133 static struct pmac_mb_def pmac_mb; 134 135 /* 136 * Here are the chip specific feature functions 137 */ 138 139 static inline int simple_feature_tweak(struct device_node *node, int type, 140 int reg, u32 mask, int value) 141 { 142 struct macio_chip* macio; 143 unsigned long flags; 144 145 macio = macio_find(node, type); 146 if (!macio) 147 return -ENODEV; 148 LOCK(flags); 149 if (value) 150 MACIO_BIS(reg, mask); 151 else 152 MACIO_BIC(reg, mask); 153 (void)MACIO_IN32(reg); 154 UNLOCK(flags); 155 156 return 0; 157 } 158 159 #ifndef CONFIG_POWER4 160 161 static long ohare_htw_scc_enable(struct device_node *node, long param, 162 long value) 163 { 164 struct macio_chip* macio; 165 unsigned long chan_mask; 166 unsigned long fcr; 167 unsigned long flags; 168 int htw, trans; 169 unsigned long rmask; 170 171 macio = macio_find(node, 0); 172 if (!macio) 173 return -ENODEV; 174 if (!strcmp(node->name, "ch-a")) 175 chan_mask = MACIO_FLAG_SCCA_ON; 176 else if (!strcmp(node->name, "ch-b")) 177 chan_mask = MACIO_FLAG_SCCB_ON; 178 else 179 return -ENODEV; 180 181 htw = (macio->type == macio_heathrow || macio->type == macio_paddington 182 || macio->type == macio_gatwick); 183 /* On these machines, the HRW_SCC_TRANS_EN_N bit mustn't be touched */ 184 trans = (pmac_mb.model_id != PMAC_TYPE_YOSEMITE && 185 pmac_mb.model_id != PMAC_TYPE_YIKES); 186 if (value) { 187 #ifdef CONFIG_ADB_PMU 188 if ((param & 0xfff) == PMAC_SCC_IRDA) 189 pmu_enable_irled(1); 190 #endif /* CONFIG_ADB_PMU */ 191 LOCK(flags); 192 fcr = MACIO_IN32(OHARE_FCR); 193 /* Check if scc cell need enabling */ 194 if (!(fcr & OH_SCC_ENABLE)) { 195 fcr |= OH_SCC_ENABLE; 196 if (htw) { 197 /* Side effect: this will also power up the 198 * modem, but it's too messy to figure out on which 199 * ports this controls the tranceiver and on which 200 * it controls the modem 201 */ 202 if (trans) 203 fcr &= ~HRW_SCC_TRANS_EN_N; 204 MACIO_OUT32(OHARE_FCR, fcr); 205 fcr |= (rmask = HRW_RESET_SCC); 206 MACIO_OUT32(OHARE_FCR, fcr); 207 } else { 208 fcr |= (rmask = OH_SCC_RESET); 209 MACIO_OUT32(OHARE_FCR, fcr); 210 } 211 UNLOCK(flags); 212 (void)MACIO_IN32(OHARE_FCR); 213 mdelay(15); 214 LOCK(flags); 215 fcr &= ~rmask; 216 MACIO_OUT32(OHARE_FCR, fcr); 217 } 218 if (chan_mask & MACIO_FLAG_SCCA_ON) 219 fcr |= OH_SCCA_IO; 220 if (chan_mask & MACIO_FLAG_SCCB_ON) 221 fcr |= OH_SCCB_IO; 222 MACIO_OUT32(OHARE_FCR, fcr); 223 macio->flags |= chan_mask; 224 UNLOCK(flags); 225 if (param & PMAC_SCC_FLAG_XMON) 226 macio->flags |= MACIO_FLAG_SCC_LOCKED; 227 } else { 228 if (macio->flags & MACIO_FLAG_SCC_LOCKED) 229 return -EPERM; 230 LOCK(flags); 231 fcr = MACIO_IN32(OHARE_FCR); 232 if (chan_mask & MACIO_FLAG_SCCA_ON) 233 fcr &= ~OH_SCCA_IO; 234 if (chan_mask & MACIO_FLAG_SCCB_ON) 235 fcr &= ~OH_SCCB_IO; 236 MACIO_OUT32(OHARE_FCR, fcr); 237 if ((fcr & (OH_SCCA_IO | OH_SCCB_IO)) == 0) { 238 fcr &= ~OH_SCC_ENABLE; 239 if (htw && trans) 240 fcr |= HRW_SCC_TRANS_EN_N; 241 MACIO_OUT32(OHARE_FCR, fcr); 242 } 243 macio->flags &= ~(chan_mask); 244 UNLOCK(flags); 245 mdelay(10); 246 #ifdef CONFIG_ADB_PMU 247 if ((param & 0xfff) == PMAC_SCC_IRDA) 248 pmu_enable_irled(0); 249 #endif /* CONFIG_ADB_PMU */ 250 } 251 return 0; 252 } 253 254 static long ohare_floppy_enable(struct device_node *node, long param, 255 long value) 256 { 257 return simple_feature_tweak(node, macio_ohare, 258 OHARE_FCR, OH_FLOPPY_ENABLE, value); 259 } 260 261 static long ohare_mesh_enable(struct device_node *node, long param, long value) 262 { 263 return simple_feature_tweak(node, macio_ohare, 264 OHARE_FCR, OH_MESH_ENABLE, value); 265 } 266 267 static long ohare_ide_enable(struct device_node *node, long param, long value) 268 { 269 switch(param) { 270 case 0: 271 /* For some reason, setting the bit in set_initial_features() 272 * doesn't stick. I'm still investigating... --BenH. 273 */ 274 if (value) 275 simple_feature_tweak(node, macio_ohare, 276 OHARE_FCR, OH_IOBUS_ENABLE, 1); 277 return simple_feature_tweak(node, macio_ohare, 278 OHARE_FCR, OH_IDE0_ENABLE, value); 279 case 1: 280 return simple_feature_tweak(node, macio_ohare, 281 OHARE_FCR, OH_BAY_IDE_ENABLE, value); 282 default: 283 return -ENODEV; 284 } 285 } 286 287 static long ohare_ide_reset(struct device_node *node, long param, long value) 288 { 289 switch(param) { 290 case 0: 291 return simple_feature_tweak(node, macio_ohare, 292 OHARE_FCR, OH_IDE0_RESET_N, !value); 293 case 1: 294 return simple_feature_tweak(node, macio_ohare, 295 OHARE_FCR, OH_IDE1_RESET_N, !value); 296 default: 297 return -ENODEV; 298 } 299 } 300 301 static long ohare_sleep_state(struct device_node *node, long param, long value) 302 { 303 struct macio_chip* macio = &macio_chips[0]; 304 305 if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0) 306 return -EPERM; 307 if (value == 1) { 308 MACIO_BIC(OHARE_FCR, OH_IOBUS_ENABLE); 309 } else if (value == 0) { 310 MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE); 311 } 312 313 return 0; 314 } 315 316 static long heathrow_modem_enable(struct device_node *node, long param, 317 long value) 318 { 319 struct macio_chip* macio; 320 u8 gpio; 321 unsigned long flags; 322 323 macio = macio_find(node, macio_unknown); 324 if (!macio) 325 return -ENODEV; 326 gpio = MACIO_IN8(HRW_GPIO_MODEM_RESET) & ~1; 327 if (!value) { 328 LOCK(flags); 329 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio); 330 UNLOCK(flags); 331 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET); 332 mdelay(250); 333 } 334 if (pmac_mb.model_id != PMAC_TYPE_YOSEMITE && 335 pmac_mb.model_id != PMAC_TYPE_YIKES) { 336 LOCK(flags); 337 if (value) 338 MACIO_BIC(HEATHROW_FCR, HRW_SCC_TRANS_EN_N); 339 else 340 MACIO_BIS(HEATHROW_FCR, HRW_SCC_TRANS_EN_N); 341 UNLOCK(flags); 342 (void)MACIO_IN32(HEATHROW_FCR); 343 mdelay(250); 344 } 345 if (value) { 346 LOCK(flags); 347 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio | 1); 348 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET); 349 UNLOCK(flags); mdelay(250); LOCK(flags); 350 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio); 351 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET); 352 UNLOCK(flags); mdelay(250); LOCK(flags); 353 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio | 1); 354 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET); 355 UNLOCK(flags); mdelay(250); 356 } 357 return 0; 358 } 359 360 static long heathrow_floppy_enable(struct device_node *node, long param, 361 long value) 362 { 363 return simple_feature_tweak(node, macio_unknown, 364 HEATHROW_FCR, 365 HRW_SWIM_ENABLE|HRW_BAY_FLOPPY_ENABLE, 366 value); 367 } 368 369 static long heathrow_mesh_enable(struct device_node *node, long param, 370 long value) 371 { 372 struct macio_chip* macio; 373 unsigned long flags; 374 375 macio = macio_find(node, macio_unknown); 376 if (!macio) 377 return -ENODEV; 378 LOCK(flags); 379 /* Set clear mesh cell enable */ 380 if (value) 381 MACIO_BIS(HEATHROW_FCR, HRW_MESH_ENABLE); 382 else 383 MACIO_BIC(HEATHROW_FCR, HRW_MESH_ENABLE); 384 (void)MACIO_IN32(HEATHROW_FCR); 385 udelay(10); 386 /* Set/Clear termination power */ 387 if (value) 388 MACIO_BIC(HEATHROW_MBCR, 0x04000000); 389 else 390 MACIO_BIS(HEATHROW_MBCR, 0x04000000); 391 (void)MACIO_IN32(HEATHROW_MBCR); 392 udelay(10); 393 UNLOCK(flags); 394 395 return 0; 396 } 397 398 static long heathrow_ide_enable(struct device_node *node, long param, 399 long value) 400 { 401 switch(param) { 402 case 0: 403 return simple_feature_tweak(node, macio_unknown, 404 HEATHROW_FCR, HRW_IDE0_ENABLE, value); 405 case 1: 406 return simple_feature_tweak(node, macio_unknown, 407 HEATHROW_FCR, HRW_BAY_IDE_ENABLE, value); 408 default: 409 return -ENODEV; 410 } 411 } 412 413 static long heathrow_ide_reset(struct device_node *node, long param, 414 long value) 415 { 416 switch(param) { 417 case 0: 418 return simple_feature_tweak(node, macio_unknown, 419 HEATHROW_FCR, HRW_IDE0_RESET_N, !value); 420 case 1: 421 return simple_feature_tweak(node, macio_unknown, 422 HEATHROW_FCR, HRW_IDE1_RESET_N, !value); 423 default: 424 return -ENODEV; 425 } 426 } 427 428 static long heathrow_bmac_enable(struct device_node *node, long param, 429 long value) 430 { 431 struct macio_chip* macio; 432 unsigned long flags; 433 434 macio = macio_find(node, 0); 435 if (!macio) 436 return -ENODEV; 437 if (value) { 438 LOCK(flags); 439 MACIO_BIS(HEATHROW_FCR, HRW_BMAC_IO_ENABLE); 440 MACIO_BIS(HEATHROW_FCR, HRW_BMAC_RESET); 441 UNLOCK(flags); 442 (void)MACIO_IN32(HEATHROW_FCR); 443 mdelay(10); 444 LOCK(flags); 445 MACIO_BIC(HEATHROW_FCR, HRW_BMAC_RESET); 446 UNLOCK(flags); 447 (void)MACIO_IN32(HEATHROW_FCR); 448 mdelay(10); 449 } else { 450 LOCK(flags); 451 MACIO_BIC(HEATHROW_FCR, HRW_BMAC_IO_ENABLE); 452 UNLOCK(flags); 453 } 454 return 0; 455 } 456 457 static long heathrow_sound_enable(struct device_node *node, long param, 458 long value) 459 { 460 struct macio_chip* macio; 461 unsigned long flags; 462 463 /* B&W G3 and Yikes don't support that properly (the 464 * sound appear to never come back after beeing shut down). 465 */ 466 if (pmac_mb.model_id == PMAC_TYPE_YOSEMITE || 467 pmac_mb.model_id == PMAC_TYPE_YIKES) 468 return 0; 469 470 macio = macio_find(node, 0); 471 if (!macio) 472 return -ENODEV; 473 if (value) { 474 LOCK(flags); 475 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE); 476 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_POWER_N); 477 UNLOCK(flags); 478 (void)MACIO_IN32(HEATHROW_FCR); 479 } else { 480 LOCK(flags); 481 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_POWER_N); 482 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE); 483 UNLOCK(flags); 484 } 485 return 0; 486 } 487 488 static u32 save_fcr[6]; 489 static u32 save_mbcr; 490 static u32 save_gpio_levels[2]; 491 static u8 save_gpio_extint[KEYLARGO_GPIO_EXTINT_CNT]; 492 static u8 save_gpio_normal[KEYLARGO_GPIO_CNT]; 493 static u32 save_unin_clock_ctl; 494 static struct dbdma_regs save_dbdma[13]; 495 static struct dbdma_regs save_alt_dbdma[13]; 496 497 static void dbdma_save(struct macio_chip *macio, struct dbdma_regs *save) 498 { 499 int i; 500 501 /* Save state & config of DBDMA channels */ 502 for (i = 0; i < 13; i++) { 503 volatile struct dbdma_regs __iomem * chan = (void __iomem *) 504 (macio->base + ((0x8000+i*0x100)>>2)); 505 save[i].cmdptr_hi = in_le32(&chan->cmdptr_hi); 506 save[i].cmdptr = in_le32(&chan->cmdptr); 507 save[i].intr_sel = in_le32(&chan->intr_sel); 508 save[i].br_sel = in_le32(&chan->br_sel); 509 save[i].wait_sel = in_le32(&chan->wait_sel); 510 } 511 } 512 513 static void dbdma_restore(struct macio_chip *macio, struct dbdma_regs *save) 514 { 515 int i; 516 517 /* Save state & config of DBDMA channels */ 518 for (i = 0; i < 13; i++) { 519 volatile struct dbdma_regs __iomem * chan = (void __iomem *) 520 (macio->base + ((0x8000+i*0x100)>>2)); 521 out_le32(&chan->control, (ACTIVE|DEAD|WAKE|FLUSH|PAUSE|RUN)<<16); 522 while (in_le32(&chan->status) & ACTIVE) 523 mb(); 524 out_le32(&chan->cmdptr_hi, save[i].cmdptr_hi); 525 out_le32(&chan->cmdptr, save[i].cmdptr); 526 out_le32(&chan->intr_sel, save[i].intr_sel); 527 out_le32(&chan->br_sel, save[i].br_sel); 528 out_le32(&chan->wait_sel, save[i].wait_sel); 529 } 530 } 531 532 static void heathrow_sleep(struct macio_chip *macio, int secondary) 533 { 534 if (secondary) { 535 dbdma_save(macio, save_alt_dbdma); 536 save_fcr[2] = MACIO_IN32(0x38); 537 save_fcr[3] = MACIO_IN32(0x3c); 538 } else { 539 dbdma_save(macio, save_dbdma); 540 save_fcr[0] = MACIO_IN32(0x38); 541 save_fcr[1] = MACIO_IN32(0x3c); 542 save_mbcr = MACIO_IN32(0x34); 543 /* Make sure sound is shut down */ 544 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_POWER_N); 545 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE); 546 /* This seems to be necessary as well or the fan 547 * keeps coming up and battery drains fast */ 548 MACIO_BIC(HEATHROW_FCR, HRW_IOBUS_ENABLE); 549 MACIO_BIC(HEATHROW_FCR, HRW_IDE0_RESET_N); 550 /* Make sure eth is down even if module or sleep 551 * won't work properly */ 552 MACIO_BIC(HEATHROW_FCR, HRW_BMAC_IO_ENABLE | HRW_BMAC_RESET); 553 } 554 /* Make sure modem is shut down */ 555 MACIO_OUT8(HRW_GPIO_MODEM_RESET, 556 MACIO_IN8(HRW_GPIO_MODEM_RESET) & ~1); 557 MACIO_BIS(HEATHROW_FCR, HRW_SCC_TRANS_EN_N); 558 MACIO_BIC(HEATHROW_FCR, OH_SCCA_IO|OH_SCCB_IO|HRW_SCC_ENABLE); 559 560 /* Let things settle */ 561 (void)MACIO_IN32(HEATHROW_FCR); 562 } 563 564 static void heathrow_wakeup(struct macio_chip *macio, int secondary) 565 { 566 if (secondary) { 567 MACIO_OUT32(0x38, save_fcr[2]); 568 (void)MACIO_IN32(0x38); 569 mdelay(1); 570 MACIO_OUT32(0x3c, save_fcr[3]); 571 (void)MACIO_IN32(0x38); 572 mdelay(10); 573 dbdma_restore(macio, save_alt_dbdma); 574 } else { 575 MACIO_OUT32(0x38, save_fcr[0] | HRW_IOBUS_ENABLE); 576 (void)MACIO_IN32(0x38); 577 mdelay(1); 578 MACIO_OUT32(0x3c, save_fcr[1]); 579 (void)MACIO_IN32(0x38); 580 mdelay(1); 581 MACIO_OUT32(0x34, save_mbcr); 582 (void)MACIO_IN32(0x38); 583 mdelay(10); 584 dbdma_restore(macio, save_dbdma); 585 } 586 } 587 588 static long heathrow_sleep_state(struct device_node *node, long param, 589 long value) 590 { 591 if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0) 592 return -EPERM; 593 if (value == 1) { 594 if (macio_chips[1].type == macio_gatwick) 595 heathrow_sleep(&macio_chips[0], 1); 596 heathrow_sleep(&macio_chips[0], 0); 597 } else if (value == 0) { 598 heathrow_wakeup(&macio_chips[0], 0); 599 if (macio_chips[1].type == macio_gatwick) 600 heathrow_wakeup(&macio_chips[0], 1); 601 } 602 return 0; 603 } 604 605 static long core99_scc_enable(struct device_node *node, long param, long value) 606 { 607 struct macio_chip* macio; 608 unsigned long flags; 609 unsigned long chan_mask; 610 u32 fcr; 611 612 macio = macio_find(node, 0); 613 if (!macio) 614 return -ENODEV; 615 if (!strcmp(node->name, "ch-a")) 616 chan_mask = MACIO_FLAG_SCCA_ON; 617 else if (!strcmp(node->name, "ch-b")) 618 chan_mask = MACIO_FLAG_SCCB_ON; 619 else 620 return -ENODEV; 621 622 if (value) { 623 int need_reset_scc = 0; 624 int need_reset_irda = 0; 625 626 LOCK(flags); 627 fcr = MACIO_IN32(KEYLARGO_FCR0); 628 /* Check if scc cell need enabling */ 629 if (!(fcr & KL0_SCC_CELL_ENABLE)) { 630 fcr |= KL0_SCC_CELL_ENABLE; 631 need_reset_scc = 1; 632 } 633 if (chan_mask & MACIO_FLAG_SCCA_ON) { 634 fcr |= KL0_SCCA_ENABLE; 635 /* Don't enable line drivers for I2S modem */ 636 if ((param & 0xfff) == PMAC_SCC_I2S1) 637 fcr &= ~KL0_SCC_A_INTF_ENABLE; 638 else 639 fcr |= KL0_SCC_A_INTF_ENABLE; 640 } 641 if (chan_mask & MACIO_FLAG_SCCB_ON) { 642 fcr |= KL0_SCCB_ENABLE; 643 /* Perform irda specific inits */ 644 if ((param & 0xfff) == PMAC_SCC_IRDA) { 645 fcr &= ~KL0_SCC_B_INTF_ENABLE; 646 fcr |= KL0_IRDA_ENABLE; 647 fcr |= KL0_IRDA_CLK32_ENABLE | KL0_IRDA_CLK19_ENABLE; 648 fcr |= KL0_IRDA_SOURCE1_SEL; 649 fcr &= ~(KL0_IRDA_FAST_CONNECT|KL0_IRDA_DEFAULT1|KL0_IRDA_DEFAULT0); 650 fcr &= ~(KL0_IRDA_SOURCE2_SEL|KL0_IRDA_HIGH_BAND); 651 need_reset_irda = 1; 652 } else 653 fcr |= KL0_SCC_B_INTF_ENABLE; 654 } 655 MACIO_OUT32(KEYLARGO_FCR0, fcr); 656 macio->flags |= chan_mask; 657 if (need_reset_scc) { 658 MACIO_BIS(KEYLARGO_FCR0, KL0_SCC_RESET); 659 (void)MACIO_IN32(KEYLARGO_FCR0); 660 UNLOCK(flags); 661 mdelay(15); 662 LOCK(flags); 663 MACIO_BIC(KEYLARGO_FCR0, KL0_SCC_RESET); 664 } 665 if (need_reset_irda) { 666 MACIO_BIS(KEYLARGO_FCR0, KL0_IRDA_RESET); 667 (void)MACIO_IN32(KEYLARGO_FCR0); 668 UNLOCK(flags); 669 mdelay(15); 670 LOCK(flags); 671 MACIO_BIC(KEYLARGO_FCR0, KL0_IRDA_RESET); 672 } 673 UNLOCK(flags); 674 if (param & PMAC_SCC_FLAG_XMON) 675 macio->flags |= MACIO_FLAG_SCC_LOCKED; 676 } else { 677 if (macio->flags & MACIO_FLAG_SCC_LOCKED) 678 return -EPERM; 679 LOCK(flags); 680 fcr = MACIO_IN32(KEYLARGO_FCR0); 681 if (chan_mask & MACIO_FLAG_SCCA_ON) 682 fcr &= ~KL0_SCCA_ENABLE; 683 if (chan_mask & MACIO_FLAG_SCCB_ON) { 684 fcr &= ~KL0_SCCB_ENABLE; 685 /* Perform irda specific clears */ 686 if ((param & 0xfff) == PMAC_SCC_IRDA) { 687 fcr &= ~KL0_IRDA_ENABLE; 688 fcr &= ~(KL0_IRDA_CLK32_ENABLE | KL0_IRDA_CLK19_ENABLE); 689 fcr &= ~(KL0_IRDA_FAST_CONNECT|KL0_IRDA_DEFAULT1|KL0_IRDA_DEFAULT0); 690 fcr &= ~(KL0_IRDA_SOURCE1_SEL|KL0_IRDA_SOURCE2_SEL|KL0_IRDA_HIGH_BAND); 691 } 692 } 693 MACIO_OUT32(KEYLARGO_FCR0, fcr); 694 if ((fcr & (KL0_SCCA_ENABLE | KL0_SCCB_ENABLE)) == 0) { 695 fcr &= ~KL0_SCC_CELL_ENABLE; 696 MACIO_OUT32(KEYLARGO_FCR0, fcr); 697 } 698 macio->flags &= ~(chan_mask); 699 UNLOCK(flags); 700 mdelay(10); 701 } 702 return 0; 703 } 704 705 static long 706 core99_modem_enable(struct device_node *node, long param, long value) 707 { 708 struct macio_chip* macio; 709 u8 gpio; 710 unsigned long flags; 711 712 /* Hack for internal USB modem */ 713 if (node == NULL) { 714 if (macio_chips[0].type != macio_keylargo) 715 return -ENODEV; 716 node = macio_chips[0].of_node; 717 } 718 macio = macio_find(node, 0); 719 if (!macio) 720 return -ENODEV; 721 gpio = MACIO_IN8(KL_GPIO_MODEM_RESET); 722 gpio |= KEYLARGO_GPIO_OUTPUT_ENABLE; 723 gpio &= ~KEYLARGO_GPIO_OUTOUT_DATA; 724 725 if (!value) { 726 LOCK(flags); 727 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio); 728 UNLOCK(flags); 729 (void)MACIO_IN8(KL_GPIO_MODEM_RESET); 730 mdelay(250); 731 } 732 LOCK(flags); 733 if (value) { 734 MACIO_BIC(KEYLARGO_FCR2, KL2_ALT_DATA_OUT); 735 UNLOCK(flags); 736 (void)MACIO_IN32(KEYLARGO_FCR2); 737 mdelay(250); 738 } else { 739 MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT); 740 UNLOCK(flags); 741 } 742 if (value) { 743 LOCK(flags); 744 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA); 745 (void)MACIO_IN8(KL_GPIO_MODEM_RESET); 746 UNLOCK(flags); mdelay(250); LOCK(flags); 747 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio); 748 (void)MACIO_IN8(KL_GPIO_MODEM_RESET); 749 UNLOCK(flags); mdelay(250); LOCK(flags); 750 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA); 751 (void)MACIO_IN8(KL_GPIO_MODEM_RESET); 752 UNLOCK(flags); mdelay(250); 753 } 754 return 0; 755 } 756 757 static long 758 pangea_modem_enable(struct device_node *node, long param, long value) 759 { 760 struct macio_chip* macio; 761 u8 gpio; 762 unsigned long flags; 763 764 /* Hack for internal USB modem */ 765 if (node == NULL) { 766 if (macio_chips[0].type != macio_pangea && 767 macio_chips[0].type != macio_intrepid) 768 return -ENODEV; 769 node = macio_chips[0].of_node; 770 } 771 macio = macio_find(node, 0); 772 if (!macio) 773 return -ENODEV; 774 gpio = MACIO_IN8(KL_GPIO_MODEM_RESET); 775 gpio |= KEYLARGO_GPIO_OUTPUT_ENABLE; 776 gpio &= ~KEYLARGO_GPIO_OUTOUT_DATA; 777 778 if (!value) { 779 LOCK(flags); 780 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio); 781 UNLOCK(flags); 782 (void)MACIO_IN8(KL_GPIO_MODEM_RESET); 783 mdelay(250); 784 } 785 LOCK(flags); 786 if (value) { 787 MACIO_OUT8(KL_GPIO_MODEM_POWER, 788 KEYLARGO_GPIO_OUTPUT_ENABLE); 789 UNLOCK(flags); 790 (void)MACIO_IN32(KEYLARGO_FCR2); 791 mdelay(250); 792 } else { 793 MACIO_OUT8(KL_GPIO_MODEM_POWER, 794 KEYLARGO_GPIO_OUTPUT_ENABLE | KEYLARGO_GPIO_OUTOUT_DATA); 795 UNLOCK(flags); 796 } 797 if (value) { 798 LOCK(flags); 799 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA); 800 (void)MACIO_IN8(KL_GPIO_MODEM_RESET); 801 UNLOCK(flags); mdelay(250); LOCK(flags); 802 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio); 803 (void)MACIO_IN8(KL_GPIO_MODEM_RESET); 804 UNLOCK(flags); mdelay(250); LOCK(flags); 805 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA); 806 (void)MACIO_IN8(KL_GPIO_MODEM_RESET); 807 UNLOCK(flags); mdelay(250); 808 } 809 return 0; 810 } 811 812 static long 813 core99_ata100_enable(struct device_node *node, long value) 814 { 815 unsigned long flags; 816 struct pci_dev *pdev = NULL; 817 u8 pbus, pid; 818 819 if (uninorth_rev < 0x24) 820 return -ENODEV; 821 822 LOCK(flags); 823 if (value) 824 UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_ATA100); 825 else 826 UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_ATA100); 827 (void)UN_IN(UNI_N_CLOCK_CNTL); 828 UNLOCK(flags); 829 udelay(20); 830 831 if (value) { 832 if (pci_device_from_OF_node(node, &pbus, &pid) == 0) 833 pdev = pci_find_slot(pbus, pid); 834 if (pdev == NULL) 835 return 0; 836 pci_enable_device(pdev); 837 pci_set_master(pdev); 838 } 839 return 0; 840 } 841 842 static long 843 core99_ide_enable(struct device_node *node, long param, long value) 844 { 845 /* Bus ID 0 to 2 are KeyLargo based IDE, busID 3 is U2 846 * based ata-100 847 */ 848 switch(param) { 849 case 0: 850 return simple_feature_tweak(node, macio_unknown, 851 KEYLARGO_FCR1, KL1_EIDE0_ENABLE, value); 852 case 1: 853 return simple_feature_tweak(node, macio_unknown, 854 KEYLARGO_FCR1, KL1_EIDE1_ENABLE, value); 855 case 2: 856 return simple_feature_tweak(node, macio_unknown, 857 KEYLARGO_FCR1, KL1_UIDE_ENABLE, value); 858 case 3: 859 return core99_ata100_enable(node, value); 860 default: 861 return -ENODEV; 862 } 863 } 864 865 static long 866 core99_ide_reset(struct device_node *node, long param, long value) 867 { 868 switch(param) { 869 case 0: 870 return simple_feature_tweak(node, macio_unknown, 871 KEYLARGO_FCR1, KL1_EIDE0_RESET_N, !value); 872 case 1: 873 return simple_feature_tweak(node, macio_unknown, 874 KEYLARGO_FCR1, KL1_EIDE1_RESET_N, !value); 875 case 2: 876 return simple_feature_tweak(node, macio_unknown, 877 KEYLARGO_FCR1, KL1_UIDE_RESET_N, !value); 878 default: 879 return -ENODEV; 880 } 881 } 882 883 static long 884 core99_gmac_enable(struct device_node *node, long param, long value) 885 { 886 unsigned long flags; 887 888 LOCK(flags); 889 if (value) 890 UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_GMAC); 891 else 892 UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_GMAC); 893 (void)UN_IN(UNI_N_CLOCK_CNTL); 894 UNLOCK(flags); 895 udelay(20); 896 897 return 0; 898 } 899 900 static long 901 core99_gmac_phy_reset(struct device_node *node, long param, long value) 902 { 903 unsigned long flags; 904 struct macio_chip *macio; 905 906 macio = &macio_chips[0]; 907 if (macio->type != macio_keylargo && macio->type != macio_pangea && 908 macio->type != macio_intrepid) 909 return -ENODEV; 910 911 LOCK(flags); 912 MACIO_OUT8(KL_GPIO_ETH_PHY_RESET, KEYLARGO_GPIO_OUTPUT_ENABLE); 913 (void)MACIO_IN8(KL_GPIO_ETH_PHY_RESET); 914 UNLOCK(flags); 915 mdelay(10); 916 LOCK(flags); 917 MACIO_OUT8(KL_GPIO_ETH_PHY_RESET, /*KEYLARGO_GPIO_OUTPUT_ENABLE | */ 918 KEYLARGO_GPIO_OUTOUT_DATA); 919 UNLOCK(flags); 920 mdelay(10); 921 922 return 0; 923 } 924 925 static long 926 core99_sound_chip_enable(struct device_node *node, long param, long value) 927 { 928 struct macio_chip* macio; 929 unsigned long flags; 930 931 macio = macio_find(node, 0); 932 if (!macio) 933 return -ENODEV; 934 935 /* Do a better probe code, screamer G4 desktops & 936 * iMacs can do that too, add a recalibrate in 937 * the driver as well 938 */ 939 if (pmac_mb.model_id == PMAC_TYPE_PISMO || 940 pmac_mb.model_id == PMAC_TYPE_TITANIUM) { 941 LOCK(flags); 942 if (value) 943 MACIO_OUT8(KL_GPIO_SOUND_POWER, 944 KEYLARGO_GPIO_OUTPUT_ENABLE | 945 KEYLARGO_GPIO_OUTOUT_DATA); 946 else 947 MACIO_OUT8(KL_GPIO_SOUND_POWER, 948 KEYLARGO_GPIO_OUTPUT_ENABLE); 949 (void)MACIO_IN8(KL_GPIO_SOUND_POWER); 950 UNLOCK(flags); 951 } 952 return 0; 953 } 954 955 static long 956 core99_airport_enable(struct device_node *node, long param, long value) 957 { 958 struct macio_chip* macio; 959 unsigned long flags; 960 int state; 961 962 macio = macio_find(node, 0); 963 if (!macio) 964 return -ENODEV; 965 966 /* Hint: we allow passing of macio itself for the sake of the 967 * sleep code 968 */ 969 if (node != macio->of_node && 970 (!node->parent || node->parent != macio->of_node)) 971 return -ENODEV; 972 state = (macio->flags & MACIO_FLAG_AIRPORT_ON) != 0; 973 if (value == state) 974 return 0; 975 if (value) { 976 /* This code is a reproduction of OF enable-cardslot 977 * and init-wireless methods, slightly hacked until 978 * I got it working. 979 */ 980 LOCK(flags); 981 MACIO_OUT8(KEYLARGO_GPIO_0+0xf, 5); 982 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xf); 983 UNLOCK(flags); 984 mdelay(10); 985 LOCK(flags); 986 MACIO_OUT8(KEYLARGO_GPIO_0+0xf, 4); 987 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xf); 988 UNLOCK(flags); 989 990 mdelay(10); 991 992 LOCK(flags); 993 MACIO_BIC(KEYLARGO_FCR2, KL2_CARDSEL_16); 994 (void)MACIO_IN32(KEYLARGO_FCR2); 995 udelay(10); 996 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xb, 0); 997 (void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xb); 998 udelay(10); 999 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xa, 0x28); 1000 (void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xa); 1001 udelay(10); 1002 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xd, 0x28); 1003 (void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xd); 1004 udelay(10); 1005 MACIO_OUT8(KEYLARGO_GPIO_0+0xd, 0x28); 1006 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xd); 1007 udelay(10); 1008 MACIO_OUT8(KEYLARGO_GPIO_0+0xe, 0x28); 1009 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xe); 1010 UNLOCK(flags); 1011 udelay(10); 1012 MACIO_OUT32(0x1c000, 0); 1013 mdelay(1); 1014 MACIO_OUT8(0x1a3e0, 0x41); 1015 (void)MACIO_IN8(0x1a3e0); 1016 udelay(10); 1017 LOCK(flags); 1018 MACIO_BIS(KEYLARGO_FCR2, KL2_CARDSEL_16); 1019 (void)MACIO_IN32(KEYLARGO_FCR2); 1020 UNLOCK(flags); 1021 mdelay(100); 1022 1023 macio->flags |= MACIO_FLAG_AIRPORT_ON; 1024 } else { 1025 LOCK(flags); 1026 MACIO_BIC(KEYLARGO_FCR2, KL2_CARDSEL_16); 1027 (void)MACIO_IN32(KEYLARGO_FCR2); 1028 MACIO_OUT8(KL_GPIO_AIRPORT_0, 0); 1029 MACIO_OUT8(KL_GPIO_AIRPORT_1, 0); 1030 MACIO_OUT8(KL_GPIO_AIRPORT_2, 0); 1031 MACIO_OUT8(KL_GPIO_AIRPORT_3, 0); 1032 MACIO_OUT8(KL_GPIO_AIRPORT_4, 0); 1033 (void)MACIO_IN8(KL_GPIO_AIRPORT_4); 1034 UNLOCK(flags); 1035 1036 macio->flags &= ~MACIO_FLAG_AIRPORT_ON; 1037 } 1038 return 0; 1039 } 1040 1041 #ifdef CONFIG_SMP 1042 static long 1043 core99_reset_cpu(struct device_node *node, long param, long value) 1044 { 1045 unsigned int reset_io = 0; 1046 unsigned long flags; 1047 struct macio_chip *macio; 1048 struct device_node *np; 1049 const int dflt_reset_lines[] = { KL_GPIO_RESET_CPU0, 1050 KL_GPIO_RESET_CPU1, 1051 KL_GPIO_RESET_CPU2, 1052 KL_GPIO_RESET_CPU3 }; 1053 1054 macio = &macio_chips[0]; 1055 if (macio->type != macio_keylargo) 1056 return -ENODEV; 1057 1058 np = find_path_device("/cpus"); 1059 if (np == NULL) 1060 return -ENODEV; 1061 for (np = np->child; np != NULL; np = np->sibling) { 1062 u32 *num = (u32 *)get_property(np, "reg", NULL); 1063 u32 *rst = (u32 *)get_property(np, "soft-reset", NULL); 1064 if (num == NULL || rst == NULL) 1065 continue; 1066 if (param == *num) { 1067 reset_io = *rst; 1068 break; 1069 } 1070 } 1071 if (np == NULL || reset_io == 0) 1072 reset_io = dflt_reset_lines[param]; 1073 1074 LOCK(flags); 1075 MACIO_OUT8(reset_io, KEYLARGO_GPIO_OUTPUT_ENABLE); 1076 (void)MACIO_IN8(reset_io); 1077 udelay(1); 1078 MACIO_OUT8(reset_io, 0); 1079 (void)MACIO_IN8(reset_io); 1080 UNLOCK(flags); 1081 1082 return 0; 1083 } 1084 #endif /* CONFIG_SMP */ 1085 1086 static long 1087 core99_usb_enable(struct device_node *node, long param, long value) 1088 { 1089 struct macio_chip *macio; 1090 unsigned long flags; 1091 char *prop; 1092 int number; 1093 u32 reg; 1094 1095 macio = &macio_chips[0]; 1096 if (macio->type != macio_keylargo && macio->type != macio_pangea && 1097 macio->type != macio_intrepid) 1098 return -ENODEV; 1099 1100 prop = (char *)get_property(node, "AAPL,clock-id", NULL); 1101 if (!prop) 1102 return -ENODEV; 1103 if (strncmp(prop, "usb0u048", 8) == 0) 1104 number = 0; 1105 else if (strncmp(prop, "usb1u148", 8) == 0) 1106 number = 2; 1107 else if (strncmp(prop, "usb2u248", 8) == 0) 1108 number = 4; 1109 else 1110 return -ENODEV; 1111 1112 /* Sorry for the brute-force locking, but this is only used during 1113 * sleep and the timing seem to be critical 1114 */ 1115 LOCK(flags); 1116 if (value) { 1117 /* Turn ON */ 1118 if (number == 0) { 1119 MACIO_BIC(KEYLARGO_FCR0, (KL0_USB0_PAD_SUSPEND0 | KL0_USB0_PAD_SUSPEND1)); 1120 (void)MACIO_IN32(KEYLARGO_FCR0); 1121 UNLOCK(flags); 1122 mdelay(1); 1123 LOCK(flags); 1124 MACIO_BIS(KEYLARGO_FCR0, KL0_USB0_CELL_ENABLE); 1125 } else if (number == 2) { 1126 MACIO_BIC(KEYLARGO_FCR0, (KL0_USB1_PAD_SUSPEND0 | KL0_USB1_PAD_SUSPEND1)); 1127 UNLOCK(flags); 1128 (void)MACIO_IN32(KEYLARGO_FCR0); 1129 mdelay(1); 1130 LOCK(flags); 1131 MACIO_BIS(KEYLARGO_FCR0, KL0_USB1_CELL_ENABLE); 1132 } else if (number == 4) { 1133 MACIO_BIC(KEYLARGO_FCR1, (KL1_USB2_PAD_SUSPEND0 | KL1_USB2_PAD_SUSPEND1)); 1134 UNLOCK(flags); 1135 (void)MACIO_IN32(KEYLARGO_FCR1); 1136 mdelay(1); 1137 LOCK(flags); 1138 MACIO_BIS(KEYLARGO_FCR1, KL1_USB2_CELL_ENABLE); 1139 } 1140 if (number < 4) { 1141 reg = MACIO_IN32(KEYLARGO_FCR4); 1142 reg &= ~(KL4_PORT_WAKEUP_ENABLE(number) | KL4_PORT_RESUME_WAKE_EN(number) | 1143 KL4_PORT_CONNECT_WAKE_EN(number) | KL4_PORT_DISCONNECT_WAKE_EN(number)); 1144 reg &= ~(KL4_PORT_WAKEUP_ENABLE(number+1) | KL4_PORT_RESUME_WAKE_EN(number+1) | 1145 KL4_PORT_CONNECT_WAKE_EN(number+1) | KL4_PORT_DISCONNECT_WAKE_EN(number+1)); 1146 MACIO_OUT32(KEYLARGO_FCR4, reg); 1147 (void)MACIO_IN32(KEYLARGO_FCR4); 1148 udelay(10); 1149 } else { 1150 reg = MACIO_IN32(KEYLARGO_FCR3); 1151 reg &= ~(KL3_IT_PORT_WAKEUP_ENABLE(0) | KL3_IT_PORT_RESUME_WAKE_EN(0) | 1152 KL3_IT_PORT_CONNECT_WAKE_EN(0) | KL3_IT_PORT_DISCONNECT_WAKE_EN(0)); 1153 reg &= ~(KL3_IT_PORT_WAKEUP_ENABLE(1) | KL3_IT_PORT_RESUME_WAKE_EN(1) | 1154 KL3_IT_PORT_CONNECT_WAKE_EN(1) | KL3_IT_PORT_DISCONNECT_WAKE_EN(1)); 1155 MACIO_OUT32(KEYLARGO_FCR3, reg); 1156 (void)MACIO_IN32(KEYLARGO_FCR3); 1157 udelay(10); 1158 } 1159 if (macio->type == macio_intrepid) { 1160 /* wait for clock stopped bits to clear */ 1161 u32 test0 = 0, test1 = 0; 1162 u32 status0, status1; 1163 int timeout = 1000; 1164 1165 UNLOCK(flags); 1166 switch (number) { 1167 case 0: 1168 test0 = UNI_N_CLOCK_STOPPED_USB0; 1169 test1 = UNI_N_CLOCK_STOPPED_USB0PCI; 1170 break; 1171 case 2: 1172 test0 = UNI_N_CLOCK_STOPPED_USB1; 1173 test1 = UNI_N_CLOCK_STOPPED_USB1PCI; 1174 break; 1175 case 4: 1176 test0 = UNI_N_CLOCK_STOPPED_USB2; 1177 test1 = UNI_N_CLOCK_STOPPED_USB2PCI; 1178 break; 1179 } 1180 do { 1181 if (--timeout <= 0) { 1182 printk(KERN_ERR "core99_usb_enable: " 1183 "Timeout waiting for clocks\n"); 1184 break; 1185 } 1186 mdelay(1); 1187 status0 = UN_IN(UNI_N_CLOCK_STOP_STATUS0); 1188 status1 = UN_IN(UNI_N_CLOCK_STOP_STATUS1); 1189 } while ((status0 & test0) | (status1 & test1)); 1190 LOCK(flags); 1191 } 1192 } else { 1193 /* Turn OFF */ 1194 if (number < 4) { 1195 reg = MACIO_IN32(KEYLARGO_FCR4); 1196 reg |= KL4_PORT_WAKEUP_ENABLE(number) | KL4_PORT_RESUME_WAKE_EN(number) | 1197 KL4_PORT_CONNECT_WAKE_EN(number) | KL4_PORT_DISCONNECT_WAKE_EN(number); 1198 reg |= KL4_PORT_WAKEUP_ENABLE(number+1) | KL4_PORT_RESUME_WAKE_EN(number+1) | 1199 KL4_PORT_CONNECT_WAKE_EN(number+1) | KL4_PORT_DISCONNECT_WAKE_EN(number+1); 1200 MACIO_OUT32(KEYLARGO_FCR4, reg); 1201 (void)MACIO_IN32(KEYLARGO_FCR4); 1202 udelay(1); 1203 } else { 1204 reg = MACIO_IN32(KEYLARGO_FCR3); 1205 reg |= KL3_IT_PORT_WAKEUP_ENABLE(0) | KL3_IT_PORT_RESUME_WAKE_EN(0) | 1206 KL3_IT_PORT_CONNECT_WAKE_EN(0) | KL3_IT_PORT_DISCONNECT_WAKE_EN(0); 1207 reg |= KL3_IT_PORT_WAKEUP_ENABLE(1) | KL3_IT_PORT_RESUME_WAKE_EN(1) | 1208 KL3_IT_PORT_CONNECT_WAKE_EN(1) | KL3_IT_PORT_DISCONNECT_WAKE_EN(1); 1209 MACIO_OUT32(KEYLARGO_FCR3, reg); 1210 (void)MACIO_IN32(KEYLARGO_FCR3); 1211 udelay(1); 1212 } 1213 if (number == 0) { 1214 if (macio->type != macio_intrepid) 1215 MACIO_BIC(KEYLARGO_FCR0, KL0_USB0_CELL_ENABLE); 1216 (void)MACIO_IN32(KEYLARGO_FCR0); 1217 udelay(1); 1218 MACIO_BIS(KEYLARGO_FCR0, (KL0_USB0_PAD_SUSPEND0 | KL0_USB0_PAD_SUSPEND1)); 1219 (void)MACIO_IN32(KEYLARGO_FCR0); 1220 } else if (number == 2) { 1221 if (macio->type != macio_intrepid) 1222 MACIO_BIC(KEYLARGO_FCR0, KL0_USB1_CELL_ENABLE); 1223 (void)MACIO_IN32(KEYLARGO_FCR0); 1224 udelay(1); 1225 MACIO_BIS(KEYLARGO_FCR0, (KL0_USB1_PAD_SUSPEND0 | KL0_USB1_PAD_SUSPEND1)); 1226 (void)MACIO_IN32(KEYLARGO_FCR0); 1227 } else if (number == 4) { 1228 udelay(1); 1229 MACIO_BIS(KEYLARGO_FCR1, (KL1_USB2_PAD_SUSPEND0 | KL1_USB2_PAD_SUSPEND1)); 1230 (void)MACIO_IN32(KEYLARGO_FCR1); 1231 } 1232 udelay(1); 1233 } 1234 UNLOCK(flags); 1235 1236 return 0; 1237 } 1238 1239 static long 1240 core99_firewire_enable(struct device_node *node, long param, long value) 1241 { 1242 unsigned long flags; 1243 struct macio_chip *macio; 1244 1245 macio = &macio_chips[0]; 1246 if (macio->type != macio_keylargo && macio->type != macio_pangea && 1247 macio->type != macio_intrepid) 1248 return -ENODEV; 1249 if (!(macio->flags & MACIO_FLAG_FW_SUPPORTED)) 1250 return -ENODEV; 1251 1252 LOCK(flags); 1253 if (value) { 1254 UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_FW); 1255 (void)UN_IN(UNI_N_CLOCK_CNTL); 1256 } else { 1257 UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_FW); 1258 (void)UN_IN(UNI_N_CLOCK_CNTL); 1259 } 1260 UNLOCK(flags); 1261 mdelay(1); 1262 1263 return 0; 1264 } 1265 1266 static long 1267 core99_firewire_cable_power(struct device_node *node, long param, long value) 1268 { 1269 unsigned long flags; 1270 struct macio_chip *macio; 1271 1272 /* Trick: we allow NULL node */ 1273 if ((pmac_mb.board_flags & PMAC_MB_HAS_FW_POWER) == 0) 1274 return -ENODEV; 1275 macio = &macio_chips[0]; 1276 if (macio->type != macio_keylargo && macio->type != macio_pangea && 1277 macio->type != macio_intrepid) 1278 return -ENODEV; 1279 if (!(macio->flags & MACIO_FLAG_FW_SUPPORTED)) 1280 return -ENODEV; 1281 1282 LOCK(flags); 1283 if (value) { 1284 MACIO_OUT8(KL_GPIO_FW_CABLE_POWER , 0); 1285 MACIO_IN8(KL_GPIO_FW_CABLE_POWER); 1286 udelay(10); 1287 } else { 1288 MACIO_OUT8(KL_GPIO_FW_CABLE_POWER , 4); 1289 MACIO_IN8(KL_GPIO_FW_CABLE_POWER); udelay(10); 1290 } 1291 UNLOCK(flags); 1292 mdelay(1); 1293 1294 return 0; 1295 } 1296 1297 static long 1298 intrepid_aack_delay_enable(struct device_node *node, long param, long value) 1299 { 1300 unsigned long flags; 1301 1302 if (uninorth_rev < 0xd2) 1303 return -ENODEV; 1304 1305 LOCK(flags); 1306 if (param) 1307 UN_BIS(UNI_N_AACK_DELAY, UNI_N_AACK_DELAY_ENABLE); 1308 else 1309 UN_BIC(UNI_N_AACK_DELAY, UNI_N_AACK_DELAY_ENABLE); 1310 UNLOCK(flags); 1311 1312 return 0; 1313 } 1314 1315 1316 #endif /* CONFIG_POWER4 */ 1317 1318 static long 1319 core99_read_gpio(struct device_node *node, long param, long value) 1320 { 1321 struct macio_chip *macio = &macio_chips[0]; 1322 1323 return MACIO_IN8(param); 1324 } 1325 1326 1327 static long 1328 core99_write_gpio(struct device_node *node, long param, long value) 1329 { 1330 struct macio_chip *macio = &macio_chips[0]; 1331 1332 MACIO_OUT8(param, (u8)(value & 0xff)); 1333 return 0; 1334 } 1335 1336 #ifdef CONFIG_POWER4 1337 static long g5_gmac_enable(struct device_node *node, long param, long value) 1338 { 1339 struct macio_chip *macio = &macio_chips[0]; 1340 unsigned long flags; 1341 1342 if (node == NULL) 1343 return -ENODEV; 1344 1345 LOCK(flags); 1346 if (value) { 1347 MACIO_BIS(KEYLARGO_FCR1, K2_FCR1_GMAC_CLK_ENABLE); 1348 mb(); 1349 k2_skiplist[0] = NULL; 1350 } else { 1351 k2_skiplist[0] = node; 1352 mb(); 1353 MACIO_BIC(KEYLARGO_FCR1, K2_FCR1_GMAC_CLK_ENABLE); 1354 } 1355 1356 UNLOCK(flags); 1357 mdelay(1); 1358 1359 return 0; 1360 } 1361 1362 static long g5_fw_enable(struct device_node *node, long param, long value) 1363 { 1364 struct macio_chip *macio = &macio_chips[0]; 1365 unsigned long flags; 1366 1367 if (node == NULL) 1368 return -ENODEV; 1369 1370 LOCK(flags); 1371 if (value) { 1372 MACIO_BIS(KEYLARGO_FCR1, K2_FCR1_FW_CLK_ENABLE); 1373 mb(); 1374 k2_skiplist[1] = NULL; 1375 } else { 1376 k2_skiplist[1] = node; 1377 mb(); 1378 MACIO_BIC(KEYLARGO_FCR1, K2_FCR1_FW_CLK_ENABLE); 1379 } 1380 1381 UNLOCK(flags); 1382 mdelay(1); 1383 1384 return 0; 1385 } 1386 1387 static long g5_mpic_enable(struct device_node *node, long param, long value) 1388 { 1389 unsigned long flags; 1390 struct device_node *parent = of_get_parent(node); 1391 int is_u3; 1392 1393 if (parent == NULL) 1394 return 0; 1395 is_u3 = strcmp(parent->name, "u3") == 0 || 1396 strcmp(parent->name, "u4") == 0; 1397 of_node_put(parent); 1398 if (!is_u3) 1399 return 0; 1400 1401 LOCK(flags); 1402 UN_BIS(U3_TOGGLE_REG, U3_MPIC_RESET | U3_MPIC_OUTPUT_ENABLE); 1403 UNLOCK(flags); 1404 1405 return 0; 1406 } 1407 1408 static long g5_eth_phy_reset(struct device_node *node, long param, long value) 1409 { 1410 struct macio_chip *macio = &macio_chips[0]; 1411 struct device_node *phy; 1412 int need_reset; 1413 1414 /* 1415 * We must not reset the combo PHYs, only the BCM5221 found in 1416 * the iMac G5. 1417 */ 1418 phy = of_get_next_child(node, NULL); 1419 if (!phy) 1420 return -ENODEV; 1421 need_reset = device_is_compatible(phy, "B5221"); 1422 of_node_put(phy); 1423 if (!need_reset) 1424 return 0; 1425 1426 /* PHY reset is GPIO 29, not in device-tree unfortunately */ 1427 MACIO_OUT8(K2_GPIO_EXTINT_0 + 29, 1428 KEYLARGO_GPIO_OUTPUT_ENABLE | KEYLARGO_GPIO_OUTOUT_DATA); 1429 /* Thankfully, this is now always called at a time when we can 1430 * schedule by sungem. 1431 */ 1432 msleep(10); 1433 MACIO_OUT8(K2_GPIO_EXTINT_0 + 29, 0); 1434 1435 return 0; 1436 } 1437 1438 static long g5_i2s_enable(struct device_node *node, long param, long value) 1439 { 1440 /* Very crude implementation for now */ 1441 struct macio_chip *macio = &macio_chips[0]; 1442 unsigned long flags; 1443 int cell; 1444 u32 fcrs[3][3] = { 1445 { 0, 1446 K2_FCR1_I2S0_CELL_ENABLE | 1447 K2_FCR1_I2S0_CLK_ENABLE_BIT | K2_FCR1_I2S0_ENABLE, 1448 KL3_I2S0_CLK18_ENABLE 1449 }, 1450 { KL0_SCC_A_INTF_ENABLE, 1451 K2_FCR1_I2S1_CELL_ENABLE | 1452 K2_FCR1_I2S1_CLK_ENABLE_BIT | K2_FCR1_I2S1_ENABLE, 1453 KL3_I2S1_CLK18_ENABLE 1454 }, 1455 { KL0_SCC_B_INTF_ENABLE, 1456 SH_FCR1_I2S2_CELL_ENABLE | 1457 SH_FCR1_I2S2_CLK_ENABLE_BIT | SH_FCR1_I2S2_ENABLE, 1458 SH_FCR3_I2S2_CLK18_ENABLE 1459 }, 1460 }; 1461 1462 if (macio->type != macio_keylargo2 && macio->type != macio_shasta) 1463 return -ENODEV; 1464 if (strncmp(node->name, "i2s-", 4)) 1465 return -ENODEV; 1466 cell = node->name[4] - 'a'; 1467 switch(cell) { 1468 case 0: 1469 case 1: 1470 break; 1471 case 2: 1472 if (macio->type == macio_shasta) 1473 break; 1474 default: 1475 return -ENODEV; 1476 } 1477 1478 LOCK(flags); 1479 if (value) { 1480 MACIO_BIC(KEYLARGO_FCR0, fcrs[cell][0]); 1481 MACIO_BIS(KEYLARGO_FCR1, fcrs[cell][1]); 1482 MACIO_BIS(KEYLARGO_FCR3, fcrs[cell][2]); 1483 } else { 1484 MACIO_BIC(KEYLARGO_FCR3, fcrs[cell][2]); 1485 MACIO_BIC(KEYLARGO_FCR1, fcrs[cell][1]); 1486 MACIO_BIS(KEYLARGO_FCR0, fcrs[cell][0]); 1487 } 1488 udelay(10); 1489 UNLOCK(flags); 1490 1491 return 0; 1492 } 1493 1494 1495 #ifdef CONFIG_SMP 1496 static long g5_reset_cpu(struct device_node *node, long param, long value) 1497 { 1498 unsigned int reset_io = 0; 1499 unsigned long flags; 1500 struct macio_chip *macio; 1501 struct device_node *np; 1502 1503 macio = &macio_chips[0]; 1504 if (macio->type != macio_keylargo2 && macio->type != macio_shasta) 1505 return -ENODEV; 1506 1507 np = find_path_device("/cpus"); 1508 if (np == NULL) 1509 return -ENODEV; 1510 for (np = np->child; np != NULL; np = np->sibling) { 1511 u32 *num = (u32 *)get_property(np, "reg", NULL); 1512 u32 *rst = (u32 *)get_property(np, "soft-reset", NULL); 1513 if (num == NULL || rst == NULL) 1514 continue; 1515 if (param == *num) { 1516 reset_io = *rst; 1517 break; 1518 } 1519 } 1520 if (np == NULL || reset_io == 0) 1521 return -ENODEV; 1522 1523 LOCK(flags); 1524 MACIO_OUT8(reset_io, KEYLARGO_GPIO_OUTPUT_ENABLE); 1525 (void)MACIO_IN8(reset_io); 1526 udelay(1); 1527 MACIO_OUT8(reset_io, 0); 1528 (void)MACIO_IN8(reset_io); 1529 UNLOCK(flags); 1530 1531 return 0; 1532 } 1533 #endif /* CONFIG_SMP */ 1534 1535 /* 1536 * This can be called from pmac_smp so isn't static 1537 * 1538 * This takes the second CPU off the bus on dual CPU machines 1539 * running UP 1540 */ 1541 void g5_phy_disable_cpu1(void) 1542 { 1543 if (uninorth_maj == 3) 1544 UN_OUT(U3_API_PHY_CONFIG_1, 0); 1545 } 1546 #endif /* CONFIG_POWER4 */ 1547 1548 #ifndef CONFIG_POWER4 1549 1550 1551 #ifdef CONFIG_PM 1552 1553 static void keylargo_shutdown(struct macio_chip *macio, int sleep_mode) 1554 { 1555 u32 temp; 1556 1557 if (sleep_mode) { 1558 mdelay(1); 1559 MACIO_BIS(KEYLARGO_FCR0, KL0_USB_REF_SUSPEND); 1560 (void)MACIO_IN32(KEYLARGO_FCR0); 1561 mdelay(1); 1562 } 1563 1564 MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE | 1565 KL0_SCC_CELL_ENABLE | 1566 KL0_IRDA_ENABLE | KL0_IRDA_CLK32_ENABLE | 1567 KL0_IRDA_CLK19_ENABLE); 1568 1569 MACIO_BIC(KEYLARGO_MBCR, KL_MBCR_MB0_DEV_MASK); 1570 MACIO_BIS(KEYLARGO_MBCR, KL_MBCR_MB0_IDE_ENABLE); 1571 1572 MACIO_BIC(KEYLARGO_FCR1, 1573 KL1_AUDIO_SEL_22MCLK | KL1_AUDIO_CLK_ENABLE_BIT | 1574 KL1_AUDIO_CLK_OUT_ENABLE | KL1_AUDIO_CELL_ENABLE | 1575 KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT | 1576 KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE | 1577 KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE | 1578 KL1_EIDE0_ENABLE | KL1_EIDE0_RESET_N | 1579 KL1_EIDE1_ENABLE | KL1_EIDE1_RESET_N | 1580 KL1_UIDE_ENABLE); 1581 1582 MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT); 1583 MACIO_BIC(KEYLARGO_FCR2, KL2_IOBUS_ENABLE); 1584 1585 temp = MACIO_IN32(KEYLARGO_FCR3); 1586 if (macio->rev >= 2) { 1587 temp |= KL3_SHUTDOWN_PLL2X; 1588 if (sleep_mode) 1589 temp |= KL3_SHUTDOWN_PLL_TOTAL; 1590 } 1591 1592 temp |= KL3_SHUTDOWN_PLLKW6 | KL3_SHUTDOWN_PLLKW4 | 1593 KL3_SHUTDOWN_PLLKW35; 1594 if (sleep_mode) 1595 temp |= KL3_SHUTDOWN_PLLKW12; 1596 temp &= ~(KL3_CLK66_ENABLE | KL3_CLK49_ENABLE | KL3_CLK45_ENABLE 1597 | KL3_CLK31_ENABLE | KL3_I2S1_CLK18_ENABLE | KL3_I2S0_CLK18_ENABLE); 1598 if (sleep_mode) 1599 temp &= ~(KL3_TIMER_CLK18_ENABLE | KL3_VIA_CLK16_ENABLE); 1600 MACIO_OUT32(KEYLARGO_FCR3, temp); 1601 1602 /* Flush posted writes & wait a bit */ 1603 (void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1); 1604 } 1605 1606 static void pangea_shutdown(struct macio_chip *macio, int sleep_mode) 1607 { 1608 u32 temp; 1609 1610 MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE | 1611 KL0_SCC_CELL_ENABLE | 1612 KL0_USB0_CELL_ENABLE | KL0_USB1_CELL_ENABLE); 1613 1614 MACIO_BIC(KEYLARGO_FCR1, 1615 KL1_AUDIO_SEL_22MCLK | KL1_AUDIO_CLK_ENABLE_BIT | 1616 KL1_AUDIO_CLK_OUT_ENABLE | KL1_AUDIO_CELL_ENABLE | 1617 KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT | 1618 KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE | 1619 KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE | 1620 KL1_UIDE_ENABLE); 1621 if (pmac_mb.board_flags & PMAC_MB_MOBILE) 1622 MACIO_BIC(KEYLARGO_FCR1, KL1_UIDE_RESET_N); 1623 1624 MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT); 1625 1626 temp = MACIO_IN32(KEYLARGO_FCR3); 1627 temp |= KL3_SHUTDOWN_PLLKW6 | KL3_SHUTDOWN_PLLKW4 | 1628 KL3_SHUTDOWN_PLLKW35; 1629 temp &= ~(KL3_CLK49_ENABLE | KL3_CLK45_ENABLE | KL3_CLK31_ENABLE 1630 | KL3_I2S0_CLK18_ENABLE | KL3_I2S1_CLK18_ENABLE); 1631 if (sleep_mode) 1632 temp &= ~(KL3_VIA_CLK16_ENABLE | KL3_TIMER_CLK18_ENABLE); 1633 MACIO_OUT32(KEYLARGO_FCR3, temp); 1634 1635 /* Flush posted writes & wait a bit */ 1636 (void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1); 1637 } 1638 1639 static void intrepid_shutdown(struct macio_chip *macio, int sleep_mode) 1640 { 1641 u32 temp; 1642 1643 MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE | 1644 KL0_SCC_CELL_ENABLE); 1645 1646 MACIO_BIC(KEYLARGO_FCR1, 1647 KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT | 1648 KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE | 1649 KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE | 1650 KL1_EIDE0_ENABLE); 1651 if (pmac_mb.board_flags & PMAC_MB_MOBILE) 1652 MACIO_BIC(KEYLARGO_FCR1, KL1_UIDE_RESET_N); 1653 1654 temp = MACIO_IN32(KEYLARGO_FCR3); 1655 temp &= ~(KL3_CLK49_ENABLE | KL3_CLK45_ENABLE | 1656 KL3_I2S1_CLK18_ENABLE | KL3_I2S0_CLK18_ENABLE); 1657 if (sleep_mode) 1658 temp &= ~(KL3_TIMER_CLK18_ENABLE | KL3_IT_VIA_CLK32_ENABLE); 1659 MACIO_OUT32(KEYLARGO_FCR3, temp); 1660 1661 /* Flush posted writes & wait a bit */ 1662 (void)MACIO_IN32(KEYLARGO_FCR0); 1663 mdelay(10); 1664 } 1665 1666 1667 static int 1668 core99_sleep(void) 1669 { 1670 struct macio_chip *macio; 1671 int i; 1672 1673 macio = &macio_chips[0]; 1674 if (macio->type != macio_keylargo && macio->type != macio_pangea && 1675 macio->type != macio_intrepid) 1676 return -ENODEV; 1677 1678 /* We power off the wireless slot in case it was not done 1679 * by the driver. We don't power it on automatically however 1680 */ 1681 if (macio->flags & MACIO_FLAG_AIRPORT_ON) 1682 core99_airport_enable(macio->of_node, 0, 0); 1683 1684 /* We power off the FW cable. Should be done by the driver... */ 1685 if (macio->flags & MACIO_FLAG_FW_SUPPORTED) { 1686 core99_firewire_enable(NULL, 0, 0); 1687 core99_firewire_cable_power(NULL, 0, 0); 1688 } 1689 1690 /* We make sure int. modem is off (in case driver lost it) */ 1691 if (macio->type == macio_keylargo) 1692 core99_modem_enable(macio->of_node, 0, 0); 1693 else 1694 pangea_modem_enable(macio->of_node, 0, 0); 1695 1696 /* We make sure the sound is off as well */ 1697 core99_sound_chip_enable(macio->of_node, 0, 0); 1698 1699 /* 1700 * Save various bits of KeyLargo 1701 */ 1702 1703 /* Save the state of the various GPIOs */ 1704 save_gpio_levels[0] = MACIO_IN32(KEYLARGO_GPIO_LEVELS0); 1705 save_gpio_levels[1] = MACIO_IN32(KEYLARGO_GPIO_LEVELS1); 1706 for (i=0; i<KEYLARGO_GPIO_EXTINT_CNT; i++) 1707 save_gpio_extint[i] = MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+i); 1708 for (i=0; i<KEYLARGO_GPIO_CNT; i++) 1709 save_gpio_normal[i] = MACIO_IN8(KEYLARGO_GPIO_0+i); 1710 1711 /* Save the FCRs */ 1712 if (macio->type == macio_keylargo) 1713 save_mbcr = MACIO_IN32(KEYLARGO_MBCR); 1714 save_fcr[0] = MACIO_IN32(KEYLARGO_FCR0); 1715 save_fcr[1] = MACIO_IN32(KEYLARGO_FCR1); 1716 save_fcr[2] = MACIO_IN32(KEYLARGO_FCR2); 1717 save_fcr[3] = MACIO_IN32(KEYLARGO_FCR3); 1718 save_fcr[4] = MACIO_IN32(KEYLARGO_FCR4); 1719 if (macio->type == macio_pangea || macio->type == macio_intrepid) 1720 save_fcr[5] = MACIO_IN32(KEYLARGO_FCR5); 1721 1722 /* Save state & config of DBDMA channels */ 1723 dbdma_save(macio, save_dbdma); 1724 1725 /* 1726 * Turn off as much as we can 1727 */ 1728 if (macio->type == macio_pangea) 1729 pangea_shutdown(macio, 1); 1730 else if (macio->type == macio_intrepid) 1731 intrepid_shutdown(macio, 1); 1732 else if (macio->type == macio_keylargo) 1733 keylargo_shutdown(macio, 1); 1734 1735 /* 1736 * Put the host bridge to sleep 1737 */ 1738 1739 save_unin_clock_ctl = UN_IN(UNI_N_CLOCK_CNTL); 1740 /* Note: do not switch GMAC off, driver does it when necessary, WOL must keep it 1741 * enabled ! 1742 */ 1743 UN_OUT(UNI_N_CLOCK_CNTL, save_unin_clock_ctl & 1744 ~(/*UNI_N_CLOCK_CNTL_GMAC|*/UNI_N_CLOCK_CNTL_FW/*|UNI_N_CLOCK_CNTL_PCI*/)); 1745 udelay(100); 1746 UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_SLEEPING); 1747 UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_SLEEP); 1748 mdelay(10); 1749 1750 /* 1751 * FIXME: A bit of black magic with OpenPIC (don't ask me why) 1752 */ 1753 if (pmac_mb.model_id == PMAC_TYPE_SAWTOOTH) { 1754 MACIO_BIS(0x506e0, 0x00400000); 1755 MACIO_BIS(0x506e0, 0x80000000); 1756 } 1757 return 0; 1758 } 1759 1760 static int 1761 core99_wake_up(void) 1762 { 1763 struct macio_chip *macio; 1764 int i; 1765 1766 macio = &macio_chips[0]; 1767 if (macio->type != macio_keylargo && macio->type != macio_pangea && 1768 macio->type != macio_intrepid) 1769 return -ENODEV; 1770 1771 /* 1772 * Wakeup the host bridge 1773 */ 1774 UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_NORMAL); 1775 udelay(10); 1776 UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_RUNNING); 1777 udelay(10); 1778 1779 /* 1780 * Restore KeyLargo 1781 */ 1782 1783 if (macio->type == macio_keylargo) { 1784 MACIO_OUT32(KEYLARGO_MBCR, save_mbcr); 1785 (void)MACIO_IN32(KEYLARGO_MBCR); udelay(10); 1786 } 1787 MACIO_OUT32(KEYLARGO_FCR0, save_fcr[0]); 1788 (void)MACIO_IN32(KEYLARGO_FCR0); udelay(10); 1789 MACIO_OUT32(KEYLARGO_FCR1, save_fcr[1]); 1790 (void)MACIO_IN32(KEYLARGO_FCR1); udelay(10); 1791 MACIO_OUT32(KEYLARGO_FCR2, save_fcr[2]); 1792 (void)MACIO_IN32(KEYLARGO_FCR2); udelay(10); 1793 MACIO_OUT32(KEYLARGO_FCR3, save_fcr[3]); 1794 (void)MACIO_IN32(KEYLARGO_FCR3); udelay(10); 1795 MACIO_OUT32(KEYLARGO_FCR4, save_fcr[4]); 1796 (void)MACIO_IN32(KEYLARGO_FCR4); udelay(10); 1797 if (macio->type == macio_pangea || macio->type == macio_intrepid) { 1798 MACIO_OUT32(KEYLARGO_FCR5, save_fcr[5]); 1799 (void)MACIO_IN32(KEYLARGO_FCR5); udelay(10); 1800 } 1801 1802 dbdma_restore(macio, save_dbdma); 1803 1804 MACIO_OUT32(KEYLARGO_GPIO_LEVELS0, save_gpio_levels[0]); 1805 MACIO_OUT32(KEYLARGO_GPIO_LEVELS1, save_gpio_levels[1]); 1806 for (i=0; i<KEYLARGO_GPIO_EXTINT_CNT; i++) 1807 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+i, save_gpio_extint[i]); 1808 for (i=0; i<KEYLARGO_GPIO_CNT; i++) 1809 MACIO_OUT8(KEYLARGO_GPIO_0+i, save_gpio_normal[i]); 1810 1811 /* FIXME more black magic with OpenPIC ... */ 1812 if (pmac_mb.model_id == PMAC_TYPE_SAWTOOTH) { 1813 MACIO_BIC(0x506e0, 0x00400000); 1814 MACIO_BIC(0x506e0, 0x80000000); 1815 } 1816 1817 UN_OUT(UNI_N_CLOCK_CNTL, save_unin_clock_ctl); 1818 udelay(100); 1819 1820 return 0; 1821 } 1822 1823 #endif /* CONFIG_PM */ 1824 1825 static long 1826 core99_sleep_state(struct device_node *node, long param, long value) 1827 { 1828 /* Param == 1 means to enter the "fake sleep" mode that is 1829 * used for CPU speed switch 1830 */ 1831 if (param == 1) { 1832 if (value == 1) { 1833 UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_SLEEPING); 1834 UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_IDLE2); 1835 } else { 1836 UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_NORMAL); 1837 udelay(10); 1838 UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_RUNNING); 1839 udelay(10); 1840 } 1841 return 0; 1842 } 1843 if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0) 1844 return -EPERM; 1845 1846 #ifdef CONFIG_PM 1847 if (value == 1) 1848 return core99_sleep(); 1849 else if (value == 0) 1850 return core99_wake_up(); 1851 1852 #endif /* CONFIG_PM */ 1853 return 0; 1854 } 1855 1856 #endif /* CONFIG_POWER4 */ 1857 1858 static long 1859 generic_dev_can_wake(struct device_node *node, long param, long value) 1860 { 1861 /* Todo: eventually check we are really dealing with on-board 1862 * video device ... 1863 */ 1864 1865 if (pmac_mb.board_flags & PMAC_MB_MAY_SLEEP) 1866 pmac_mb.board_flags |= PMAC_MB_CAN_SLEEP; 1867 return 0; 1868 } 1869 1870 static long generic_get_mb_info(struct device_node *node, long param, long value) 1871 { 1872 switch(param) { 1873 case PMAC_MB_INFO_MODEL: 1874 return pmac_mb.model_id; 1875 case PMAC_MB_INFO_FLAGS: 1876 return pmac_mb.board_flags; 1877 case PMAC_MB_INFO_NAME: 1878 /* hack hack hack... but should work */ 1879 *((const char **)value) = pmac_mb.model_name; 1880 return 0; 1881 } 1882 return -EINVAL; 1883 } 1884 1885 1886 /* 1887 * Table definitions 1888 */ 1889 1890 /* Used on any machine 1891 */ 1892 static struct feature_table_entry any_features[] = { 1893 { PMAC_FTR_GET_MB_INFO, generic_get_mb_info }, 1894 { PMAC_FTR_DEVICE_CAN_WAKE, generic_dev_can_wake }, 1895 { 0, NULL } 1896 }; 1897 1898 #ifndef CONFIG_POWER4 1899 1900 /* OHare based motherboards. Currently, we only use these on the 1901 * 2400,3400 and 3500 series powerbooks. Some older desktops seem 1902 * to have issues with turning on/off those asic cells 1903 */ 1904 static struct feature_table_entry ohare_features[] = { 1905 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable }, 1906 { PMAC_FTR_SWIM3_ENABLE, ohare_floppy_enable }, 1907 { PMAC_FTR_MESH_ENABLE, ohare_mesh_enable }, 1908 { PMAC_FTR_IDE_ENABLE, ohare_ide_enable}, 1909 { PMAC_FTR_IDE_RESET, ohare_ide_reset}, 1910 { PMAC_FTR_SLEEP_STATE, ohare_sleep_state }, 1911 { 0, NULL } 1912 }; 1913 1914 /* Heathrow desktop machines (Beige G3). 1915 * Separated as some features couldn't be properly tested 1916 * and the serial port control bits appear to confuse it. 1917 */ 1918 static struct feature_table_entry heathrow_desktop_features[] = { 1919 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable }, 1920 { PMAC_FTR_MESH_ENABLE, heathrow_mesh_enable }, 1921 { PMAC_FTR_IDE_ENABLE, heathrow_ide_enable }, 1922 { PMAC_FTR_IDE_RESET, heathrow_ide_reset }, 1923 { PMAC_FTR_BMAC_ENABLE, heathrow_bmac_enable }, 1924 { 0, NULL } 1925 }; 1926 1927 /* Heathrow based laptop, that is the Wallstreet and mainstreet 1928 * powerbooks. 1929 */ 1930 static struct feature_table_entry heathrow_laptop_features[] = { 1931 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable }, 1932 { PMAC_FTR_MODEM_ENABLE, heathrow_modem_enable }, 1933 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable }, 1934 { PMAC_FTR_MESH_ENABLE, heathrow_mesh_enable }, 1935 { PMAC_FTR_IDE_ENABLE, heathrow_ide_enable }, 1936 { PMAC_FTR_IDE_RESET, heathrow_ide_reset }, 1937 { PMAC_FTR_BMAC_ENABLE, heathrow_bmac_enable }, 1938 { PMAC_FTR_SOUND_CHIP_ENABLE, heathrow_sound_enable }, 1939 { PMAC_FTR_SLEEP_STATE, heathrow_sleep_state }, 1940 { 0, NULL } 1941 }; 1942 1943 /* Paddington based machines 1944 * The lombard (101) powerbook, first iMac models, B&W G3 and Yikes G4. 1945 */ 1946 static struct feature_table_entry paddington_features[] = { 1947 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable }, 1948 { PMAC_FTR_MODEM_ENABLE, heathrow_modem_enable }, 1949 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable }, 1950 { PMAC_FTR_MESH_ENABLE, heathrow_mesh_enable }, 1951 { PMAC_FTR_IDE_ENABLE, heathrow_ide_enable }, 1952 { PMAC_FTR_IDE_RESET, heathrow_ide_reset }, 1953 { PMAC_FTR_BMAC_ENABLE, heathrow_bmac_enable }, 1954 { PMAC_FTR_SOUND_CHIP_ENABLE, heathrow_sound_enable }, 1955 { PMAC_FTR_SLEEP_STATE, heathrow_sleep_state }, 1956 { 0, NULL } 1957 }; 1958 1959 /* Core99 & MacRISC 2 machines (all machines released since the 1960 * iBook (included), that is all AGP machines, except pangea 1961 * chipset. The pangea chipset is the "combo" UniNorth/KeyLargo 1962 * used on iBook2 & iMac "flow power". 1963 */ 1964 static struct feature_table_entry core99_features[] = { 1965 { PMAC_FTR_SCC_ENABLE, core99_scc_enable }, 1966 { PMAC_FTR_MODEM_ENABLE, core99_modem_enable }, 1967 { PMAC_FTR_IDE_ENABLE, core99_ide_enable }, 1968 { PMAC_FTR_IDE_RESET, core99_ide_reset }, 1969 { PMAC_FTR_GMAC_ENABLE, core99_gmac_enable }, 1970 { PMAC_FTR_GMAC_PHY_RESET, core99_gmac_phy_reset }, 1971 { PMAC_FTR_SOUND_CHIP_ENABLE, core99_sound_chip_enable }, 1972 { PMAC_FTR_AIRPORT_ENABLE, core99_airport_enable }, 1973 { PMAC_FTR_USB_ENABLE, core99_usb_enable }, 1974 { PMAC_FTR_1394_ENABLE, core99_firewire_enable }, 1975 { PMAC_FTR_1394_CABLE_POWER, core99_firewire_cable_power }, 1976 #ifdef CONFIG_PM 1977 { PMAC_FTR_SLEEP_STATE, core99_sleep_state }, 1978 #endif 1979 #ifdef CONFIG_SMP 1980 { PMAC_FTR_RESET_CPU, core99_reset_cpu }, 1981 #endif /* CONFIG_SMP */ 1982 { PMAC_FTR_READ_GPIO, core99_read_gpio }, 1983 { PMAC_FTR_WRITE_GPIO, core99_write_gpio }, 1984 { 0, NULL } 1985 }; 1986 1987 /* RackMac 1988 */ 1989 static struct feature_table_entry rackmac_features[] = { 1990 { PMAC_FTR_SCC_ENABLE, core99_scc_enable }, 1991 { PMAC_FTR_IDE_ENABLE, core99_ide_enable }, 1992 { PMAC_FTR_IDE_RESET, core99_ide_reset }, 1993 { PMAC_FTR_GMAC_ENABLE, core99_gmac_enable }, 1994 { PMAC_FTR_GMAC_PHY_RESET, core99_gmac_phy_reset }, 1995 { PMAC_FTR_USB_ENABLE, core99_usb_enable }, 1996 { PMAC_FTR_1394_ENABLE, core99_firewire_enable }, 1997 { PMAC_FTR_1394_CABLE_POWER, core99_firewire_cable_power }, 1998 { PMAC_FTR_SLEEP_STATE, core99_sleep_state }, 1999 #ifdef CONFIG_SMP 2000 { PMAC_FTR_RESET_CPU, core99_reset_cpu }, 2001 #endif /* CONFIG_SMP */ 2002 { PMAC_FTR_READ_GPIO, core99_read_gpio }, 2003 { PMAC_FTR_WRITE_GPIO, core99_write_gpio }, 2004 { 0, NULL } 2005 }; 2006 2007 /* Pangea features 2008 */ 2009 static struct feature_table_entry pangea_features[] = { 2010 { PMAC_FTR_SCC_ENABLE, core99_scc_enable }, 2011 { PMAC_FTR_MODEM_ENABLE, pangea_modem_enable }, 2012 { PMAC_FTR_IDE_ENABLE, core99_ide_enable }, 2013 { PMAC_FTR_IDE_RESET, core99_ide_reset }, 2014 { PMAC_FTR_GMAC_ENABLE, core99_gmac_enable }, 2015 { PMAC_FTR_GMAC_PHY_RESET, core99_gmac_phy_reset }, 2016 { PMAC_FTR_SOUND_CHIP_ENABLE, core99_sound_chip_enable }, 2017 { PMAC_FTR_AIRPORT_ENABLE, core99_airport_enable }, 2018 { PMAC_FTR_USB_ENABLE, core99_usb_enable }, 2019 { PMAC_FTR_1394_ENABLE, core99_firewire_enable }, 2020 { PMAC_FTR_1394_CABLE_POWER, core99_firewire_cable_power }, 2021 { PMAC_FTR_SLEEP_STATE, core99_sleep_state }, 2022 { PMAC_FTR_READ_GPIO, core99_read_gpio }, 2023 { PMAC_FTR_WRITE_GPIO, core99_write_gpio }, 2024 { 0, NULL } 2025 }; 2026 2027 /* Intrepid features 2028 */ 2029 static struct feature_table_entry intrepid_features[] = { 2030 { PMAC_FTR_SCC_ENABLE, core99_scc_enable }, 2031 { PMAC_FTR_MODEM_ENABLE, pangea_modem_enable }, 2032 { PMAC_FTR_IDE_ENABLE, core99_ide_enable }, 2033 { PMAC_FTR_IDE_RESET, core99_ide_reset }, 2034 { PMAC_FTR_GMAC_ENABLE, core99_gmac_enable }, 2035 { PMAC_FTR_GMAC_PHY_RESET, core99_gmac_phy_reset }, 2036 { PMAC_FTR_SOUND_CHIP_ENABLE, core99_sound_chip_enable }, 2037 { PMAC_FTR_AIRPORT_ENABLE, core99_airport_enable }, 2038 { PMAC_FTR_USB_ENABLE, core99_usb_enable }, 2039 { PMAC_FTR_1394_ENABLE, core99_firewire_enable }, 2040 { PMAC_FTR_1394_CABLE_POWER, core99_firewire_cable_power }, 2041 { PMAC_FTR_SLEEP_STATE, core99_sleep_state }, 2042 { PMAC_FTR_READ_GPIO, core99_read_gpio }, 2043 { PMAC_FTR_WRITE_GPIO, core99_write_gpio }, 2044 { PMAC_FTR_AACK_DELAY_ENABLE, intrepid_aack_delay_enable }, 2045 { 0, NULL } 2046 }; 2047 2048 #else /* CONFIG_POWER4 */ 2049 2050 /* G5 features 2051 */ 2052 static struct feature_table_entry g5_features[] = { 2053 { PMAC_FTR_GMAC_ENABLE, g5_gmac_enable }, 2054 { PMAC_FTR_1394_ENABLE, g5_fw_enable }, 2055 { PMAC_FTR_ENABLE_MPIC, g5_mpic_enable }, 2056 { PMAC_FTR_GMAC_PHY_RESET, g5_eth_phy_reset }, 2057 { PMAC_FTR_SOUND_CHIP_ENABLE, g5_i2s_enable }, 2058 #ifdef CONFIG_SMP 2059 { PMAC_FTR_RESET_CPU, g5_reset_cpu }, 2060 #endif /* CONFIG_SMP */ 2061 { PMAC_FTR_READ_GPIO, core99_read_gpio }, 2062 { PMAC_FTR_WRITE_GPIO, core99_write_gpio }, 2063 { 0, NULL } 2064 }; 2065 2066 #endif /* CONFIG_POWER4 */ 2067 2068 static struct pmac_mb_def pmac_mb_defs[] = { 2069 #ifndef CONFIG_POWER4 2070 /* 2071 * Desktops 2072 */ 2073 2074 { "AAPL,8500", "PowerMac 8500/8600", 2075 PMAC_TYPE_PSURGE, NULL, 2076 0 2077 }, 2078 { "AAPL,9500", "PowerMac 9500/9600", 2079 PMAC_TYPE_PSURGE, NULL, 2080 0 2081 }, 2082 { "AAPL,7200", "PowerMac 7200", 2083 PMAC_TYPE_PSURGE, NULL, 2084 0 2085 }, 2086 { "AAPL,7300", "PowerMac 7200/7300", 2087 PMAC_TYPE_PSURGE, NULL, 2088 0 2089 }, 2090 { "AAPL,7500", "PowerMac 7500", 2091 PMAC_TYPE_PSURGE, NULL, 2092 0 2093 }, 2094 { "AAPL,ShinerESB", "Apple Network Server", 2095 PMAC_TYPE_ANS, NULL, 2096 0 2097 }, 2098 { "AAPL,e407", "Alchemy", 2099 PMAC_TYPE_ALCHEMY, NULL, 2100 0 2101 }, 2102 { "AAPL,e411", "Gazelle", 2103 PMAC_TYPE_GAZELLE, NULL, 2104 0 2105 }, 2106 { "AAPL,Gossamer", "PowerMac G3 (Gossamer)", 2107 PMAC_TYPE_GOSSAMER, heathrow_desktop_features, 2108 0 2109 }, 2110 { "AAPL,PowerMac G3", "PowerMac G3 (Silk)", 2111 PMAC_TYPE_SILK, heathrow_desktop_features, 2112 0 2113 }, 2114 { "PowerMac1,1", "Blue&White G3", 2115 PMAC_TYPE_YOSEMITE, paddington_features, 2116 0 2117 }, 2118 { "PowerMac1,2", "PowerMac G4 PCI Graphics", 2119 PMAC_TYPE_YIKES, paddington_features, 2120 0 2121 }, 2122 { "PowerMac2,1", "iMac FireWire", 2123 PMAC_TYPE_FW_IMAC, core99_features, 2124 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99 2125 }, 2126 { "PowerMac2,2", "iMac FireWire", 2127 PMAC_TYPE_FW_IMAC, core99_features, 2128 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99 2129 }, 2130 { "PowerMac3,1", "PowerMac G4 AGP Graphics", 2131 PMAC_TYPE_SAWTOOTH, core99_features, 2132 PMAC_MB_OLD_CORE99 2133 }, 2134 { "PowerMac3,2", "PowerMac G4 AGP Graphics", 2135 PMAC_TYPE_SAWTOOTH, core99_features, 2136 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99 2137 }, 2138 { "PowerMac3,3", "PowerMac G4 AGP Graphics", 2139 PMAC_TYPE_SAWTOOTH, core99_features, 2140 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99 2141 }, 2142 { "PowerMac3,4", "PowerMac G4 Silver", 2143 PMAC_TYPE_QUICKSILVER, core99_features, 2144 PMAC_MB_MAY_SLEEP 2145 }, 2146 { "PowerMac3,5", "PowerMac G4 Silver", 2147 PMAC_TYPE_QUICKSILVER, core99_features, 2148 PMAC_MB_MAY_SLEEP 2149 }, 2150 { "PowerMac3,6", "PowerMac G4 Windtunnel", 2151 PMAC_TYPE_WINDTUNNEL, core99_features, 2152 PMAC_MB_MAY_SLEEP, 2153 }, 2154 { "PowerMac4,1", "iMac \"Flower Power\"", 2155 PMAC_TYPE_PANGEA_IMAC, pangea_features, 2156 PMAC_MB_MAY_SLEEP 2157 }, 2158 { "PowerMac4,2", "Flat panel iMac", 2159 PMAC_TYPE_FLAT_PANEL_IMAC, pangea_features, 2160 PMAC_MB_CAN_SLEEP 2161 }, 2162 { "PowerMac4,4", "eMac", 2163 PMAC_TYPE_EMAC, core99_features, 2164 PMAC_MB_MAY_SLEEP 2165 }, 2166 { "PowerMac5,1", "PowerMac G4 Cube", 2167 PMAC_TYPE_CUBE, core99_features, 2168 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99 2169 }, 2170 { "PowerMac6,1", "Flat panel iMac", 2171 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2172 PMAC_MB_MAY_SLEEP, 2173 }, 2174 { "PowerMac6,3", "Flat panel iMac", 2175 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2176 PMAC_MB_MAY_SLEEP, 2177 }, 2178 { "PowerMac6,4", "eMac", 2179 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2180 PMAC_MB_MAY_SLEEP, 2181 }, 2182 { "PowerMac10,1", "Mac mini", 2183 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2184 PMAC_MB_MAY_SLEEP, 2185 }, 2186 { "iMac,1", "iMac (first generation)", 2187 PMAC_TYPE_ORIG_IMAC, paddington_features, 2188 0 2189 }, 2190 2191 /* 2192 * Xserve's 2193 */ 2194 2195 { "RackMac1,1", "XServe", 2196 PMAC_TYPE_RACKMAC, rackmac_features, 2197 0, 2198 }, 2199 { "RackMac1,2", "XServe rev. 2", 2200 PMAC_TYPE_RACKMAC, rackmac_features, 2201 0, 2202 }, 2203 2204 /* 2205 * Laptops 2206 */ 2207 2208 { "AAPL,3400/2400", "PowerBook 3400", 2209 PMAC_TYPE_HOOPER, ohare_features, 2210 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE 2211 }, 2212 { "AAPL,3500", "PowerBook 3500", 2213 PMAC_TYPE_KANGA, ohare_features, 2214 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE 2215 }, 2216 { "AAPL,PowerBook1998", "PowerBook Wallstreet", 2217 PMAC_TYPE_WALLSTREET, heathrow_laptop_features, 2218 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE 2219 }, 2220 { "PowerBook1,1", "PowerBook 101 (Lombard)", 2221 PMAC_TYPE_101_PBOOK, paddington_features, 2222 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE 2223 }, 2224 { "PowerBook2,1", "iBook (first generation)", 2225 PMAC_TYPE_ORIG_IBOOK, core99_features, 2226 PMAC_MB_CAN_SLEEP | PMAC_MB_OLD_CORE99 | PMAC_MB_MOBILE 2227 }, 2228 { "PowerBook2,2", "iBook FireWire", 2229 PMAC_TYPE_FW_IBOOK, core99_features, 2230 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | 2231 PMAC_MB_OLD_CORE99 | PMAC_MB_MOBILE 2232 }, 2233 { "PowerBook3,1", "PowerBook Pismo", 2234 PMAC_TYPE_PISMO, core99_features, 2235 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | 2236 PMAC_MB_OLD_CORE99 | PMAC_MB_MOBILE 2237 }, 2238 { "PowerBook3,2", "PowerBook Titanium", 2239 PMAC_TYPE_TITANIUM, core99_features, 2240 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE 2241 }, 2242 { "PowerBook3,3", "PowerBook Titanium II", 2243 PMAC_TYPE_TITANIUM2, core99_features, 2244 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE 2245 }, 2246 { "PowerBook3,4", "PowerBook Titanium III", 2247 PMAC_TYPE_TITANIUM3, core99_features, 2248 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE 2249 }, 2250 { "PowerBook3,5", "PowerBook Titanium IV", 2251 PMAC_TYPE_TITANIUM4, core99_features, 2252 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE 2253 }, 2254 { "PowerBook4,1", "iBook 2", 2255 PMAC_TYPE_IBOOK2, pangea_features, 2256 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE 2257 }, 2258 { "PowerBook4,2", "iBook 2", 2259 PMAC_TYPE_IBOOK2, pangea_features, 2260 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE 2261 }, 2262 { "PowerBook4,3", "iBook 2 rev. 2", 2263 PMAC_TYPE_IBOOK2, pangea_features, 2264 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE 2265 }, 2266 { "PowerBook5,1", "PowerBook G4 17\"", 2267 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2268 PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, 2269 }, 2270 { "PowerBook5,2", "PowerBook G4 15\"", 2271 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2272 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, 2273 }, 2274 { "PowerBook5,3", "PowerBook G4 17\"", 2275 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2276 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, 2277 }, 2278 { "PowerBook5,4", "PowerBook G4 15\"", 2279 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2280 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, 2281 }, 2282 { "PowerBook5,5", "PowerBook G4 17\"", 2283 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2284 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, 2285 }, 2286 { "PowerBook5,6", "PowerBook G4 15\"", 2287 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2288 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, 2289 }, 2290 { "PowerBook5,7", "PowerBook G4 17\"", 2291 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2292 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, 2293 }, 2294 { "PowerBook5,8", "PowerBook G4 15\"", 2295 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2296 PMAC_MB_MAY_SLEEP | PMAC_MB_MOBILE, 2297 }, 2298 { "PowerBook5,9", "PowerBook G4 17\"", 2299 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2300 PMAC_MB_MAY_SLEEP | PMAC_MB_MOBILE, 2301 }, 2302 { "PowerBook6,1", "PowerBook G4 12\"", 2303 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2304 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, 2305 }, 2306 { "PowerBook6,2", "PowerBook G4", 2307 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2308 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, 2309 }, 2310 { "PowerBook6,3", "iBook G4", 2311 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2312 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, 2313 }, 2314 { "PowerBook6,4", "PowerBook G4 12\"", 2315 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2316 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, 2317 }, 2318 { "PowerBook6,5", "iBook G4", 2319 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2320 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, 2321 }, 2322 { "PowerBook6,7", "iBook G4", 2323 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2324 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, 2325 }, 2326 { "PowerBook6,8", "PowerBook G4 12\"", 2327 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2328 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, 2329 }, 2330 #else /* CONFIG_POWER4 */ 2331 { "PowerMac7,2", "PowerMac G5", 2332 PMAC_TYPE_POWERMAC_G5, g5_features, 2333 0, 2334 }, 2335 #ifdef CONFIG_PPC64 2336 { "PowerMac7,3", "PowerMac G5", 2337 PMAC_TYPE_POWERMAC_G5, g5_features, 2338 0, 2339 }, 2340 { "PowerMac8,1", "iMac G5", 2341 PMAC_TYPE_IMAC_G5, g5_features, 2342 0, 2343 }, 2344 { "PowerMac9,1", "PowerMac G5", 2345 PMAC_TYPE_POWERMAC_G5_U3L, g5_features, 2346 0, 2347 }, 2348 { "PowerMac11,2", "PowerMac G5 Dual Core", 2349 PMAC_TYPE_POWERMAC_G5_U3L, g5_features, 2350 0, 2351 }, 2352 { "PowerMac12,1", "iMac G5 (iSight)", 2353 PMAC_TYPE_POWERMAC_G5_U3L, g5_features, 2354 0, 2355 }, 2356 { "RackMac3,1", "XServe G5", 2357 PMAC_TYPE_XSERVE_G5, g5_features, 2358 0, 2359 }, 2360 #endif /* CONFIG_PPC64 */ 2361 #endif /* CONFIG_POWER4 */ 2362 }; 2363 2364 /* 2365 * The toplevel feature_call callback 2366 */ 2367 long pmac_do_feature_call(unsigned int selector, ...) 2368 { 2369 struct device_node *node; 2370 long param, value; 2371 int i; 2372 feature_call func = NULL; 2373 va_list args; 2374 2375 if (pmac_mb.features) 2376 for (i=0; pmac_mb.features[i].function; i++) 2377 if (pmac_mb.features[i].selector == selector) { 2378 func = pmac_mb.features[i].function; 2379 break; 2380 } 2381 if (!func) 2382 for (i=0; any_features[i].function; i++) 2383 if (any_features[i].selector == selector) { 2384 func = any_features[i].function; 2385 break; 2386 } 2387 if (!func) 2388 return -ENODEV; 2389 2390 va_start(args, selector); 2391 node = (struct device_node*)va_arg(args, void*); 2392 param = va_arg(args, long); 2393 value = va_arg(args, long); 2394 va_end(args); 2395 2396 return func(node, param, value); 2397 } 2398 2399 static int __init probe_motherboard(void) 2400 { 2401 int i; 2402 struct macio_chip *macio = &macio_chips[0]; 2403 const char *model = NULL; 2404 struct device_node *dt; 2405 2406 /* Lookup known motherboard type in device-tree. First try an 2407 * exact match on the "model" property, then try a "compatible" 2408 * match is none is found. 2409 */ 2410 dt = find_devices("device-tree"); 2411 if (dt != NULL) 2412 model = (const char *) get_property(dt, "model", NULL); 2413 for(i=0; model && i<(sizeof(pmac_mb_defs)/sizeof(struct pmac_mb_def)); i++) { 2414 if (strcmp(model, pmac_mb_defs[i].model_string) == 0) { 2415 pmac_mb = pmac_mb_defs[i]; 2416 goto found; 2417 } 2418 } 2419 for(i=0; i<(sizeof(pmac_mb_defs)/sizeof(struct pmac_mb_def)); i++) { 2420 if (machine_is_compatible(pmac_mb_defs[i].model_string)) { 2421 pmac_mb = pmac_mb_defs[i]; 2422 goto found; 2423 } 2424 } 2425 2426 /* Fallback to selection depending on mac-io chip type */ 2427 switch(macio->type) { 2428 #ifndef CONFIG_POWER4 2429 case macio_grand_central: 2430 pmac_mb.model_id = PMAC_TYPE_PSURGE; 2431 pmac_mb.model_name = "Unknown PowerSurge"; 2432 break; 2433 case macio_ohare: 2434 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_OHARE; 2435 pmac_mb.model_name = "Unknown OHare-based"; 2436 break; 2437 case macio_heathrow: 2438 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_HEATHROW; 2439 pmac_mb.model_name = "Unknown Heathrow-based"; 2440 pmac_mb.features = heathrow_desktop_features; 2441 break; 2442 case macio_paddington: 2443 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_PADDINGTON; 2444 pmac_mb.model_name = "Unknown Paddington-based"; 2445 pmac_mb.features = paddington_features; 2446 break; 2447 case macio_keylargo: 2448 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_CORE99; 2449 pmac_mb.model_name = "Unknown Keylargo-based"; 2450 pmac_mb.features = core99_features; 2451 break; 2452 case macio_pangea: 2453 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_PANGEA; 2454 pmac_mb.model_name = "Unknown Pangea-based"; 2455 pmac_mb.features = pangea_features; 2456 break; 2457 case macio_intrepid: 2458 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_INTREPID; 2459 pmac_mb.model_name = "Unknown Intrepid-based"; 2460 pmac_mb.features = intrepid_features; 2461 break; 2462 #else /* CONFIG_POWER4 */ 2463 case macio_keylargo2: 2464 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_K2; 2465 pmac_mb.model_name = "Unknown K2-based"; 2466 pmac_mb.features = g5_features; 2467 break; 2468 case macio_shasta: 2469 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_SHASTA; 2470 pmac_mb.model_name = "Unknown Shasta-based"; 2471 pmac_mb.features = g5_features; 2472 break; 2473 #endif /* CONFIG_POWER4 */ 2474 default: 2475 return -ENODEV; 2476 } 2477 found: 2478 #ifndef CONFIG_POWER4 2479 /* Fixup Hooper vs. Comet */ 2480 if (pmac_mb.model_id == PMAC_TYPE_HOOPER) { 2481 u32 __iomem * mach_id_ptr = ioremap(0xf3000034, 4); 2482 if (!mach_id_ptr) 2483 return -ENODEV; 2484 /* Here, I used to disable the media-bay on comet. It 2485 * appears this is wrong, the floppy connector is actually 2486 * a kind of media-bay and works with the current driver. 2487 */ 2488 if (__raw_readl(mach_id_ptr) & 0x20000000UL) 2489 pmac_mb.model_id = PMAC_TYPE_COMET; 2490 iounmap(mach_id_ptr); 2491 } 2492 2493 /* Set default value of powersave_nap on machines that support it. 2494 * It appears that uninorth rev 3 has a problem with it, we don't 2495 * enable it on those. In theory, the flush-on-lock property is 2496 * supposed to be set when not supported, but I'm not very confident 2497 * that all Apple OF revs did it properly, I do it the paranoid way. 2498 */ 2499 while (uninorth_base && uninorth_rev > 3) { 2500 struct device_node *np = find_path_device("/cpus"); 2501 if (!np || !np->child) { 2502 printk(KERN_WARNING "Can't find CPU(s) in device tree !\n"); 2503 break; 2504 } 2505 np = np->child; 2506 /* Nap mode not supported on SMP */ 2507 if (np->sibling) 2508 break; 2509 /* Nap mode not supported if flush-on-lock property is present */ 2510 if (get_property(np, "flush-on-lock", NULL)) 2511 break; 2512 powersave_nap = 1; 2513 printk(KERN_DEBUG "Processor NAP mode on idle enabled.\n"); 2514 break; 2515 } 2516 2517 /* On CPUs that support it (750FX), lowspeed by default during 2518 * NAP mode 2519 */ 2520 powersave_lowspeed = 1; 2521 2522 #else /* CONFIG_POWER4 */ 2523 powersave_nap = 1; 2524 #endif /* CONFIG_POWER4 */ 2525 2526 /* Check for "mobile" machine */ 2527 if (model && (strncmp(model, "PowerBook", 9) == 0 2528 || strncmp(model, "iBook", 5) == 0)) 2529 pmac_mb.board_flags |= PMAC_MB_MOBILE; 2530 2531 2532 printk(KERN_INFO "PowerMac motherboard: %s\n", pmac_mb.model_name); 2533 return 0; 2534 } 2535 2536 /* Initialize the Core99 UniNorth host bridge and memory controller 2537 */ 2538 static void __init probe_uninorth(void) 2539 { 2540 u32 *addrp; 2541 phys_addr_t address; 2542 unsigned long actrl; 2543 2544 /* Locate core99 Uni-N */ 2545 uninorth_node = of_find_node_by_name(NULL, "uni-n"); 2546 /* Locate G5 u3 */ 2547 if (uninorth_node == NULL) { 2548 uninorth_node = of_find_node_by_name(NULL, "u3"); 2549 uninorth_maj = 3; 2550 } 2551 /* Locate G5 u4 */ 2552 if (uninorth_node == NULL) { 2553 uninorth_node = of_find_node_by_name(NULL, "u4"); 2554 uninorth_maj = 4; 2555 } 2556 if (uninorth_node == NULL) 2557 return; 2558 2559 addrp = (u32 *)get_property(uninorth_node, "reg", NULL); 2560 if (addrp == NULL) 2561 return; 2562 address = of_translate_address(uninorth_node, addrp); 2563 if (address == 0) 2564 return; 2565 uninorth_base = ioremap(address, 0x40000); 2566 uninorth_rev = in_be32(UN_REG(UNI_N_VERSION)); 2567 if (uninorth_maj == 3 || uninorth_maj == 4) 2568 u3_ht_base = ioremap(address + U3_HT_CONFIG_BASE, 0x1000); 2569 2570 printk(KERN_INFO "Found %s memory controller & host bridge" 2571 " @ 0x%08x revision: 0x%02x\n", uninorth_maj == 3 ? "U3" : 2572 uninorth_maj == 4 ? "U4" : "UniNorth", 2573 (unsigned int)address, uninorth_rev); 2574 printk(KERN_INFO "Mapped at 0x%08lx\n", (unsigned long)uninorth_base); 2575 2576 /* Set the arbitrer QAck delay according to what Apple does 2577 */ 2578 if (uninorth_rev < 0x11) { 2579 actrl = UN_IN(UNI_N_ARB_CTRL) & ~UNI_N_ARB_CTRL_QACK_DELAY_MASK; 2580 actrl |= ((uninorth_rev < 3) ? UNI_N_ARB_CTRL_QACK_DELAY105 : 2581 UNI_N_ARB_CTRL_QACK_DELAY) << 2582 UNI_N_ARB_CTRL_QACK_DELAY_SHIFT; 2583 UN_OUT(UNI_N_ARB_CTRL, actrl); 2584 } 2585 2586 /* Some more magic as done by them in recent MacOS X on UniNorth 2587 * revs 1.5 to 2.O and Pangea. Seem to toggle the UniN Maxbus/PCI 2588 * memory timeout 2589 */ 2590 if ((uninorth_rev >= 0x11 && uninorth_rev <= 0x24) || 2591 uninorth_rev == 0xc0) 2592 UN_OUT(0x2160, UN_IN(0x2160) & 0x00ffffff); 2593 } 2594 2595 static void __init probe_one_macio(const char *name, const char *compat, int type) 2596 { 2597 struct device_node* node; 2598 int i; 2599 volatile u32 __iomem *base; 2600 u32 *addrp, *revp; 2601 phys_addr_t addr; 2602 u64 size; 2603 2604 for (node = NULL; (node = of_find_node_by_name(node, name)) != NULL;) { 2605 if (!compat) 2606 break; 2607 if (device_is_compatible(node, compat)) 2608 break; 2609 } 2610 if (!node) 2611 return; 2612 for(i=0; i<MAX_MACIO_CHIPS; i++) { 2613 if (!macio_chips[i].of_node) 2614 break; 2615 if (macio_chips[i].of_node == node) 2616 return; 2617 } 2618 2619 if (i >= MAX_MACIO_CHIPS) { 2620 printk(KERN_ERR "pmac_feature: Please increase MAX_MACIO_CHIPS !\n"); 2621 printk(KERN_ERR "pmac_feature: %s skipped\n", node->full_name); 2622 return; 2623 } 2624 addrp = of_get_pci_address(node, 0, &size, NULL); 2625 if (addrp == NULL) { 2626 printk(KERN_ERR "pmac_feature: %s: can't find base !\n", 2627 node->full_name); 2628 return; 2629 } 2630 addr = of_translate_address(node, addrp); 2631 if (addr == 0) { 2632 printk(KERN_ERR "pmac_feature: %s, can't translate base !\n", 2633 node->full_name); 2634 return; 2635 } 2636 base = ioremap(addr, (unsigned long)size); 2637 if (!base) { 2638 printk(KERN_ERR "pmac_feature: %s, can't map mac-io chip !\n", 2639 node->full_name); 2640 return; 2641 } 2642 if (type == macio_keylargo || type == macio_keylargo2) { 2643 u32 *did = (u32 *)get_property(node, "device-id", NULL); 2644 if (*did == 0x00000025) 2645 type = macio_pangea; 2646 if (*did == 0x0000003e) 2647 type = macio_intrepid; 2648 if (*did == 0x0000004f) 2649 type = macio_shasta; 2650 } 2651 macio_chips[i].of_node = node; 2652 macio_chips[i].type = type; 2653 macio_chips[i].base = base; 2654 macio_chips[i].flags = MACIO_FLAG_SCCB_ON | MACIO_FLAG_SCCB_ON; 2655 macio_chips[i].name = macio_names[type]; 2656 revp = (u32 *)get_property(node, "revision-id", NULL); 2657 if (revp) 2658 macio_chips[i].rev = *revp; 2659 printk(KERN_INFO "Found a %s mac-io controller, rev: %d, mapped at 0x%p\n", 2660 macio_names[type], macio_chips[i].rev, macio_chips[i].base); 2661 } 2662 2663 static int __init 2664 probe_macios(void) 2665 { 2666 /* Warning, ordering is important */ 2667 probe_one_macio("gc", NULL, macio_grand_central); 2668 probe_one_macio("ohare", NULL, macio_ohare); 2669 probe_one_macio("pci106b,7", NULL, macio_ohareII); 2670 probe_one_macio("mac-io", "keylargo", macio_keylargo); 2671 probe_one_macio("mac-io", "paddington", macio_paddington); 2672 probe_one_macio("mac-io", "gatwick", macio_gatwick); 2673 probe_one_macio("mac-io", "heathrow", macio_heathrow); 2674 probe_one_macio("mac-io", "K2-Keylargo", macio_keylargo2); 2675 2676 /* Make sure the "main" macio chip appear first */ 2677 if (macio_chips[0].type == macio_gatwick 2678 && macio_chips[1].type == macio_heathrow) { 2679 struct macio_chip temp = macio_chips[0]; 2680 macio_chips[0] = macio_chips[1]; 2681 macio_chips[1] = temp; 2682 } 2683 if (macio_chips[0].type == macio_ohareII 2684 && macio_chips[1].type == macio_ohare) { 2685 struct macio_chip temp = macio_chips[0]; 2686 macio_chips[0] = macio_chips[1]; 2687 macio_chips[1] = temp; 2688 } 2689 macio_chips[0].lbus.index = 0; 2690 macio_chips[1].lbus.index = 1; 2691 2692 return (macio_chips[0].of_node == NULL) ? -ENODEV : 0; 2693 } 2694 2695 static void __init 2696 initial_serial_shutdown(struct device_node *np) 2697 { 2698 int len; 2699 struct slot_names_prop { 2700 int count; 2701 char name[1]; 2702 } *slots; 2703 char *conn; 2704 int port_type = PMAC_SCC_ASYNC; 2705 int modem = 0; 2706 2707 slots = (struct slot_names_prop *)get_property(np, "slot-names", &len); 2708 conn = get_property(np, "AAPL,connector", &len); 2709 if (conn && (strcmp(conn, "infrared") == 0)) 2710 port_type = PMAC_SCC_IRDA; 2711 else if (device_is_compatible(np, "cobalt")) 2712 modem = 1; 2713 else if (slots && slots->count > 0) { 2714 if (strcmp(slots->name, "IrDA") == 0) 2715 port_type = PMAC_SCC_IRDA; 2716 else if (strcmp(slots->name, "Modem") == 0) 2717 modem = 1; 2718 } 2719 if (modem) 2720 pmac_call_feature(PMAC_FTR_MODEM_ENABLE, np, 0, 0); 2721 pmac_call_feature(PMAC_FTR_SCC_ENABLE, np, port_type, 0); 2722 } 2723 2724 static void __init 2725 set_initial_features(void) 2726 { 2727 struct device_node *np; 2728 2729 /* That hack appears to be necessary for some StarMax motherboards 2730 * but I'm not too sure it was audited for side-effects on other 2731 * ohare based machines... 2732 * Since I still have difficulties figuring the right way to 2733 * differenciate them all and since that hack was there for a long 2734 * time, I'll keep it around 2735 */ 2736 if (macio_chips[0].type == macio_ohare && !find_devices("via-pmu")) { 2737 struct macio_chip *macio = &macio_chips[0]; 2738 MACIO_OUT32(OHARE_FCR, STARMAX_FEATURES); 2739 } else if (macio_chips[0].type == macio_ohare) { 2740 struct macio_chip *macio = &macio_chips[0]; 2741 MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE); 2742 } else if (macio_chips[1].type == macio_ohare) { 2743 struct macio_chip *macio = &macio_chips[1]; 2744 MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE); 2745 } 2746 2747 #ifdef CONFIG_POWER4 2748 if (macio_chips[0].type == macio_keylargo2 || 2749 macio_chips[0].type == macio_shasta) { 2750 #ifndef CONFIG_SMP 2751 /* On SMP machines running UP, we have the second CPU eating 2752 * bus cycles. We need to take it off the bus. This is done 2753 * from pmac_smp for SMP kernels running on one CPU 2754 */ 2755 np = of_find_node_by_type(NULL, "cpu"); 2756 if (np != NULL) 2757 np = of_find_node_by_type(np, "cpu"); 2758 if (np != NULL) { 2759 g5_phy_disable_cpu1(); 2760 of_node_put(np); 2761 } 2762 #endif /* CONFIG_SMP */ 2763 /* Enable GMAC for now for PCI probing. It will be disabled 2764 * later on after PCI probe 2765 */ 2766 np = of_find_node_by_name(NULL, "ethernet"); 2767 while(np) { 2768 if (device_is_compatible(np, "K2-GMAC")) 2769 g5_gmac_enable(np, 0, 1); 2770 np = of_find_node_by_name(np, "ethernet"); 2771 } 2772 2773 /* Enable FW before PCI probe. Will be disabled later on 2774 * Note: We should have a batter way to check that we are 2775 * dealing with uninorth internal cell and not a PCI cell 2776 * on the external PCI. The code below works though. 2777 */ 2778 np = of_find_node_by_name(NULL, "firewire"); 2779 while(np) { 2780 if (device_is_compatible(np, "pci106b,5811")) { 2781 macio_chips[0].flags |= MACIO_FLAG_FW_SUPPORTED; 2782 g5_fw_enable(np, 0, 1); 2783 } 2784 np = of_find_node_by_name(np, "firewire"); 2785 } 2786 } 2787 #else /* CONFIG_POWER4 */ 2788 2789 if (macio_chips[0].type == macio_keylargo || 2790 macio_chips[0].type == macio_pangea || 2791 macio_chips[0].type == macio_intrepid) { 2792 /* Enable GMAC for now for PCI probing. It will be disabled 2793 * later on after PCI probe 2794 */ 2795 np = of_find_node_by_name(NULL, "ethernet"); 2796 while(np) { 2797 if (np->parent 2798 && device_is_compatible(np->parent, "uni-north") 2799 && device_is_compatible(np, "gmac")) 2800 core99_gmac_enable(np, 0, 1); 2801 np = of_find_node_by_name(np, "ethernet"); 2802 } 2803 2804 /* Enable FW before PCI probe. Will be disabled later on 2805 * Note: We should have a batter way to check that we are 2806 * dealing with uninorth internal cell and not a PCI cell 2807 * on the external PCI. The code below works though. 2808 */ 2809 np = of_find_node_by_name(NULL, "firewire"); 2810 while(np) { 2811 if (np->parent 2812 && device_is_compatible(np->parent, "uni-north") 2813 && (device_is_compatible(np, "pci106b,18") || 2814 device_is_compatible(np, "pci106b,30") || 2815 device_is_compatible(np, "pci11c1,5811"))) { 2816 macio_chips[0].flags |= MACIO_FLAG_FW_SUPPORTED; 2817 core99_firewire_enable(np, 0, 1); 2818 } 2819 np = of_find_node_by_name(np, "firewire"); 2820 } 2821 2822 /* Enable ATA-100 before PCI probe. */ 2823 np = of_find_node_by_name(NULL, "ata-6"); 2824 while(np) { 2825 if (np->parent 2826 && device_is_compatible(np->parent, "uni-north") 2827 && device_is_compatible(np, "kauai-ata")) { 2828 core99_ata100_enable(np, 1); 2829 } 2830 np = of_find_node_by_name(np, "ata-6"); 2831 } 2832 2833 /* Switch airport off */ 2834 np = find_devices("radio"); 2835 while(np) { 2836 if (np && np->parent == macio_chips[0].of_node) { 2837 macio_chips[0].flags |= MACIO_FLAG_AIRPORT_ON; 2838 core99_airport_enable(np, 0, 0); 2839 } 2840 np = np->next; 2841 } 2842 } 2843 2844 /* On all machines that support sound PM, switch sound off */ 2845 if (macio_chips[0].of_node) 2846 pmac_do_feature_call(PMAC_FTR_SOUND_CHIP_ENABLE, 2847 macio_chips[0].of_node, 0, 0); 2848 2849 /* While on some desktop G3s, we turn it back on */ 2850 if (macio_chips[0].of_node && macio_chips[0].type == macio_heathrow 2851 && (pmac_mb.model_id == PMAC_TYPE_GOSSAMER || 2852 pmac_mb.model_id == PMAC_TYPE_SILK)) { 2853 struct macio_chip *macio = &macio_chips[0]; 2854 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE); 2855 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_POWER_N); 2856 } 2857 2858 #endif /* CONFIG_POWER4 */ 2859 2860 /* On all machines, switch modem & serial ports off */ 2861 np = find_devices("ch-a"); 2862 while(np) { 2863 initial_serial_shutdown(np); 2864 np = np->next; 2865 } 2866 np = find_devices("ch-b"); 2867 while(np) { 2868 initial_serial_shutdown(np); 2869 np = np->next; 2870 } 2871 } 2872 2873 void __init 2874 pmac_feature_init(void) 2875 { 2876 /* Detect the UniNorth memory controller */ 2877 probe_uninorth(); 2878 2879 /* Probe mac-io controllers */ 2880 if (probe_macios()) { 2881 printk(KERN_WARNING "No mac-io chip found\n"); 2882 return; 2883 } 2884 2885 /* Probe machine type */ 2886 if (probe_motherboard()) 2887 printk(KERN_WARNING "Unknown PowerMac !\n"); 2888 2889 /* Set some initial features (turn off some chips that will 2890 * be later turned on) 2891 */ 2892 set_initial_features(); 2893 } 2894 2895 #if 0 2896 static void dump_HT_speeds(char *name, u32 cfg, u32 frq) 2897 { 2898 int freqs[16] = { 200,300,400,500,600,800,1000,0,0,0,0,0,0,0,0,0 }; 2899 int bits[8] = { 8,16,0,32,2,4,0,0 }; 2900 int freq = (frq >> 8) & 0xf; 2901 2902 if (freqs[freq] == 0) 2903 printk("%s: Unknown HT link frequency %x\n", name, freq); 2904 else 2905 printk("%s: %d MHz on main link, (%d in / %d out) bits width\n", 2906 name, freqs[freq], 2907 bits[(cfg >> 28) & 0x7], bits[(cfg >> 24) & 0x7]); 2908 } 2909 2910 void __init pmac_check_ht_link(void) 2911 { 2912 u32 ufreq, freq, ucfg, cfg; 2913 struct device_node *pcix_node; 2914 u8 px_bus, px_devfn; 2915 struct pci_controller *px_hose; 2916 2917 (void)in_be32(u3_ht_base + U3_HT_LINK_COMMAND); 2918 ucfg = cfg = in_be32(u3_ht_base + U3_HT_LINK_CONFIG); 2919 ufreq = freq = in_be32(u3_ht_base + U3_HT_LINK_FREQ); 2920 dump_HT_speeds("U3 HyperTransport", cfg, freq); 2921 2922 pcix_node = of_find_compatible_node(NULL, "pci", "pci-x"); 2923 if (pcix_node == NULL) { 2924 printk("No PCI-X bridge found\n"); 2925 return; 2926 } 2927 if (pci_device_from_OF_node(pcix_node, &px_bus, &px_devfn) != 0) { 2928 printk("PCI-X bridge found but not matched to pci\n"); 2929 return; 2930 } 2931 px_hose = pci_find_hose_for_OF_device(pcix_node); 2932 if (px_hose == NULL) { 2933 printk("PCI-X bridge found but not matched to host\n"); 2934 return; 2935 } 2936 early_read_config_dword(px_hose, px_bus, px_devfn, 0xc4, &cfg); 2937 early_read_config_dword(px_hose, px_bus, px_devfn, 0xcc, &freq); 2938 dump_HT_speeds("PCI-X HT Uplink", cfg, freq); 2939 early_read_config_dword(px_hose, px_bus, px_devfn, 0xc8, &cfg); 2940 early_read_config_dword(px_hose, px_bus, px_devfn, 0xd0, &freq); 2941 dump_HT_speeds("PCI-X HT Downlink", cfg, freq); 2942 } 2943 #endif /* 0 */ 2944 2945 /* 2946 * Early video resume hook 2947 */ 2948 2949 static void (*pmac_early_vresume_proc)(void *data); 2950 static void *pmac_early_vresume_data; 2951 2952 void pmac_set_early_video_resume(void (*proc)(void *data), void *data) 2953 { 2954 if (!machine_is(powermac)) 2955 return; 2956 preempt_disable(); 2957 pmac_early_vresume_proc = proc; 2958 pmac_early_vresume_data = data; 2959 preempt_enable(); 2960 } 2961 EXPORT_SYMBOL(pmac_set_early_video_resume); 2962 2963 void pmac_call_early_video_resume(void) 2964 { 2965 if (pmac_early_vresume_proc) 2966 pmac_early_vresume_proc(pmac_early_vresume_data); 2967 } 2968 2969 /* 2970 * AGP related suspend/resume code 2971 */ 2972 2973 static struct pci_dev *pmac_agp_bridge; 2974 static int (*pmac_agp_suspend)(struct pci_dev *bridge); 2975 static int (*pmac_agp_resume)(struct pci_dev *bridge); 2976 2977 void pmac_register_agp_pm(struct pci_dev *bridge, 2978 int (*suspend)(struct pci_dev *bridge), 2979 int (*resume)(struct pci_dev *bridge)) 2980 { 2981 if (suspend || resume) { 2982 pmac_agp_bridge = bridge; 2983 pmac_agp_suspend = suspend; 2984 pmac_agp_resume = resume; 2985 return; 2986 } 2987 if (bridge != pmac_agp_bridge) 2988 return; 2989 pmac_agp_suspend = pmac_agp_resume = NULL; 2990 return; 2991 } 2992 EXPORT_SYMBOL(pmac_register_agp_pm); 2993 2994 void pmac_suspend_agp_for_card(struct pci_dev *dev) 2995 { 2996 if (pmac_agp_bridge == NULL || pmac_agp_suspend == NULL) 2997 return; 2998 if (pmac_agp_bridge->bus != dev->bus) 2999 return; 3000 pmac_agp_suspend(pmac_agp_bridge); 3001 } 3002 EXPORT_SYMBOL(pmac_suspend_agp_for_card); 3003 3004 void pmac_resume_agp_for_card(struct pci_dev *dev) 3005 { 3006 if (pmac_agp_bridge == NULL || pmac_agp_resume == NULL) 3007 return; 3008 if (pmac_agp_bridge->bus != dev->bus) 3009 return; 3010 pmac_agp_resume(pmac_agp_bridge); 3011 } 3012 EXPORT_SYMBOL(pmac_resume_agp_for_card); 3013