1 /* 2 * Copyright (C) 2006 PA Semi, Inc 3 * 4 * Authors: Kip Walker, PA Semi 5 * Olof Johansson, PA Semi 6 * 7 * Maintained by: Olof Johansson <olof@lixom.net> 8 * 9 * Based on arch/powerpc/platforms/maple/pci.c 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License version 2 as 13 * published by the Free Software Foundation. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 23 */ 24 25 26 #include <linux/kernel.h> 27 #include <linux/pci.h> 28 29 #include <asm/pci-bridge.h> 30 #include <asm/machdep.h> 31 32 #include <asm/ppc-pci.h> 33 34 #define PA_PXP_CFA(bus, devfn, off) (((bus) << 20) | ((devfn) << 12) | (off)) 35 36 #define CONFIG_OFFSET_VALID(off) ((off) < 4096) 37 38 static void volatile __iomem *pa_pxp_cfg_addr(struct pci_controller *hose, 39 u8 bus, u8 devfn, int offset) 40 { 41 return hose->cfg_data + PA_PXP_CFA(bus, devfn, offset); 42 } 43 44 static int pa_pxp_read_config(struct pci_bus *bus, unsigned int devfn, 45 int offset, int len, u32 *val) 46 { 47 struct pci_controller *hose; 48 void volatile __iomem *addr; 49 50 hose = pci_bus_to_host(bus); 51 if (!hose) 52 return PCIBIOS_DEVICE_NOT_FOUND; 53 54 if (!CONFIG_OFFSET_VALID(offset)) 55 return PCIBIOS_BAD_REGISTER_NUMBER; 56 57 addr = pa_pxp_cfg_addr(hose, bus->number, devfn, offset); 58 59 /* 60 * Note: the caller has already checked that offset is 61 * suitably aligned and that len is 1, 2 or 4. 62 */ 63 switch (len) { 64 case 1: 65 *val = in_8(addr); 66 break; 67 case 2: 68 *val = in_le16(addr); 69 break; 70 default: 71 *val = in_le32(addr); 72 break; 73 } 74 75 return PCIBIOS_SUCCESSFUL; 76 } 77 78 static int pa_pxp_write_config(struct pci_bus *bus, unsigned int devfn, 79 int offset, int len, u32 val) 80 { 81 struct pci_controller *hose; 82 void volatile __iomem *addr; 83 84 hose = pci_bus_to_host(bus); 85 if (!hose) 86 return PCIBIOS_DEVICE_NOT_FOUND; 87 88 if (!CONFIG_OFFSET_VALID(offset)) 89 return PCIBIOS_BAD_REGISTER_NUMBER; 90 91 addr = pa_pxp_cfg_addr(hose, bus->number, devfn, offset); 92 93 /* 94 * Note: the caller has already checked that offset is 95 * suitably aligned and that len is 1, 2 or 4. 96 */ 97 switch (len) { 98 case 1: 99 out_8(addr, val); 100 (void) in_8(addr); 101 break; 102 case 2: 103 out_le16(addr, val); 104 (void) in_le16(addr); 105 break; 106 default: 107 out_le32(addr, val); 108 (void) in_le32(addr); 109 break; 110 } 111 return PCIBIOS_SUCCESSFUL; 112 } 113 114 static struct pci_ops pa_pxp_ops = { 115 pa_pxp_read_config, 116 pa_pxp_write_config, 117 }; 118 119 static void __init setup_pa_pxp(struct pci_controller *hose) 120 { 121 hose->ops = &pa_pxp_ops; 122 hose->cfg_data = ioremap(0xe0000000, 0x10000000); 123 } 124 125 static int __init add_bridge(struct device_node *dev) 126 { 127 struct pci_controller *hose; 128 129 pr_debug("Adding PCI host bridge %s\n", dev->full_name); 130 131 hose = pcibios_alloc_controller(dev); 132 if (!hose) 133 return -ENOMEM; 134 135 hose->first_busno = 0; 136 hose->last_busno = 0xff; 137 138 setup_pa_pxp(hose); 139 140 printk(KERN_INFO "Found PA-PXP PCI host bridge.\n"); 141 142 /* Interpret the "ranges" property */ 143 /* This also maps the I/O region and sets isa_io/mem_base */ 144 pci_process_bridge_OF_ranges(hose, dev, 1); 145 pci_setup_phb_io(hose, 1); 146 147 return 0; 148 } 149 150 151 static void __init pas_fixup_phb_resources(void) 152 { 153 struct pci_controller *hose, *tmp; 154 155 list_for_each_entry_safe(hose, tmp, &hose_list, list_node) { 156 unsigned long offset = (unsigned long)hose->io_base_virt - pci_io_base; 157 hose->io_resource.start += offset; 158 hose->io_resource.end += offset; 159 printk(KERN_INFO "PCI Host %d, io start: %lx; io end: %lx\n", 160 hose->global_number, 161 hose->io_resource.start, hose->io_resource.end); 162 } 163 } 164 165 166 void __devinit pas_pci_irq_fixup(struct pci_dev *dev) 167 { 168 /* DMA is special, 84 interrupts (128 -> 211), all but 128 169 * need to be mapped by hand here. 170 */ 171 if (dev->vendor == 0x1959 && dev->device == 0xa007) { 172 int i; 173 for (i = 129; i < 212; i++) 174 irq_create_mapping(NULL, i); 175 } 176 } 177 178 179 void __init pas_pci_init(void) 180 { 181 struct device_node *np, *root; 182 183 root = of_find_node_by_path("/"); 184 if (!root) { 185 printk(KERN_CRIT "pas_pci_init: can't find root " 186 "of device tree\n"); 187 return; 188 } 189 190 for (np = NULL; (np = of_get_next_child(root, np)) != NULL;) 191 if (np->name && !strcmp(np->name, "pxp") && !add_bridge(np)) 192 of_node_get(np); 193 194 of_node_put(root); 195 196 pas_fixup_phb_resources(); 197 198 /* Setup the linkage between OF nodes and PHBs */ 199 pci_devs_phb_init(); 200 201 /* Use the common resource allocation mechanism */ 202 pci_probe_only = 1; 203 } 204