xref: /linux/arch/powerpc/platforms/embedded6xx/holly.c (revision f2ee442115c9b6219083c019939a9cc0c9abb2f8)
1 /*
2  * Board setup routines for the IBM 750GX/CL platform w/ TSI10x bridge
3  *
4  * Copyright 2007 IBM Corporation
5  *
6  * Stephen Winiecki <stevewin@us.ibm.com>
7  * Josh Boyer <jwboyer@linux.vnet.ibm.com>
8  *
9  * Based on code from mpc7448_hpc2.c
10  *
11  * This program is free software; you can redistribute it and/or
12  * modify it under the terms of the GNU General Public License
13  * version 2 as published by the Free Software Foundation.
14  */
15 
16 #include <linux/stddef.h>
17 #include <linux/kernel.h>
18 #include <linux/pci.h>
19 #include <linux/kdev_t.h>
20 #include <linux/console.h>
21 #include <linux/delay.h>
22 #include <linux/irq.h>
23 #include <linux/seq_file.h>
24 #include <linux/root_dev.h>
25 #include <linux/serial.h>
26 #include <linux/tty.h>
27 #include <linux/serial_core.h>
28 #include <linux/of_platform.h>
29 #include <linux/module.h>
30 
31 #include <asm/system.h>
32 #include <asm/time.h>
33 #include <asm/machdep.h>
34 #include <asm/prom.h>
35 #include <asm/udbg.h>
36 #include <asm/tsi108.h>
37 #include <asm/pci-bridge.h>
38 #include <asm/reg.h>
39 #include <mm/mmu_decl.h>
40 #include <asm/tsi108_irq.h>
41 #include <asm/tsi108_pci.h>
42 #include <asm/mpic.h>
43 
44 #undef DEBUG
45 
46 #define HOLLY_PCI_CFG_PHYS 0x7c000000
47 
48 int holly_exclude_device(struct pci_controller *hose, u_char bus, u_char devfn)
49 {
50 	if (bus == 0 && PCI_SLOT(devfn) == 0)
51 		return PCIBIOS_DEVICE_NOT_FOUND;
52 	else
53 		return PCIBIOS_SUCCESSFUL;
54 }
55 
56 static void holly_remap_bridge(void)
57 {
58 	u32 lut_val, lut_addr;
59 	int i;
60 
61 	printk(KERN_INFO "Remapping PCI bridge\n");
62 
63 	/* Re-init the PCI bridge and LUT registers to have mappings that don't
64 	 * rely on PIBS
65 	 */
66 	lut_addr = 0x900;
67 	for (i = 0; i < 31; i++) {
68 		tsi108_write_reg(TSI108_PB_OFFSET + lut_addr, 0x00000201);
69 		lut_addr += 4;
70 		tsi108_write_reg(TSI108_PB_OFFSET + lut_addr, 0x0);
71 		lut_addr += 4;
72 	}
73 
74 	/* Reserve the last LUT entry for PCI I/O space */
75 	tsi108_write_reg(TSI108_PB_OFFSET + lut_addr, 0x00000241);
76 	lut_addr += 4;
77 	tsi108_write_reg(TSI108_PB_OFFSET + lut_addr, 0x0);
78 
79 	/* Map PCI I/O space */
80 	tsi108_write_reg(TSI108_PCI_PFAB_IO_UPPER, 0x0);
81 	tsi108_write_reg(TSI108_PCI_PFAB_IO, 0x1);
82 
83 	/* Map PCI CFG space */
84 	tsi108_write_reg(TSI108_PCI_PFAB_BAR0_UPPER, 0x0);
85 	tsi108_write_reg(TSI108_PCI_PFAB_BAR0, 0x7c000000 | 0x01);
86 
87 	/* We don't need MEM32 and PRM remapping so disable them */
88 	tsi108_write_reg(TSI108_PCI_PFAB_MEM32, 0x0);
89 	tsi108_write_reg(TSI108_PCI_PFAB_PFM3, 0x0);
90 	tsi108_write_reg(TSI108_PCI_PFAB_PFM4, 0x0);
91 
92 	/* Set P2O_BAR0 */
93 	tsi108_write_reg(TSI108_PCI_P2O_BAR0_UPPER, 0x0);
94 	tsi108_write_reg(TSI108_PCI_P2O_BAR0, 0xc0000000);
95 
96 	/* Init the PCI LUTs to do no remapping */
97 	lut_addr = 0x500;
98 	lut_val = 0x00000002;
99 
100 	for (i = 0; i < 32; i++) {
101 		tsi108_write_reg(TSI108_PCI_OFFSET + lut_addr, lut_val);
102 		lut_addr += 4;
103 		tsi108_write_reg(TSI108_PCI_OFFSET + lut_addr, 0x40000000);
104 		lut_addr += 4;
105 		lut_val += 0x02000000;
106 	}
107 	tsi108_write_reg(TSI108_PCI_P2O_PAGE_SIZES, 0x00007900);
108 
109 	/* Set 64-bit PCI bus address for system memory */
110 	tsi108_write_reg(TSI108_PCI_P2O_BAR2_UPPER, 0x0);
111 	tsi108_write_reg(TSI108_PCI_P2O_BAR2, 0x0);
112 }
113 
114 static void __init holly_setup_arch(void)
115 {
116 	struct device_node *np;
117 
118 	if (ppc_md.progress)
119 		ppc_md.progress("holly_setup_arch():set_bridge", 0);
120 
121 	tsi108_csr_vir_base = get_vir_csrbase();
122 
123 	/* setup PCI host bridge */
124 	holly_remap_bridge();
125 
126 	np = of_find_node_by_type(NULL, "pci");
127 	if (np)
128 		tsi108_setup_pci(np, HOLLY_PCI_CFG_PHYS, 1);
129 
130 	ppc_md.pci_exclude_device = holly_exclude_device;
131 	if (ppc_md.progress)
132 		ppc_md.progress("tsi108: resources set", 0x100);
133 
134 	printk(KERN_INFO "PPC750GX/CL Platform\n");
135 }
136 
137 /*
138  * Interrupt setup and service.  Interrupts on the holly come
139  * from the four external INT pins, PCI interrupts are routed via
140  * PCI interrupt control registers, it generates internal IRQ23
141  *
142  * Interrupt routing on the Holly Board:
143  * TSI108:PB_INT[0] -> CPU0:INT#
144  * TSI108:PB_INT[1] -> CPU0:MCP#
145  * TSI108:PB_INT[2] -> N/C
146  * TSI108:PB_INT[3] -> N/C
147  */
148 static void __init holly_init_IRQ(void)
149 {
150 	struct mpic *mpic;
151 	phys_addr_t mpic_paddr = 0;
152 	struct device_node *tsi_pic;
153 #ifdef CONFIG_PCI
154 	unsigned int cascade_pci_irq;
155 	struct device_node *tsi_pci;
156 	struct device_node *cascade_node = NULL;
157 #endif
158 
159 	tsi_pic = of_find_node_by_type(NULL, "open-pic");
160 	if (tsi_pic) {
161 		unsigned int size;
162 		const void *prop = of_get_property(tsi_pic, "reg", &size);
163 		mpic_paddr = of_translate_address(tsi_pic, prop);
164 	}
165 
166 	if (mpic_paddr == 0) {
167 		printk(KERN_ERR "%s: No tsi108 PIC found !\n", __func__);
168 		return;
169 	}
170 
171 	pr_debug("%s: tsi108 pic phys_addr = 0x%x\n", __func__, (u32) mpic_paddr);
172 
173 	mpic = mpic_alloc(tsi_pic, mpic_paddr,
174 			MPIC_PRIMARY | MPIC_BIG_ENDIAN | MPIC_WANTS_RESET |
175 			MPIC_SPV_EOI | MPIC_NO_PTHROU_DIS | MPIC_REGSET_TSI108,
176 			24,
177 			NR_IRQS-4, /* num_sources used */
178 			"Tsi108_PIC");
179 
180 	BUG_ON(mpic == NULL);
181 
182 	mpic_assign_isu(mpic, 0, mpic_paddr + 0x100);
183 
184 	mpic_init(mpic);
185 
186 #ifdef CONFIG_PCI
187 	tsi_pci = of_find_node_by_type(NULL, "pci");
188 	if (tsi_pci == NULL) {
189 		printk(KERN_ERR "%s: No tsi108 pci node found !\n", __func__);
190 		return;
191 	}
192 
193 	cascade_node = of_find_node_by_type(NULL, "pic-router");
194 	if (cascade_node == NULL) {
195 		printk(KERN_ERR "%s: No tsi108 pci cascade node found !\n", __func__);
196 		return;
197 	}
198 
199 	cascade_pci_irq = irq_of_parse_and_map(tsi_pci, 0);
200 	pr_debug("%s: tsi108 cascade_pci_irq = 0x%x\n", __func__, (u32) cascade_pci_irq);
201 	tsi108_pci_int_init(cascade_node);
202 	irq_set_handler_data(cascade_pci_irq, mpic);
203 	irq_set_chained_handler(cascade_pci_irq, tsi108_irq_cascade);
204 #endif
205 	/* Configure MPIC outputs to CPU0 */
206 	tsi108_write_reg(TSI108_MPIC_OFFSET + 0x30c, 0);
207 	of_node_put(tsi_pic);
208 }
209 
210 void holly_show_cpuinfo(struct seq_file *m)
211 {
212 	seq_printf(m, "vendor\t\t: IBM\n");
213 	seq_printf(m, "machine\t\t: PPC750 GX/CL\n");
214 }
215 
216 void holly_restart(char *cmd)
217 {
218 	__be32 __iomem *ocn_bar1 = NULL;
219 	unsigned long bar;
220 	struct device_node *bridge = NULL;
221 	const void *prop;
222 	int size;
223 	phys_addr_t addr = 0xc0000000;
224 
225 	local_irq_disable();
226 
227 	bridge = of_find_node_by_type(NULL, "tsi-bridge");
228 	if (bridge) {
229 		prop = of_get_property(bridge, "reg", &size);
230 		addr = of_translate_address(bridge, prop);
231 	}
232 	addr += (TSI108_PB_OFFSET + 0x414);
233 
234 	ocn_bar1 = ioremap(addr, 0x4);
235 
236 	/* Turn on the BOOT bit so the addresses are correctly
237 	 * routed to the HLP interface */
238 	bar = ioread32be(ocn_bar1);
239 	bar |= 2;
240 	iowrite32be(bar, ocn_bar1);
241 	iosync();
242 
243 	/* Set SRR0 to the reset vector and turn on MSR_IP */
244 	mtspr(SPRN_SRR0, 0xfff00100);
245 	mtspr(SPRN_SRR1, MSR_IP);
246 
247 	/* Do an rfi to jump back to firmware.  Somewhat evil,
248 	 * but it works
249 	 */
250 	__asm__ __volatile__("rfi" : : : "memory");
251 
252 	/* Spin until reset happens.  Shouldn't really get here */
253 	for (;;) ;
254 }
255 
256 void holly_power_off(void)
257 {
258 	local_irq_disable();
259 	/* No way to shut power off with software */
260 	for (;;) ;
261 }
262 
263 void holly_halt(void)
264 {
265 	holly_power_off();
266 }
267 
268 /*
269  * Called very early, device-tree isn't unflattened
270  */
271 static int __init holly_probe(void)
272 {
273 	unsigned long root = of_get_flat_dt_root();
274 
275 	if (!of_flat_dt_is_compatible(root, "ibm,holly"))
276 		return 0;
277 	return 1;
278 }
279 
280 static int ppc750_machine_check_exception(struct pt_regs *regs)
281 {
282 	const struct exception_table_entry *entry;
283 
284 	/* Are we prepared to handle this fault */
285 	if ((entry = search_exception_tables(regs->nip)) != NULL) {
286 		tsi108_clear_pci_cfg_error();
287 		regs->msr |= MSR_RI;
288 		regs->nip = entry->fixup;
289 		return 1;
290 	}
291 	return 0;
292 }
293 
294 define_machine(holly){
295 	.name                   	= "PPC750 GX/CL TSI",
296 	.probe                  	= holly_probe,
297 	.setup_arch             	= holly_setup_arch,
298 	.init_IRQ               	= holly_init_IRQ,
299 	.show_cpuinfo           	= holly_show_cpuinfo,
300 	.get_irq                	= mpic_get_irq,
301 	.restart                	= holly_restart,
302 	.calibrate_decr         	= generic_calibrate_decr,
303 	.machine_check_exception	= ppc750_machine_check_exception,
304 	.progress               	= udbg_progress,
305 };
306