1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * spu hypervisor abstraction for direct hardware access. 4 * 5 * (C) Copyright IBM Deutschland Entwicklung GmbH 2005 6 * Copyright 2006 Sony Corp. 7 */ 8 9 #include <linux/interrupt.h> 10 #include <linux/list.h> 11 #include <linux/ptrace.h> 12 #include <linux/wait.h> 13 #include <linux/mm.h> 14 #include <linux/io.h> 15 #include <linux/mutex.h> 16 #include <linux/device.h> 17 #include <linux/sched.h> 18 19 #include <asm/spu.h> 20 #include <asm/spu_priv1.h> 21 #include <asm/firmware.h> 22 #include <asm/prom.h> 23 24 #include "interrupt.h" 25 #include "spu_priv1_mmio.h" 26 27 static void int_mask_and(struct spu *spu, int class, u64 mask) 28 { 29 u64 old_mask; 30 31 old_mask = in_be64(&spu->priv1->int_mask_RW[class]); 32 out_be64(&spu->priv1->int_mask_RW[class], old_mask & mask); 33 } 34 35 static void int_mask_or(struct spu *spu, int class, u64 mask) 36 { 37 u64 old_mask; 38 39 old_mask = in_be64(&spu->priv1->int_mask_RW[class]); 40 out_be64(&spu->priv1->int_mask_RW[class], old_mask | mask); 41 } 42 43 static void int_mask_set(struct spu *spu, int class, u64 mask) 44 { 45 out_be64(&spu->priv1->int_mask_RW[class], mask); 46 } 47 48 static u64 int_mask_get(struct spu *spu, int class) 49 { 50 return in_be64(&spu->priv1->int_mask_RW[class]); 51 } 52 53 static void int_stat_clear(struct spu *spu, int class, u64 stat) 54 { 55 out_be64(&spu->priv1->int_stat_RW[class], stat); 56 } 57 58 static u64 int_stat_get(struct spu *spu, int class) 59 { 60 return in_be64(&spu->priv1->int_stat_RW[class]); 61 } 62 63 static void cpu_affinity_set(struct spu *spu, int cpu) 64 { 65 u64 target; 66 u64 route; 67 68 if (nr_cpus_node(spu->node)) { 69 const struct cpumask *spumask = cpumask_of_node(spu->node), 70 *cpumask = cpumask_of_node(cpu_to_node(cpu)); 71 72 if (!cpumask_intersects(spumask, cpumask)) 73 return; 74 } 75 76 target = iic_get_target_id(cpu); 77 route = target << 48 | target << 32 | target << 16; 78 out_be64(&spu->priv1->int_route_RW, route); 79 } 80 81 static u64 mfc_dar_get(struct spu *spu) 82 { 83 return in_be64(&spu->priv1->mfc_dar_RW); 84 } 85 86 static u64 mfc_dsisr_get(struct spu *spu) 87 { 88 return in_be64(&spu->priv1->mfc_dsisr_RW); 89 } 90 91 static void mfc_dsisr_set(struct spu *spu, u64 dsisr) 92 { 93 out_be64(&spu->priv1->mfc_dsisr_RW, dsisr); 94 } 95 96 static void mfc_sdr_setup(struct spu *spu) 97 { 98 out_be64(&spu->priv1->mfc_sdr_RW, mfspr(SPRN_SDR1)); 99 } 100 101 static void mfc_sr1_set(struct spu *spu, u64 sr1) 102 { 103 out_be64(&spu->priv1->mfc_sr1_RW, sr1); 104 } 105 106 static u64 mfc_sr1_get(struct spu *spu) 107 { 108 return in_be64(&spu->priv1->mfc_sr1_RW); 109 } 110 111 static void mfc_tclass_id_set(struct spu *spu, u64 tclass_id) 112 { 113 out_be64(&spu->priv1->mfc_tclass_id_RW, tclass_id); 114 } 115 116 static u64 mfc_tclass_id_get(struct spu *spu) 117 { 118 return in_be64(&spu->priv1->mfc_tclass_id_RW); 119 } 120 121 static void tlb_invalidate(struct spu *spu) 122 { 123 out_be64(&spu->priv1->tlb_invalidate_entry_W, 0ul); 124 } 125 126 static void resource_allocation_groupID_set(struct spu *spu, u64 id) 127 { 128 out_be64(&spu->priv1->resource_allocation_groupID_RW, id); 129 } 130 131 static u64 resource_allocation_groupID_get(struct spu *spu) 132 { 133 return in_be64(&spu->priv1->resource_allocation_groupID_RW); 134 } 135 136 static void resource_allocation_enable_set(struct spu *spu, u64 enable) 137 { 138 out_be64(&spu->priv1->resource_allocation_enable_RW, enable); 139 } 140 141 static u64 resource_allocation_enable_get(struct spu *spu) 142 { 143 return in_be64(&spu->priv1->resource_allocation_enable_RW); 144 } 145 146 const struct spu_priv1_ops spu_priv1_mmio_ops = 147 { 148 .int_mask_and = int_mask_and, 149 .int_mask_or = int_mask_or, 150 .int_mask_set = int_mask_set, 151 .int_mask_get = int_mask_get, 152 .int_stat_clear = int_stat_clear, 153 .int_stat_get = int_stat_get, 154 .cpu_affinity_set = cpu_affinity_set, 155 .mfc_dar_get = mfc_dar_get, 156 .mfc_dsisr_get = mfc_dsisr_get, 157 .mfc_dsisr_set = mfc_dsisr_set, 158 .mfc_sdr_setup = mfc_sdr_setup, 159 .mfc_sr1_set = mfc_sr1_set, 160 .mfc_sr1_get = mfc_sr1_get, 161 .mfc_tclass_id_set = mfc_tclass_id_set, 162 .mfc_tclass_id_get = mfc_tclass_id_get, 163 .tlb_invalidate = tlb_invalidate, 164 .resource_allocation_groupID_set = resource_allocation_groupID_set, 165 .resource_allocation_groupID_get = resource_allocation_groupID_get, 166 .resource_allocation_enable_set = resource_allocation_enable_set, 167 .resource_allocation_enable_get = resource_allocation_enable_get, 168 }; 169