1# SPDX-License-Identifier: GPL-2.0 2config PPC_CELL 3 bool 4 default n 5 6config PPC_CELL_COMMON 7 bool 8 select PPC_CELL 9 select PPC_DCR_MMIO 10 select PPC_INDIRECT_PIO 11 select PPC_INDIRECT_MMIO 12 select PPC_NATIVE 13 select PPC_RTAS 14 select IRQ_EDGE_EOI_HANDLER 15 16config PPC_CELL_NATIVE 17 bool 18 select PPC_CELL_COMMON 19 select MPIC 20 select PPC_IO_WORKAROUNDS 21 select IBM_EMAC_EMAC4 if IBM_EMAC 22 select IBM_EMAC_RGMII if IBM_EMAC 23 select IBM_EMAC_ZMII if IBM_EMAC #test only 24 select IBM_EMAC_TAH if IBM_EMAC #test only 25 default n 26 27config PPC_IBM_CELL_BLADE 28 bool "IBM Cell Blade" 29 depends on PPC64 && PPC_BOOK3S && CPU_BIG_ENDIAN 30 select PPC_CELL_NATIVE 31 select PPC_OF_PLATFORM_PCI 32 select PCI 33 select MMIO_NVRAM 34 select PPC_UDBG_16550 35 select UDBG_RTAS_CONSOLE 36 37config AXON_MSI 38 bool 39 depends on PPC_IBM_CELL_BLADE && PCI_MSI 40 default y 41 42menu "Cell Broadband Engine options" 43 depends on PPC_CELL 44 45config SPU_FS 46 tristate "SPU file system" 47 default m 48 depends on PPC_CELL 49 select SPU_BASE 50 help 51 The SPU file system is used to access Synergistic Processing 52 Units on machines implementing the Broadband Processor 53 Architecture. 54 55config SPU_BASE 56 bool 57 default n 58 select PPC_COPRO_BASE 59 60config CBE_RAS 61 bool "RAS features for bare metal Cell BE" 62 depends on PPC_CELL_NATIVE 63 default y 64 65config PPC_IBM_CELL_RESETBUTTON 66 bool "IBM Cell Blade Pinhole reset button" 67 depends on CBE_RAS && PPC_IBM_CELL_BLADE 68 default y 69 help 70 Support Pinhole Resetbutton on IBM Cell blades. 71 This adds a method to trigger system reset via front panel pinhole button. 72 73config PPC_IBM_CELL_POWERBUTTON 74 tristate "IBM Cell Blade power button" 75 depends on PPC_IBM_CELL_BLADE && INPUT_EVDEV 76 default y 77 help 78 Support Powerbutton on IBM Cell blades. 79 This will enable the powerbutton as an input device. 80 81config CBE_THERM 82 tristate "CBE thermal support" 83 default m 84 depends on CBE_RAS && SPU_BASE 85 86config PPC_PMI 87 tristate 88 default y 89 depends on CPU_FREQ_CBE_PMI || PPC_IBM_CELL_POWERBUTTON 90 help 91 PMI (Platform Management Interrupt) is a way to 92 communicate with the BMC (Baseboard Management Controller). 93 It is used in some IBM Cell blades. 94 95config CBE_CPUFREQ_SPU_GOVERNOR 96 tristate "CBE frequency scaling based on SPU usage" 97 depends on SPU_FS && CPU_FREQ 98 default m 99 help 100 This governor checks for spu usage to adjust the cpu frequency. 101 If no spu is running on a given cpu, that cpu will be throttled to 102 the minimal possible frequency. 103 104endmenu 105 106config OPROFILE_CELL 107 def_bool y 108 depends on PPC_CELL_NATIVE && (OPROFILE = m || OPROFILE = y) && SPU_BASE 109 110