1config PPC_CELL 2 bool 3 default n 4 5config PPC_CELL_NATIVE 6 bool 7 select PPC_CELL 8 select PPC_DCR_MMIO 9 select PPC_OF_PLATFORM_PCI 10 select PPC_INDIRECT_IO 11 select PPC_NATIVE 12 select MPIC 13 select IBM_NEW_EMAC_EMAC4 14 select IBM_NEW_EMAC_RGMII 15 select IBM_NEW_EMAC_ZMII #test only 16 select IBM_NEW_EMAC_TAH #test only 17 default n 18 19config PPC_IBM_CELL_BLADE 20 bool "IBM Cell Blade" 21 depends on PPC_MULTIPLATFORM && PPC64 22 select PPC_CELL_NATIVE 23 select PPC_RTAS 24 select MMIO_NVRAM 25 select PPC_UDBG_16550 26 select UDBG_RTAS_CONSOLE 27 28menu "Cell Broadband Engine options" 29 depends on PPC_CELL 30 31config SPU_FS 32 tristate "SPU file system" 33 default m 34 depends on PPC_CELL 35 select SPU_BASE 36 select MEMORY_HOTPLUG 37 help 38 The SPU file system is used to access Synergistic Processing 39 Units on machines implementing the Broadband Processor 40 Architecture. 41 42config SPU_FS_64K_LS 43 bool "Use 64K pages to map SPE local store" 44 # we depend on PPC_MM_SLICES for now rather than selecting 45 # it because we depend on hugetlbfs hooks being present. We 46 # will fix that when the generic code has been improved to 47 # not require hijacking hugetlbfs hooks. 48 depends on SPU_FS && PPC_MM_SLICES && !PPC_64K_PAGES 49 default y 50 select PPC_HAS_HASH_64K 51 help 52 This option causes SPE local stores to be mapped in process 53 address spaces using 64K pages while the rest of the kernel 54 uses 4K pages. This can improve performances of applications 55 using multiple SPEs by lowering the TLB pressure on them. 56 57config SPU_BASE 58 bool 59 default n 60 61config CBE_RAS 62 bool "RAS features for bare metal Cell BE" 63 depends on PPC_CELL_NATIVE 64 default y 65 66config CBE_THERM 67 tristate "CBE thermal support" 68 default m 69 depends on CBE_RAS 70 71config CBE_CPUFREQ 72 tristate "CBE frequency scaling" 73 depends on CBE_RAS && CPU_FREQ 74 default m 75 help 76 This adds the cpufreq driver for Cell BE processors. 77 For details, take a look at <file:Documentation/cpu-freq/>. 78 If you don't have such processor, say N 79 80config CBE_CPUFREQ_PMI 81 tristate "CBE frequency scaling using PMI interface" 82 depends on CBE_CPUFREQ && PPC_PMI && EXPERIMENTAL 83 default n 84 help 85 Select this, if you want to use the PMI interface 86 to switch frequencies. Using PMI, the 87 processor will not only be able to run at lower speed, 88 but also at lower core voltage. 89 90endmenu 91