1# SPDX-License-Identifier: GPL-2.0 2menu "Platform support" 3 4source "arch/powerpc/platforms/powernv/Kconfig" 5source "arch/powerpc/platforms/pseries/Kconfig" 6source "arch/powerpc/platforms/chrp/Kconfig" 7source "arch/powerpc/platforms/512x/Kconfig" 8source "arch/powerpc/platforms/52xx/Kconfig" 9source "arch/powerpc/platforms/powermac/Kconfig" 10source "arch/powerpc/platforms/pasemi/Kconfig" 11source "arch/powerpc/platforms/ps3/Kconfig" 12source "arch/powerpc/platforms/cell/Kconfig" 13source "arch/powerpc/platforms/8xx/Kconfig" 14source "arch/powerpc/platforms/82xx/Kconfig" 15source "arch/powerpc/platforms/83xx/Kconfig" 16source "arch/powerpc/platforms/85xx/Kconfig" 17source "arch/powerpc/platforms/86xx/Kconfig" 18source "arch/powerpc/platforms/embedded6xx/Kconfig" 19source "arch/powerpc/platforms/44x/Kconfig" 20source "arch/powerpc/platforms/amigaone/Kconfig" 21source "arch/powerpc/platforms/book3s/Kconfig" 22source "arch/powerpc/platforms/microwatt/Kconfig" 23 24config KVM_GUEST 25 bool "KVM Guest support" 26 select EPAPR_PARAVIRT 27 help 28 This option enables various optimizations for running under the KVM 29 hypervisor. Overhead for the kernel when not running inside KVM should 30 be minimal. 31 32 In case of doubt, say Y 33 34config EPAPR_PARAVIRT 35 bool "ePAPR para-virtualization support" 36 help 37 Enables ePAPR para-virtualization support for guests. 38 39 In case of doubt, say Y 40 41config PPC_HASH_MMU_NATIVE 42 bool 43 depends on PPC_BOOK3S 44 help 45 Support for running natively on the hardware, i.e. without 46 a hypervisor. This option is not user-selectable but should 47 be selected by all platforms that need it. 48 49config PPC_OF_BOOT_TRAMPOLINE 50 bool "Support booting from Open Firmware or yaboot" 51 depends on PPC_BOOK3S_32 || PPC64 52 select RELOCATABLE if PPC64 53 default y 54 help 55 Support from booting from Open Firmware or yaboot using an 56 Open Firmware client interface. This enables the kernel to 57 communicate with open firmware to retrieve system information 58 such as the device tree. 59 60 In case of doubt, say Y 61 62config PPC_DT_CPU_FTRS 63 bool "Device-tree based CPU feature discovery & setup" 64 depends on PPC_BOOK3S_64 65 default y 66 help 67 This enables code to use a new device tree binding for describing CPU 68 compatibility and features. Saying Y here will attempt to use the new 69 binding if the firmware provides it. Currently only the skiboot 70 firmware provides this binding. 71 If you're not sure say Y. 72 73config UDBG_RTAS_CONSOLE 74 bool "RTAS based debug console" 75 depends on PPC_RTAS 76 77config PPC_SMP_MUXED_IPI 78 bool 79 help 80 Select this option if your platform supports SMP and your 81 interrupt controller provides less than 4 interrupts to each 82 cpu. This will enable the generic code to multiplex the 4 83 messages on to one ipi. 84 85config IPIC 86 bool 87 88config MPIC 89 bool 90 91config MPIC_TIMER 92 bool "MPIC Global Timer" 93 depends on MPIC && FSL_SOC 94 help 95 The MPIC global timer is a hardware timer inside the 96 Freescale PIC complying with OpenPIC standard. When the 97 specified interval times out, the hardware timer generates 98 an interrupt. The driver currently is only tested on fsl 99 chip, but it can potentially support other global timers 100 complying with the OpenPIC standard. 101 102config FSL_MPIC_TIMER_WAKEUP 103 tristate "Freescale MPIC global timer wakeup driver" 104 depends on FSL_SOC && MPIC_TIMER && PM 105 help 106 The driver provides a way to wake up the system by MPIC 107 timer. 108 e.g. "echo 5 > /sys/devices/system/mpic/timer_wakeup" 109 110config PPC_EPAPR_HV_PIC 111 bool 112 select EPAPR_PARAVIRT 113 114config MPIC_WEIRD 115 bool 116 117config MPIC_MSGR 118 bool "MPIC message register support" 119 depends on MPIC 120 help 121 Enables support for the MPIC message registers. These 122 registers are used for inter-processor communication. 123 124config PPC_I8259 125 bool 126 127config U3_DART 128 bool 129 depends on PPC64 130 131config PPC_RTAS 132 bool 133 134config RTAS_ERROR_LOGGING 135 bool 136 depends on PPC_RTAS 137 138config PPC_RTAS_DAEMON 139 bool 140 depends on PPC_RTAS 141 142config RTAS_PROC 143 bool "Proc interface to RTAS" 144 depends on PPC_RTAS && PROC_FS 145 default y 146 147config RTAS_FLASH 148 tristate "Firmware flash interface" 149 depends on PPC64 && RTAS_PROC 150 151config MMIO_NVRAM 152 bool 153 154config MPIC_U3_HT_IRQS 155 bool 156 157config MPIC_BROKEN_REGREAD 158 bool 159 depends on MPIC 160 help 161 This option enables a MPIC driver workaround for some chips 162 that have a bug that causes some interrupt source information 163 to not read back properly. It is safe to use on other chips as 164 well, but enabling it uses about 8KB of memory to keep copies 165 of the register contents in software. 166 167config EEH 168 bool 169 depends on (PPC_POWERNV || PPC_PSERIES) && PCI 170 default y 171 172config PPC_MPC106 173 bool 174 175config PPC_970_NAP 176 bool 177 178config PPC_P7_NAP 179 bool 180 181config PPC_BOOK3S_IDLE 182 def_bool y 183 depends on (PPC_970_NAP || PPC_P7_NAP) 184 185config PPC_INDIRECT_PIO 186 bool 187 select GENERIC_IOMAP 188 189config PPC_INDIRECT_MMIO 190 bool 191 192config PPC_IO_WORKAROUNDS 193 bool 194 195source "drivers/cpufreq/Kconfig" 196 197menu "CPUIdle driver" 198 199source "drivers/cpuidle/Kconfig" 200 201endmenu 202 203config TAU 204 bool "On-chip CPU temperature sensor support" 205 depends on PPC_BOOK3S_32 206 help 207 G3 and G4 processors have an on-chip temperature sensor called the 208 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die 209 temperature within 2-4 degrees Celsius. This option shows the current 210 on-die temperature in /proc/cpuinfo if the cpu supports it. 211 212 Unfortunately, this sensor is very inaccurate when uncalibrated, so 213 don't assume the cpu temp is actually what /proc/cpuinfo says it is. 214 215config TAU_INT 216 bool "Interrupt driven TAU driver (EXPERIMENTAL)" 217 depends on TAU 218 help 219 The TAU supports an interrupt driven mode which causes an interrupt 220 whenever the temperature goes out of range. This is the fastest way 221 to get notified the temp has exceeded a range. With this option off, 222 a timer is used to re-check the temperature periodically. 223 224 If in doubt, say N here. 225 226config TAU_AVERAGE 227 bool "Average high and low temp" 228 depends on TAU 229 help 230 The TAU hardware can compare the temperature to an upper and lower 231 bound. The default behavior is to show both the upper and lower 232 bound in /proc/cpuinfo. If the range is large, the temperature is 233 either changing a lot, or the TAU hardware is broken (likely on some 234 G4's). If the range is small (around 4 degrees), the temperature is 235 relatively stable. If you say Y here, a single temperature value, 236 halfway between the upper and lower bounds, will be reported in 237 /proc/cpuinfo. 238 239 If in doubt, say N here. 240 241config QE_GPIO 242 bool "QE GPIO support" 243 depends on QUICC_ENGINE 244 select GPIOLIB 245 select OF_GPIO_MM_GPIOCHIP 246 help 247 Say Y here if you're going to use hardware that connects to the 248 QE GPIOs. 249 250config CPM2 251 bool "Enable support for the CPM2 (Communications Processor Module)" 252 depends on (FSL_SOC_BOOKE && PPC32) || PPC_82xx 253 select CPM 254 select HAVE_PCI 255 select GPIOLIB 256 select OF_GPIO_MM_GPIOCHIP 257 help 258 The CPM2 (Communications Processor Module) is a coprocessor on 259 embedded CPUs made by Freescale. Selecting this option means that 260 you wish to build a kernel for a machine with a CPM2 coprocessor 261 on it (826x, 827x, 8560). 262 263config FSL_ULI1575 264 bool "ULI1575 PCIe south bridge support" 265 depends on FSL_SOC_BOOKE || PPC_86xx 266 depends on PCI 267 select FSL_PCI 268 select GENERIC_ISA_DMA 269 help 270 Supports for the ULI1575 PCIe south bridge that exists on some 271 Freescale reference boards. The boards all use the ULI in pretty 272 much the same way. 273 274config CPM 275 bool 276 select GENERIC_ALLOCATOR 277 278config OF_RTC 279 bool 280 help 281 Uses information from the OF or flattened device tree to instantiate 282 platform devices for direct mapped RTC chips like the DS1742 or DS1743. 283 284config GEN_RTC 285 bool "Use the platform RTC operations from user space" 286 select RTC_CLASS 287 select RTC_DRV_GENERIC 288 help 289 This option provides backwards compatibility with the old gen_rtc.ko 290 module that was traditionally used for old PowerPC machines. 291 Platforms should migrate to enabling the RTC_DRV_GENERIC by hand 292 replacing their get_rtc_time/set_rtc_time callbacks with 293 a proper RTC device driver. 294 295config MCU_MPC8349EMITX 296 bool "MPC8349E-mITX MCU driver" 297 depends on I2C=y && PPC_83xx 298 select GPIOLIB 299 help 300 Say Y here to enable soft power-off functionality on the Freescale 301 boards with the MPC8349E-mITX-compatible MCU chips. This driver will 302 also register MCU GPIOs with the generic GPIO API, so you'll able 303 to use MCU pins as GPIOs. 304 305endmenu 306