1# SPDX-License-Identifier: GPL-2.0 2menu "Platform support" 3 4source "arch/powerpc/platforms/powernv/Kconfig" 5source "arch/powerpc/platforms/pseries/Kconfig" 6source "arch/powerpc/platforms/chrp/Kconfig" 7source "arch/powerpc/platforms/512x/Kconfig" 8source "arch/powerpc/platforms/52xx/Kconfig" 9source "arch/powerpc/platforms/powermac/Kconfig" 10source "arch/powerpc/platforms/pasemi/Kconfig" 11source "arch/powerpc/platforms/ps3/Kconfig" 12source "arch/powerpc/platforms/cell/Kconfig" 13source "arch/powerpc/platforms/8xx/Kconfig" 14source "arch/powerpc/platforms/82xx/Kconfig" 15source "arch/powerpc/platforms/83xx/Kconfig" 16source "arch/powerpc/platforms/85xx/Kconfig" 17source "arch/powerpc/platforms/86xx/Kconfig" 18source "arch/powerpc/platforms/embedded6xx/Kconfig" 19source "arch/powerpc/platforms/44x/Kconfig" 20source "arch/powerpc/platforms/amigaone/Kconfig" 21source "arch/powerpc/platforms/book3s/Kconfig" 22source "arch/powerpc/platforms/microwatt/Kconfig" 23 24config KVM_GUEST 25 bool "KVM Guest support" 26 select EPAPR_PARAVIRT 27 help 28 This option enables various optimizations for running under the KVM 29 hypervisor. Overhead for the kernel when not running inside KVM should 30 be minimal. 31 32 In case of doubt, say Y 33 34config EPAPR_PARAVIRT 35 bool "ePAPR para-virtualization support" 36 help 37 Enables ePAPR para-virtualization support for guests. 38 39 In case of doubt, say Y 40 41config PPC_HASH_MMU_NATIVE 42 bool 43 depends on PPC_BOOK3S 44 help 45 Support for running natively on the hardware, i.e. without 46 a hypervisor. This option is not user-selectable but should 47 be selected by all platforms that need it. 48 49config PPC_OF_BOOT_TRAMPOLINE 50 bool "Support booting from Open Firmware or yaboot" 51 depends on PPC_BOOK3S_32 || PPC64 52 select RELOCATABLE if PPC64 53 default y 54 help 55 Support from booting from Open Firmware or yaboot using an 56 Open Firmware client interface. This enables the kernel to 57 communicate with open firmware to retrieve system information 58 such as the device tree. 59 60 In case of doubt, say Y 61 62config PPC_DT_CPU_FTRS 63 bool "Device-tree based CPU feature discovery & setup" 64 depends on PPC_BOOK3S_64 65 default y 66 help 67 This enables code to use a new device tree binding for describing CPU 68 compatibility and features. Saying Y here will attempt to use the new 69 binding if the firmware provides it. Currently only the skiboot 70 firmware provides this binding. 71 If you're not sure say Y. 72 73config PPC_SMP_MUXED_IPI 74 bool 75 help 76 Select this option if your platform supports SMP and your 77 interrupt controller provides less than 4 interrupts to each 78 cpu. This will enable the generic code to multiplex the 4 79 messages on to one ipi. 80 81config IPIC 82 bool 83 84config MPIC 85 bool 86 87config MPIC_TIMER 88 bool "MPIC Global Timer" 89 depends on MPIC && FSL_SOC 90 help 91 The MPIC global timer is a hardware timer inside the 92 Freescale PIC complying with OpenPIC standard. When the 93 specified interval times out, the hardware timer generates 94 an interrupt. The driver currently is only tested on fsl 95 chip, but it can potentially support other global timers 96 complying with the OpenPIC standard. 97 98config FSL_MPIC_TIMER_WAKEUP 99 tristate "Freescale MPIC global timer wakeup driver" 100 depends on FSL_SOC && MPIC_TIMER && PM 101 help 102 The driver provides a way to wake up the system by MPIC 103 timer. 104 e.g. "echo 5 > /sys/devices/system/mpic/timer_wakeup" 105 106config PPC_EPAPR_HV_PIC 107 bool 108 select EPAPR_PARAVIRT 109 110config MPIC_WEIRD 111 bool 112 113config MPIC_MSGR 114 bool "MPIC message register support" 115 depends on MPIC 116 help 117 Enables support for the MPIC message registers. These 118 registers are used for inter-processor communication. 119 120config PPC_I8259 121 bool 122 123config U3_DART 124 bool 125 depends on PPC64 126 127config PPC_RTAS 128 bool 129 130config RTAS_ERROR_LOGGING 131 bool 132 depends on PPC_RTAS 133 134config PPC_RTAS_DAEMON 135 bool 136 depends on PPC_RTAS 137 138config RTAS_PROC 139 bool "Proc interface to RTAS" 140 depends on PPC_RTAS && PROC_FS 141 default y 142 143config RTAS_FLASH 144 tristate "Firmware flash interface" 145 depends on PPC64 && RTAS_PROC 146 147config MMIO_NVRAM 148 bool 149 150config MPIC_U3_HT_IRQS 151 bool 152 153config MPIC_BROKEN_REGREAD 154 bool 155 depends on MPIC 156 help 157 This option enables a MPIC driver workaround for some chips 158 that have a bug that causes some interrupt source information 159 to not read back properly. It is safe to use on other chips as 160 well, but enabling it uses about 8KB of memory to keep copies 161 of the register contents in software. 162 163config EEH 164 bool 165 depends on (PPC_POWERNV || PPC_PSERIES) && PCI 166 default y 167 168config PPC_MPC106 169 bool 170 171config PPC_970_NAP 172 bool 173 174config PPC_P7_NAP 175 bool 176 177config PPC_BOOK3S_IDLE 178 def_bool y 179 depends on (PPC_970_NAP || PPC_P7_NAP) 180 181config PPC_INDIRECT_PIO 182 bool 183 select GENERIC_IOMAP 184 185source "drivers/cpufreq/Kconfig" 186 187menu "CPUIdle driver" 188 189source "drivers/cpuidle/Kconfig" 190 191endmenu 192 193config TAU 194 bool "On-chip CPU temperature sensor support" 195 depends on PPC_BOOK3S_32 196 help 197 G3 and G4 processors have an on-chip temperature sensor called the 198 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die 199 temperature within 2-4 degrees Celsius. This option shows the current 200 on-die temperature in /proc/cpuinfo if the cpu supports it. 201 202 Unfortunately, this sensor is very inaccurate when uncalibrated, so 203 don't assume the cpu temp is actually what /proc/cpuinfo says it is. 204 205config TAU_INT 206 bool "Interrupt driven TAU driver (EXPERIMENTAL)" 207 depends on TAU 208 help 209 The TAU supports an interrupt driven mode which causes an interrupt 210 whenever the temperature goes out of range. This is the fastest way 211 to get notified the temp has exceeded a range. With this option off, 212 a timer is used to re-check the temperature periodically. 213 214 If in doubt, say N here. 215 216config TAU_AVERAGE 217 bool "Average high and low temp" 218 depends on TAU 219 help 220 The TAU hardware can compare the temperature to an upper and lower 221 bound. The default behavior is to show both the upper and lower 222 bound in /proc/cpuinfo. If the range is large, the temperature is 223 either changing a lot, or the TAU hardware is broken (likely on some 224 G4's). If the range is small (around 4 degrees), the temperature is 225 relatively stable. If you say Y here, a single temperature value, 226 halfway between the upper and lower bounds, will be reported in 227 /proc/cpuinfo. 228 229 If in doubt, say N here. 230 231config QE_GPIO 232 bool "QE GPIO support" 233 depends on QUICC_ENGINE 234 select GPIOLIB 235 select OF_GPIO_MM_GPIOCHIP 236 help 237 Say Y here if you're going to use hardware that connects to the 238 QE GPIOs. 239 240config CPM2 241 bool "Enable support for the CPM2 (Communications Processor Module)" 242 depends on (FSL_SOC_BOOKE && PPC32) || PPC_82xx 243 select CPM 244 select HAVE_PCI 245 select GPIOLIB 246 help 247 The CPM2 (Communications Processor Module) is a coprocessor on 248 embedded CPUs made by Freescale. Selecting this option means that 249 you wish to build a kernel for a machine with a CPM2 coprocessor 250 on it (826x, 827x, 8560). 251 252config FSL_ULI1575 253 bool "ULI1575 PCIe south bridge support" 254 depends on FSL_SOC_BOOKE || PPC_86xx 255 depends on PCI 256 select FSL_PCI 257 select GENERIC_ISA_DMA 258 help 259 Supports for the ULI1575 PCIe south bridge that exists on some 260 Freescale reference boards. The boards all use the ULI in pretty 261 much the same way. 262 263config CPM 264 bool 265 select GENERIC_ALLOCATOR 266 267config OF_RTC 268 bool 269 help 270 Uses information from the OF or flattened device tree to instantiate 271 platform devices for direct mapped RTC chips like the DS1742 or DS1743. 272 273config GEN_RTC 274 bool "Use the platform RTC operations from user space" 275 select RTC_CLASS 276 select RTC_DRV_GENERIC 277 help 278 This option provides backwards compatibility with the old gen_rtc.ko 279 module that was traditionally used for old PowerPC machines. 280 Platforms should migrate to enabling the RTC_DRV_GENERIC by hand 281 replacing their get_rtc_time/set_rtc_time callbacks with 282 a proper RTC device driver. 283 284config MCU_MPC8349EMITX 285 bool "MPC8349E-mITX MCU driver" 286 depends on I2C=y && PPC_83xx 287 select GPIOLIB 288 help 289 Say Y here to enable soft power-off functionality on the Freescale 290 boards with the MPC8349E-mITX-compatible MCU chips. This driver will 291 also register MCU GPIOs with the generic GPIO API, so you'll able 292 to use MCU pins as GPIOs. 293 294endmenu 295