1*b2441318SGreg Kroah-Hartman# SPDX-License-Identifier: GPL-2.0 24330f5daSKumar Galamenu "Platform support" 34330f5daSKumar Gala 455190f88SBenjamin Herrenschmidtsource "arch/powerpc/platforms/powernv/Kconfig" 54330f5daSKumar Galasource "arch/powerpc/platforms/pseries/Kconfig" 64330f5daSKumar Galasource "arch/powerpc/platforms/chrp/Kconfig" 7e177edcdSJohn Rigbysource "arch/powerpc/platforms/512x/Kconfig" 84330f5daSKumar Galasource "arch/powerpc/platforms/52xx/Kconfig" 94330f5daSKumar Galasource "arch/powerpc/platforms/powermac/Kconfig" 104330f5daSKumar Galasource "arch/powerpc/platforms/maple/Kconfig" 114330f5daSKumar Galasource "arch/powerpc/platforms/pasemi/Kconfig" 1298750261SKumar Galasource "arch/powerpc/platforms/ps3/Kconfig" 1398750261SKumar Galasource "arch/powerpc/platforms/cell/Kconfig" 14c8a55f3dSKumar Galasource "arch/powerpc/platforms/8xx/Kconfig" 15d6071f88SKumar Galasource "arch/powerpc/platforms/82xx/Kconfig" 16b5a48346SKumar Galasource "arch/powerpc/platforms/83xx/Kconfig" 17db947808SKumar Galasource "arch/powerpc/platforms/85xx/Kconfig" 184a89f7faSKumar Galasource "arch/powerpc/platforms/86xx/Kconfig" 1998750261SKumar Galasource "arch/powerpc/platforms/embedded6xx/Kconfig" 20f6dfc805SDavid Gibsonsource "arch/powerpc/platforms/44x/Kconfig" 21545c069cSJosh Boyersource "arch/powerpc/platforms/40x/Kconfig" 2254b318aaSGerhard Pirchersource "arch/powerpc/platforms/amigaone/Kconfig" 234330f5daSKumar Gala 24d17051cbSAlexander Grafconfig KVM_GUEST 25d17051cbSAlexander Graf bool "KVM Guest support" 26643ba4e3SAnton Blanchard default n 272e1ae9c0SLiu Yu-B13201 select EPAPR_PARAVIRT 28d17051cbSAlexander Graf ---help--- 29d17051cbSAlexander Graf This option enables various optimizations for running under the KVM 30d17051cbSAlexander Graf hypervisor. Overhead for the kernel when not running inside KVM should 31d17051cbSAlexander Graf be minimal. 32d17051cbSAlexander Graf 33d17051cbSAlexander Graf In case of doubt, say Y 34d17051cbSAlexander Graf 352e1ae9c0SLiu Yu-B13201config EPAPR_PARAVIRT 362e1ae9c0SLiu Yu-B13201 bool "ePAPR para-virtualization support" 372e1ae9c0SLiu Yu-B13201 default n 382e1ae9c0SLiu Yu-B13201 help 392e1ae9c0SLiu Yu-B13201 Enables ePAPR para-virtualization support for guests. 402e1ae9c0SLiu Yu-B13201 412e1ae9c0SLiu Yu-B13201 In case of doubt, say Y 422e1ae9c0SLiu Yu-B13201 434330f5daSKumar Galaconfig PPC_NATIVE 444330f5daSKumar Gala bool 4528794d34SBenjamin Herrenschmidt depends on 6xx || PPC64 464330f5daSKumar Gala help 474330f5daSKumar Gala Support for running natively on the hardware, i.e. without 484330f5daSKumar Gala a hypervisor. This option is not user-selectable but should 494330f5daSKumar Gala be selected by all platforms that need it. 504330f5daSKumar Gala 5128794d34SBenjamin Herrenschmidtconfig PPC_OF_BOOT_TRAMPOLINE 5228794d34SBenjamin Herrenschmidt bool "Support booting from Open Firmware or yaboot" 5328794d34SBenjamin Herrenschmidt depends on 6xx || PPC64 5428794d34SBenjamin Herrenschmidt default y 5528794d34SBenjamin Herrenschmidt help 5628794d34SBenjamin Herrenschmidt Support from booting from Open Firmware or yaboot using an 5728794d34SBenjamin Herrenschmidt Open Firmware client interface. This enables the kernel to 58f65e51d7SSylvestre Ledru communicate with open firmware to retrieve system information 5928794d34SBenjamin Herrenschmidt such as the device tree. 6028794d34SBenjamin Herrenschmidt 6128794d34SBenjamin Herrenschmidt In case of doubt, say Y 6228794d34SBenjamin Herrenschmidt 63c6ee9619SMichael Ellermanconfig PPC_DT_CPU_FTRS 64c6ee9619SMichael Ellerman bool "Device-tree based CPU feature discovery & setup" 65c6ee9619SMichael Ellerman depends on PPC_BOOK3S_64 66c6ee9619SMichael Ellerman default y 67c6ee9619SMichael Ellerman help 68c6ee9619SMichael Ellerman This enables code to use a new device tree binding for describing CPU 69c6ee9619SMichael Ellerman compatibility and features. Saying Y here will attempt to use the new 70c6ee9619SMichael Ellerman binding if the firmware provides it. Currently only the skiboot 71c6ee9619SMichael Ellerman firmware provides this binding. 72c6ee9619SMichael Ellerman If you're not sure say Y. 73c6ee9619SMichael Ellerman 744330f5daSKumar Galaconfig UDBG_RTAS_CONSOLE 754330f5daSKumar Gala bool "RTAS based debug console" 764330f5daSKumar Gala depends on PPC_RTAS 774330f5daSKumar Gala default n 784330f5daSKumar Gala 791ece355bSMilton Millerconfig PPC_SMP_MUXED_IPI 801ece355bSMilton Miller bool 811ece355bSMilton Miller help 821ece355bSMilton Miller Select this opton if your platform supports SMP and your 831ece355bSMilton Miller interrupt controller provides less than 4 interrupts to each 841ece355bSMilton Miller cpu. This will enable the generic code to multiplex the 4 851ece355bSMilton Miller messages on to one ipi. 861ece355bSMilton Miller 87b0bbad60SJohn Rigbyconfig IPIC 88b0bbad60SJohn Rigby bool 89b0bbad60SJohn Rigby default n 90b0bbad60SJohn Rigby 9198750261SKumar Galaconfig MPIC 9298750261SKumar Gala bool 9398750261SKumar Gala default n 9498750261SKumar Gala 9536ca09beSDongsheng.wang@freescale.comconfig MPIC_TIMER 9636ca09beSDongsheng.wang@freescale.com bool "MPIC Global Timer" 9736ca09beSDongsheng.wang@freescale.com depends on MPIC && FSL_SOC 9836ca09beSDongsheng.wang@freescale.com default n 9936ca09beSDongsheng.wang@freescale.com help 10036ca09beSDongsheng.wang@freescale.com The MPIC global timer is a hardware timer inside the 10136ca09beSDongsheng.wang@freescale.com Freescale PIC complying with OpenPIC standard. When the 10236ca09beSDongsheng.wang@freescale.com specified interval times out, the hardware timer generates 10336ca09beSDongsheng.wang@freescale.com an interrupt. The driver currently is only tested on fsl 10436ca09beSDongsheng.wang@freescale.com chip, but it can potentially support other global timers 10536ca09beSDongsheng.wang@freescale.com complying with the OpenPIC standard. 10636ca09beSDongsheng.wang@freescale.com 107a63b3bc7SDongsheng.wang@freescale.comconfig FSL_MPIC_TIMER_WAKEUP 108a63b3bc7SDongsheng.wang@freescale.com tristate "Freescale MPIC global timer wakeup driver" 109a63b3bc7SDongsheng.wang@freescale.com depends on FSL_SOC && MPIC_TIMER && PM 110a63b3bc7SDongsheng.wang@freescale.com default n 111a63b3bc7SDongsheng.wang@freescale.com help 112a63b3bc7SDongsheng.wang@freescale.com The driver provides a way to wake up the system by MPIC 113a63b3bc7SDongsheng.wang@freescale.com timer. 114a63b3bc7SDongsheng.wang@freescale.com e.g. "echo 5 > /sys/devices/system/mpic/timer_wakeup" 115a63b3bc7SDongsheng.wang@freescale.com 1163a93261fSAshish Kalraconfig PPC_EPAPR_HV_PIC 1173a93261fSAshish Kalra bool 1183a93261fSAshish Kalra default n 11940656397SStuart Yoder select EPAPR_PARAVIRT 1203a93261fSAshish Kalra 12198750261SKumar Galaconfig MPIC_WEIRD 12298750261SKumar Gala bool 12398750261SKumar Gala default n 12498750261SKumar Gala 1258626816eSJia Hongtaoconfig MPIC_MSGR 1268626816eSJia Hongtao bool "MPIC message register support" 1278626816eSJia Hongtao depends on MPIC 1288626816eSJia Hongtao default n 1298626816eSJia Hongtao help 1308626816eSJia Hongtao Enables support for the MPIC message registers. These 1318626816eSJia Hongtao registers are used for inter-processor communication. 1328626816eSJia Hongtao 13398750261SKumar Galaconfig PPC_I8259 13498750261SKumar Gala bool 13598750261SKumar Gala default n 13698750261SKumar Gala 1374330f5daSKumar Galaconfig U3_DART 1384330f5daSKumar Gala bool 13928794d34SBenjamin Herrenschmidt depends on PPC64 1404330f5daSKumar Gala default n 1414330f5daSKumar Gala 1424330f5daSKumar Galaconfig PPC_RTAS 1434330f5daSKumar Gala bool 1444330f5daSKumar Gala default n 1454330f5daSKumar Gala 1464330f5daSKumar Galaconfig RTAS_ERROR_LOGGING 1474330f5daSKumar Gala bool 1484330f5daSKumar Gala depends on PPC_RTAS 1494330f5daSKumar Gala default n 1504330f5daSKumar Gala 1513d541c4bSBenjamin Herrenschmidtconfig PPC_RTAS_DAEMON 1523d541c4bSBenjamin Herrenschmidt bool 1533d541c4bSBenjamin Herrenschmidt depends on PPC_RTAS 1543d541c4bSBenjamin Herrenschmidt default n 1553d541c4bSBenjamin Herrenschmidt 1564330f5daSKumar Galaconfig RTAS_PROC 1574330f5daSKumar Gala bool "Proc interface to RTAS" 158b80ec3dcSMichael Ellerman depends on PPC_RTAS && PROC_FS 1594330f5daSKumar Gala default y 1604330f5daSKumar Gala 1614330f5daSKumar Galaconfig RTAS_FLASH 1624330f5daSKumar Gala tristate "Firmware flash interface" 1634330f5daSKumar Gala depends on PPC64 && RTAS_PROC 1644330f5daSKumar Gala 1654330f5daSKumar Galaconfig MMIO_NVRAM 1664330f5daSKumar Gala bool 1674330f5daSKumar Gala default n 1684330f5daSKumar Gala 1696cfef5b2SMichael Ellermanconfig MPIC_U3_HT_IRQS 1704330f5daSKumar Gala bool 171314b389bSAndreas Schwab default n 1724330f5daSKumar Gala 1730d72ba93SOlof Johanssonconfig MPIC_BROKEN_REGREAD 1740d72ba93SOlof Johansson bool 1750d72ba93SOlof Johansson depends on MPIC 1760d72ba93SOlof Johansson help 1770d72ba93SOlof Johansson This option enables a MPIC driver workaround for some chips 1780d72ba93SOlof Johansson that have a bug that causes some interrupt source information 1790d72ba93SOlof Johansson to not read back properly. It is safe to use on other chips as 1800d72ba93SOlof Johansson well, but enabling it uses about 8KB of memory to keep copies 1810d72ba93SOlof Johansson of the register contents in software. 1820d72ba93SOlof Johansson 183317f06deSGavin Shanconfig EEH 184317f06deSGavin Shan bool 185317f06deSGavin Shan depends on (PPC_POWERNV || PPC_PSERIES) && PCI 186317f06deSGavin Shan default y 187317f06deSGavin Shan 1884330f5daSKumar Galaconfig PPC_MPC106 1894330f5daSKumar Gala bool 1904330f5daSKumar Gala default n 1914330f5daSKumar Gala 1924330f5daSKumar Galaconfig PPC_970_NAP 1934330f5daSKumar Gala bool 1944330f5daSKumar Gala default n 1954330f5daSKumar Gala 196948cf67cSBenjamin Herrenschmidtconfig PPC_P7_NAP 197948cf67cSBenjamin Herrenschmidt bool 198948cf67cSBenjamin Herrenschmidt default n 199948cf67cSBenjamin Herrenschmidt 200ecd73cc5SBenjamin Herrenschmidtconfig PPC_INDIRECT_PIO 2014330f5daSKumar Gala bool 2024330f5daSKumar Gala select GENERIC_IOMAP 20321176fedSMichael Ellerman 20421176fedSMichael Ellermanconfig PPC_INDIRECT_MMIO 20521176fedSMichael Ellerman bool 2064330f5daSKumar Gala 2073cc30d07SMichael Ellermanconfig PPC_IO_WORKAROUNDS 2083cc30d07SMichael Ellerman bool 2093cc30d07SMichael Ellerman 2104330f5daSKumar Galasource "drivers/cpufreq/Kconfig" 2114330f5daSKumar Gala 212e179816cSDeepthi Dharwarmenu "CPUIdle driver" 213e179816cSDeepthi Dharwar 214e179816cSDeepthi Dharwarsource "drivers/cpuidle/Kconfig" 215e179816cSDeepthi Dharwar 216e179816cSDeepthi Dharwarendmenu 217e179816cSDeepthi Dharwar 2184330f5daSKumar Galaconfig PPC601_SYNC_FIX 2194330f5daSKumar Gala bool "Workarounds for PPC601 bugs" 220933ee711SPaul Bolle depends on 6xx && PPC_PMAC 2214330f5daSKumar Gala help 2224330f5daSKumar Gala Some versions of the PPC601 (the first PowerPC chip) have bugs which 2234330f5daSKumar Gala mean that extra synchronization instructions are required near 2244330f5daSKumar Gala certain instructions, typically those that make major changes to the 2254330f5daSKumar Gala CPU state. These extra instructions reduce performance slightly. 2264330f5daSKumar Gala If you say N here, these extra instructions will not be included, 2274330f5daSKumar Gala resulting in a kernel which will run faster but may not run at all 2284330f5daSKumar Gala on some systems with the PPC601 chip. 2294330f5daSKumar Gala 2304330f5daSKumar Gala If in doubt, say Y here. 2314330f5daSKumar Gala 2324330f5daSKumar Galaconfig TAU 2334330f5daSKumar Gala bool "On-chip CPU temperature sensor support" 23428794d34SBenjamin Herrenschmidt depends on 6xx 2354330f5daSKumar Gala help 2364330f5daSKumar Gala G3 and G4 processors have an on-chip temperature sensor called the 2374330f5daSKumar Gala 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die 2384330f5daSKumar Gala temperature within 2-4 degrees Celsius. This option shows the current 2394330f5daSKumar Gala on-die temperature in /proc/cpuinfo if the cpu supports it. 2404330f5daSKumar Gala 2414330f5daSKumar Gala Unfortunately, on some chip revisions, this sensor is very inaccurate 2424330f5daSKumar Gala and in many cases, does not work at all, so don't assume the cpu 2434330f5daSKumar Gala temp is actually what /proc/cpuinfo says it is. 2444330f5daSKumar Gala 2454330f5daSKumar Galaconfig TAU_INT 2464330f5daSKumar Gala bool "Interrupt driven TAU driver (DANGEROUS)" 2474330f5daSKumar Gala depends on TAU 2484330f5daSKumar Gala ---help--- 2494330f5daSKumar Gala The TAU supports an interrupt driven mode which causes an interrupt 2504330f5daSKumar Gala whenever the temperature goes out of range. This is the fastest way 2514330f5daSKumar Gala to get notified the temp has exceeded a range. With this option off, 2524330f5daSKumar Gala a timer is used to re-check the temperature periodically. 2534330f5daSKumar Gala 2544330f5daSKumar Gala However, on some cpus it appears that the TAU interrupt hardware 2554330f5daSKumar Gala is buggy and can cause a situation which would lead unexplained hard 2564330f5daSKumar Gala lockups. 2574330f5daSKumar Gala 2584330f5daSKumar Gala Unless you are extending the TAU driver, or enjoy kernel/hardware 2594330f5daSKumar Gala debugging, leave this option off. 2604330f5daSKumar Gala 2614330f5daSKumar Galaconfig TAU_AVERAGE 2624330f5daSKumar Gala bool "Average high and low temp" 2634330f5daSKumar Gala depends on TAU 2644330f5daSKumar Gala ---help--- 2654330f5daSKumar Gala The TAU hardware can compare the temperature to an upper and lower 2664330f5daSKumar Gala bound. The default behavior is to show both the upper and lower 2674330f5daSKumar Gala bound in /proc/cpuinfo. If the range is large, the temperature is 2684330f5daSKumar Gala either changing a lot, or the TAU hardware is broken (likely on some 2694330f5daSKumar Gala G4's). If the range is small (around 4 degrees), the temperature is 2704330f5daSKumar Gala relatively stable. If you say Y here, a single temperature value, 2714330f5daSKumar Gala halfway between the upper and lower bounds, will be reported in 2724330f5daSKumar Gala /proc/cpuinfo. 2734330f5daSKumar Gala 2744330f5daSKumar Gala If in doubt, say N here. 2754330f5daSKumar Gala 2765c091193SAnton Vorontsovconfig QE_GPIO 2775c091193SAnton Vorontsov bool "QE GPIO support" 2785c091193SAnton Vorontsov depends on QUICC_ENGINE 27986c55af4SLinus Walleij select GPIOLIB 2805c091193SAnton Vorontsov help 2815c091193SAnton Vorontsov Say Y here if you're going to use hardware that connects to the 2825c091193SAnton Vorontsov QE GPIOs. 2835c091193SAnton Vorontsov 284d6071f88SKumar Galaconfig CPM2 285b8b3caf3SPaul Gortmaker bool "Enable support for the CPM2 (Communications Processor Module)" 2865753c082SKumar Gala depends on (FSL_SOC_BOOKE && PPC32) || 8260 287c374e00eSScott Wood select CPM 288b500563bSJohn Rigby select PPC_PCI_CHOICE 28986c55af4SLinus Walleij select GPIOLIB 290d6071f88SKumar Gala help 291d6071f88SKumar Gala The CPM2 (Communications Processor Module) is a coprocessor on 292d6071f88SKumar Gala embedded CPUs made by Freescale. Selecting this option means that 293d6071f88SKumar Gala you wish to build a kernel for a machine with a CPM2 coprocessor 294d6071f88SKumar Gala on it (826x, 827x, 8560). 295d6071f88SKumar Gala 296dbdf04c4SMaxim Shchetyninconfig AXON_RAM 297dbdf04c4SMaxim Shchetynin tristate "Axon DDR2 memory device driver" 298ebf0f334SMichael Ellerman depends on PPC_IBM_CELL_BLADE && BLOCK 29960fcd55cSDan Williams select DAX 300dbdf04c4SMaxim Shchetynin default m 301dbdf04c4SMaxim Shchetynin help 302dbdf04c4SMaxim Shchetynin It registers one block device per Axon's DDR2 memory bank found 303dbdf04c4SMaxim Shchetynin on a system. Block devices are called axonram?, their major and 304dbdf04c4SMaxim Shchetynin minor numbers are available in /proc/devices, /proc/partitions or 305dbdf04c4SMaxim Shchetynin in /sys/block/axonram?/dev. 306dbdf04c4SMaxim Shchetynin 307b66510cbSKumar Galaconfig FSL_ULI1575 308b66510cbSKumar Gala bool 309b66510cbSKumar Gala default n 310fb4f0e88SKumar Gala select GENERIC_ISA_DMA 311b66510cbSKumar Gala help 312b66510cbSKumar Gala Supports for the ULI1575 PCIe south bridge that exists on some 313b66510cbSKumar Gala Freescale reference boards. The boards all use the ULI in pretty 314b66510cbSKumar Gala much the same way. 315b66510cbSKumar Gala 316c374e00eSScott Woodconfig CPM 317c374e00eSScott Wood bool 3180e6e01ffSZhao Qiang select GENERIC_ALLOCATOR 319c374e00eSScott Wood 32022258fa4SDavid Gibsonconfig OF_RTC 32122258fa4SDavid Gibson bool 32222258fa4SDavid Gibson help 323692105b8SMatt LaPlante Uses information from the OF or flattened device tree to instantiate 32422258fa4SDavid Gibson platform devices for direct mapped RTC chips like the DS1742 or DS1743. 32522258fa4SDavid Gibson 326835ea93eSArnd Bergmannconfig GEN_RTC 327835ea93eSArnd Bergmann bool "Use the platform RTC operations from user space" 328835ea93eSArnd Bergmann select RTC_CLASS 329835ea93eSArnd Bergmann select RTC_DRV_GENERIC 330835ea93eSArnd Bergmann help 331835ea93eSArnd Bergmann This option provides backwards compatibility with the old gen_rtc.ko 332835ea93eSArnd Bergmann module that was traditionally used for old PowerPC machines. 333835ea93eSArnd Bergmann Platforms should migrate to enabling the RTC_DRV_GENERIC by hand 334835ea93eSArnd Bergmann replacing their get_rtc_time/set_rtc_time callbacks with 335835ea93eSArnd Bergmann a proper RTC device driver. 336835ea93eSArnd Bergmann 3373d64de9cSAnton Vorontsovconfig SIMPLE_GPIO 3383d64de9cSAnton Vorontsov bool "Support for simple, memory-mapped GPIO controllers" 3393d64de9cSAnton Vorontsov depends on PPC 34086c55af4SLinus Walleij select GPIOLIB 3413d64de9cSAnton Vorontsov help 3423d64de9cSAnton Vorontsov Say Y here to support simple, memory-mapped GPIO controllers. 3433d64de9cSAnton Vorontsov These are usually BCSRs used to control board's switches, LEDs, 3443d64de9cSAnton Vorontsov chip-selects, Ethernet/USB PHY's power and various other small 3453d64de9cSAnton Vorontsov on-board peripherals. 3463d64de9cSAnton Vorontsov 347ea0105eaSAnton Vorontsovconfig MCU_MPC8349EMITX 3486ca6ca5dSFabio Baltieri bool "MPC8349E-mITX MCU driver" 34982640a6bSAl Viro depends on I2C=y && PPC_83xx 35086c55af4SLinus Walleij select GPIOLIB 351ea0105eaSAnton Vorontsov help 352ea0105eaSAnton Vorontsov Say Y here to enable soft power-off functionality on the Freescale 353ea0105eaSAnton Vorontsov boards with the MPC8349E-mITX-compatible MCU chips. This driver will 354ea0105eaSAnton Vorontsov also register MCU GPIOs with the generic GPIO API, so you'll able 355ea0105eaSAnton Vorontsov to use MCU pins as GPIOs. 356ea0105eaSAnton Vorontsov 35764f16502SRoderick Colenbranderconfig XILINX_PCI 35864f16502SRoderick Colenbrander bool "Xilinx PCI host bridge support" 35964f16502SRoderick Colenbrander depends on PCI && XILINX_VIRTEX 36064f16502SRoderick Colenbrander 3614330f5daSKumar Galaendmenu 362