xref: /linux/arch/powerpc/platforms/Kconfig (revision a63b3bc7db32b63bfe5f48fa8582f931db81c86e)
14330f5daSKumar Galamenu "Platform support"
24330f5daSKumar Gala
355190f88SBenjamin Herrenschmidtsource "arch/powerpc/platforms/powernv/Kconfig"
44330f5daSKumar Galasource "arch/powerpc/platforms/pseries/Kconfig"
54330f5daSKumar Galasource "arch/powerpc/platforms/chrp/Kconfig"
6e177edcdSJohn Rigbysource "arch/powerpc/platforms/512x/Kconfig"
74330f5daSKumar Galasource "arch/powerpc/platforms/52xx/Kconfig"
84330f5daSKumar Galasource "arch/powerpc/platforms/powermac/Kconfig"
94330f5daSKumar Galasource "arch/powerpc/platforms/maple/Kconfig"
104330f5daSKumar Galasource "arch/powerpc/platforms/pasemi/Kconfig"
1198750261SKumar Galasource "arch/powerpc/platforms/ps3/Kconfig"
1298750261SKumar Galasource "arch/powerpc/platforms/cell/Kconfig"
13c8a55f3dSKumar Galasource "arch/powerpc/platforms/8xx/Kconfig"
14d6071f88SKumar Galasource "arch/powerpc/platforms/82xx/Kconfig"
15b5a48346SKumar Galasource "arch/powerpc/platforms/83xx/Kconfig"
16db947808SKumar Galasource "arch/powerpc/platforms/85xx/Kconfig"
174a89f7faSKumar Galasource "arch/powerpc/platforms/86xx/Kconfig"
1898750261SKumar Galasource "arch/powerpc/platforms/embedded6xx/Kconfig"
19f6dfc805SDavid Gibsonsource "arch/powerpc/platforms/44x/Kconfig"
20545c069cSJosh Boyersource "arch/powerpc/platforms/40x/Kconfig"
2154b318aaSGerhard Pirchersource "arch/powerpc/platforms/amigaone/Kconfig"
22a1d0d98dSDavid Gibsonsource "arch/powerpc/platforms/wsp/Kconfig"
234330f5daSKumar Gala
24d17051cbSAlexander Grafconfig KVM_GUEST
25d17051cbSAlexander Graf	bool "KVM Guest support"
26643ba4e3SAnton Blanchard	default n
272e1ae9c0SLiu Yu-B13201	select EPAPR_PARAVIRT
28d17051cbSAlexander Graf	---help---
29d17051cbSAlexander Graf	  This option enables various optimizations for running under the KVM
30d17051cbSAlexander Graf	  hypervisor. Overhead for the kernel when not running inside KVM should
31d17051cbSAlexander Graf	  be minimal.
32d17051cbSAlexander Graf
33d17051cbSAlexander Graf	  In case of doubt, say Y
34d17051cbSAlexander Graf
352e1ae9c0SLiu Yu-B13201config EPAPR_PARAVIRT
362e1ae9c0SLiu Yu-B13201	bool "ePAPR para-virtualization support"
372e1ae9c0SLiu Yu-B13201	default n
382e1ae9c0SLiu Yu-B13201	help
392e1ae9c0SLiu Yu-B13201	  Enables ePAPR para-virtualization support for guests.
402e1ae9c0SLiu Yu-B13201
412e1ae9c0SLiu Yu-B13201	  In case of doubt, say Y
422e1ae9c0SLiu Yu-B13201
434330f5daSKumar Galaconfig PPC_NATIVE
444330f5daSKumar Gala	bool
4528794d34SBenjamin Herrenschmidt	depends on 6xx || PPC64
464330f5daSKumar Gala	help
474330f5daSKumar Gala	  Support for running natively on the hardware, i.e. without
484330f5daSKumar Gala	  a hypervisor. This option is not user-selectable but should
494330f5daSKumar Gala	  be selected by all platforms that need it.
504330f5daSKumar Gala
5128794d34SBenjamin Herrenschmidtconfig PPC_OF_BOOT_TRAMPOLINE
5228794d34SBenjamin Herrenschmidt	bool "Support booting from Open Firmware or yaboot"
5328794d34SBenjamin Herrenschmidt	depends on 6xx || PPC64
5428794d34SBenjamin Herrenschmidt	default y
5528794d34SBenjamin Herrenschmidt	help
5628794d34SBenjamin Herrenschmidt	  Support from booting from Open Firmware or yaboot using an
5728794d34SBenjamin Herrenschmidt	  Open Firmware client interface. This enables the kernel to
58f65e51d7SSylvestre Ledru	  communicate with open firmware to retrieve system information
5928794d34SBenjamin Herrenschmidt	  such as the device tree.
6028794d34SBenjamin Herrenschmidt
6128794d34SBenjamin Herrenschmidt	  In case of doubt, say Y
6228794d34SBenjamin Herrenschmidt
634330f5daSKumar Galaconfig UDBG_RTAS_CONSOLE
644330f5daSKumar Gala	bool "RTAS based debug console"
654330f5daSKumar Gala	depends on PPC_RTAS
664330f5daSKumar Gala	default n
674330f5daSKumar Gala
681ece355bSMilton Millerconfig PPC_SMP_MUXED_IPI
691ece355bSMilton Miller	bool
701ece355bSMilton Miller	help
711ece355bSMilton Miller	  Select this opton if your platform supports SMP and your
721ece355bSMilton Miller	  interrupt controller provides less than 4 interrupts to each
731ece355bSMilton Miller	  cpu.	This will enable the generic code to multiplex the 4
741ece355bSMilton Miller	  messages on to one ipi.
751ece355bSMilton Miller
764330f5daSKumar Galaconfig PPC_UDBG_BEAT
774330f5daSKumar Gala	bool "BEAT based debug console"
784330f5daSKumar Gala	depends on PPC_CELLEB
794330f5daSKumar Gala	default n
804330f5daSKumar Gala
81b0bbad60SJohn Rigbyconfig IPIC
82b0bbad60SJohn Rigby	bool
83b0bbad60SJohn Rigby	default n
84b0bbad60SJohn Rigby
8598750261SKumar Galaconfig MPIC
8698750261SKumar Gala	bool
8798750261SKumar Gala	default n
8898750261SKumar Gala
8936ca09beSDongsheng.wang@freescale.comconfig MPIC_TIMER
9036ca09beSDongsheng.wang@freescale.com	bool "MPIC Global Timer"
9136ca09beSDongsheng.wang@freescale.com	depends on MPIC && FSL_SOC
9236ca09beSDongsheng.wang@freescale.com	default n
9336ca09beSDongsheng.wang@freescale.com	help
9436ca09beSDongsheng.wang@freescale.com	  The MPIC global timer is a hardware timer inside the
9536ca09beSDongsheng.wang@freescale.com	  Freescale PIC complying with OpenPIC standard. When the
9636ca09beSDongsheng.wang@freescale.com	  specified interval times out, the hardware timer generates
9736ca09beSDongsheng.wang@freescale.com	  an interrupt. The driver currently is only tested on fsl
9836ca09beSDongsheng.wang@freescale.com	  chip, but it can potentially support other global timers
9936ca09beSDongsheng.wang@freescale.com	  complying with the OpenPIC standard.
10036ca09beSDongsheng.wang@freescale.com
101*a63b3bc7SDongsheng.wang@freescale.comconfig FSL_MPIC_TIMER_WAKEUP
102*a63b3bc7SDongsheng.wang@freescale.com	tristate "Freescale MPIC global timer wakeup driver"
103*a63b3bc7SDongsheng.wang@freescale.com	depends on FSL_SOC &&  MPIC_TIMER && PM
104*a63b3bc7SDongsheng.wang@freescale.com	default n
105*a63b3bc7SDongsheng.wang@freescale.com	help
106*a63b3bc7SDongsheng.wang@freescale.com	  The driver provides a way to wake up the system by MPIC
107*a63b3bc7SDongsheng.wang@freescale.com	  timer.
108*a63b3bc7SDongsheng.wang@freescale.com	  e.g. "echo 5 > /sys/devices/system/mpic/timer_wakeup"
109*a63b3bc7SDongsheng.wang@freescale.com
1103a93261fSAshish Kalraconfig PPC_EPAPR_HV_PIC
1113a93261fSAshish Kalra	bool
1123a93261fSAshish Kalra	default n
11340656397SStuart Yoder	select EPAPR_PARAVIRT
1143a93261fSAshish Kalra
11598750261SKumar Galaconfig MPIC_WEIRD
11698750261SKumar Gala	bool
11798750261SKumar Gala	default n
11898750261SKumar Gala
1198626816eSJia Hongtaoconfig MPIC_MSGR
1208626816eSJia Hongtao	bool "MPIC message register support"
1218626816eSJia Hongtao	depends on MPIC
1228626816eSJia Hongtao	default n
1238626816eSJia Hongtao	help
1248626816eSJia Hongtao	  Enables support for the MPIC message registers.  These
1258626816eSJia Hongtao	  registers are used for inter-processor communication.
1268626816eSJia Hongtao
12798750261SKumar Galaconfig PPC_I8259
12898750261SKumar Gala	bool
12998750261SKumar Gala	default n
13098750261SKumar Gala
1314330f5daSKumar Galaconfig U3_DART
1324330f5daSKumar Gala	bool
13328794d34SBenjamin Herrenschmidt	depends on PPC64
1344330f5daSKumar Gala	default n
1354330f5daSKumar Gala
1364330f5daSKumar Galaconfig PPC_RTAS
1374330f5daSKumar Gala	bool
1384330f5daSKumar Gala	default n
1394330f5daSKumar Gala
1404330f5daSKumar Galaconfig RTAS_ERROR_LOGGING
1414330f5daSKumar Gala	bool
1424330f5daSKumar Gala	depends on PPC_RTAS
1434330f5daSKumar Gala	default n
1444330f5daSKumar Gala
1453d541c4bSBenjamin Herrenschmidtconfig PPC_RTAS_DAEMON
1463d541c4bSBenjamin Herrenschmidt	bool
1473d541c4bSBenjamin Herrenschmidt	depends on PPC_RTAS
1483d541c4bSBenjamin Herrenschmidt	default n
1493d541c4bSBenjamin Herrenschmidt
1504330f5daSKumar Galaconfig RTAS_PROC
1514330f5daSKumar Gala	bool "Proc interface to RTAS"
152b80ec3dcSMichael Ellerman	depends on PPC_RTAS && PROC_FS
1534330f5daSKumar Gala	default y
1544330f5daSKumar Gala
1554330f5daSKumar Galaconfig RTAS_FLASH
1564330f5daSKumar Gala	tristate "Firmware flash interface"
1574330f5daSKumar Gala	depends on PPC64 && RTAS_PROC
1584330f5daSKumar Gala
1594330f5daSKumar Galaconfig MMIO_NVRAM
1604330f5daSKumar Gala	bool
1614330f5daSKumar Gala	default n
1624330f5daSKumar Gala
1636cfef5b2SMichael Ellermanconfig MPIC_U3_HT_IRQS
1644330f5daSKumar Gala	bool
165314b389bSAndreas Schwab	default n
1664330f5daSKumar Gala
1670d72ba93SOlof Johanssonconfig MPIC_BROKEN_REGREAD
1680d72ba93SOlof Johansson	bool
1690d72ba93SOlof Johansson	depends on MPIC
1700d72ba93SOlof Johansson	help
1710d72ba93SOlof Johansson	  This option enables a MPIC driver workaround for some chips
1720d72ba93SOlof Johansson	  that have a bug that causes some interrupt source information
1730d72ba93SOlof Johansson	  to not read back properly. It is safe to use on other chips as
1740d72ba93SOlof Johansson	  well, but enabling it uses about 8KB of memory to keep copies
1750d72ba93SOlof Johansson	  of the register contents in software.
1760d72ba93SOlof Johansson
1774330f5daSKumar Galaconfig IBMVIO
1783d066d77SStephen Rothwell	depends on PPC_PSERIES
1794330f5daSKumar Gala	bool
1804330f5daSKumar Gala	default y
1814330f5daSKumar Gala
1824330f5daSKumar Galaconfig IBMEBUS
1834330f5daSKumar Gala	depends on PPC_PSERIES
1844330f5daSKumar Gala	bool "Support for GX bus based adapters"
1854330f5daSKumar Gala	help
1864330f5daSKumar Gala	  Bus device driver for GX bus based adapters.
1874330f5daSKumar Gala
188317f06deSGavin Shanconfig EEH
189317f06deSGavin Shan	bool
190317f06deSGavin Shan	depends on (PPC_POWERNV || PPC_PSERIES) && PCI
191317f06deSGavin Shan	default y
192317f06deSGavin Shan
1934330f5daSKumar Galaconfig PPC_MPC106
1944330f5daSKumar Gala	bool
1954330f5daSKumar Gala	default n
1964330f5daSKumar Gala
1974330f5daSKumar Galaconfig PPC_970_NAP
1984330f5daSKumar Gala	bool
1994330f5daSKumar Gala	default n
2004330f5daSKumar Gala
201948cf67cSBenjamin Herrenschmidtconfig PPC_P7_NAP
202948cf67cSBenjamin Herrenschmidt	bool
203948cf67cSBenjamin Herrenschmidt	default n
204948cf67cSBenjamin Herrenschmidt
2054330f5daSKumar Galaconfig PPC_INDIRECT_IO
2064330f5daSKumar Gala	bool
2074330f5daSKumar Gala	select GENERIC_IOMAP
20821176fedSMichael Ellerman
20921176fedSMichael Ellermanconfig PPC_INDIRECT_PIO
21021176fedSMichael Ellerman	bool
21121176fedSMichael Ellerman	select PPC_INDIRECT_IO
21221176fedSMichael Ellerman
21321176fedSMichael Ellermanconfig PPC_INDIRECT_MMIO
21421176fedSMichael Ellerman	bool
21521176fedSMichael Ellerman	select PPC_INDIRECT_IO
2164330f5daSKumar Gala
2173cc30d07SMichael Ellermanconfig PPC_IO_WORKAROUNDS
2183cc30d07SMichael Ellerman	bool
2193cc30d07SMichael Ellerman
2204330f5daSKumar Galasource "drivers/cpufreq/Kconfig"
2214330f5daSKumar Gala
222c146c958SOlof Johanssonmenu "CPU Frequency drivers"
223c146c958SOlof Johansson	depends on CPU_FREQ
224c146c958SOlof Johansson
2254330f5daSKumar Galaconfig CPU_FREQ_PMAC
2264330f5daSKumar Gala	bool "Support for Apple PowerBooks"
227c146c958SOlof Johansson	depends on ADB_PMU && PPC32
2284330f5daSKumar Gala	select CPU_FREQ_TABLE
2294330f5daSKumar Gala	help
2304330f5daSKumar Gala	  This adds support for frequency switching on Apple PowerBooks,
2314330f5daSKumar Gala	  this currently includes some models of iBook & Titanium
2324330f5daSKumar Gala	  PowerBook.
2334330f5daSKumar Gala
2344330f5daSKumar Galaconfig CPU_FREQ_PMAC64
2354330f5daSKumar Gala	bool "Support for some Apple G5s"
236c146c958SOlof Johansson	depends on PPC_PMAC && PPC64
2374330f5daSKumar Gala	select CPU_FREQ_TABLE
2384330f5daSKumar Gala	help
2394330f5daSKumar Gala	  This adds support for frequency switching on Apple iMac G5,
2404330f5daSKumar Gala	  and some of the more recent desktop G5 machines as well.
2412e0c3370SOlof Johansson
2422e0c3370SOlof Johanssonconfig PPC_PASEMI_CPUFREQ
2432e0c3370SOlof Johansson	bool "Support for PA Semi PWRficient"
244c146c958SOlof Johansson	depends on PPC_PASEMI
2452e0c3370SOlof Johansson	default y
2462e0c3370SOlof Johansson	select CPU_FREQ_TABLE
2472e0c3370SOlof Johansson	help
2482e0c3370SOlof Johansson	  This adds the support for frequency switching on PA Semi
2492e0c3370SOlof Johansson	  PWRficient processors.
2502e0c3370SOlof Johansson
251164a460dSKumar Galaendmenu
2524330f5daSKumar Gala
253e179816cSDeepthi Dharwarmenu "CPUIdle driver"
254e179816cSDeepthi Dharwar
255e179816cSDeepthi Dharwarsource "drivers/cpuidle/Kconfig"
256e179816cSDeepthi Dharwar
257e179816cSDeepthi Dharwarendmenu
258e179816cSDeepthi Dharwar
2594330f5daSKumar Galaconfig PPC601_SYNC_FIX
2604330f5daSKumar Gala	bool "Workarounds for PPC601 bugs"
261933ee711SPaul Bolle	depends on 6xx && PPC_PMAC
2624330f5daSKumar Gala	help
2634330f5daSKumar Gala	  Some versions of the PPC601 (the first PowerPC chip) have bugs which
2644330f5daSKumar Gala	  mean that extra synchronization instructions are required near
2654330f5daSKumar Gala	  certain instructions, typically those that make major changes to the
2664330f5daSKumar Gala	  CPU state.  These extra instructions reduce performance slightly.
2674330f5daSKumar Gala	  If you say N here, these extra instructions will not be included,
2684330f5daSKumar Gala	  resulting in a kernel which will run faster but may not run at all
2694330f5daSKumar Gala	  on some systems with the PPC601 chip.
2704330f5daSKumar Gala
2714330f5daSKumar Gala	  If in doubt, say Y here.
2724330f5daSKumar Gala
2734330f5daSKumar Galaconfig TAU
2744330f5daSKumar Gala	bool "On-chip CPU temperature sensor support"
27528794d34SBenjamin Herrenschmidt	depends on 6xx
2764330f5daSKumar Gala	help
2774330f5daSKumar Gala	  G3 and G4 processors have an on-chip temperature sensor called the
2784330f5daSKumar Gala	  'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
2794330f5daSKumar Gala	  temperature within 2-4 degrees Celsius. This option shows the current
2804330f5daSKumar Gala	  on-die temperature in /proc/cpuinfo if the cpu supports it.
2814330f5daSKumar Gala
2824330f5daSKumar Gala	  Unfortunately, on some chip revisions, this sensor is very inaccurate
2834330f5daSKumar Gala	  and in many cases, does not work at all, so don't assume the cpu
2844330f5daSKumar Gala	  temp is actually what /proc/cpuinfo says it is.
2854330f5daSKumar Gala
2864330f5daSKumar Galaconfig TAU_INT
2874330f5daSKumar Gala	bool "Interrupt driven TAU driver (DANGEROUS)"
2884330f5daSKumar Gala	depends on TAU
2894330f5daSKumar Gala	---help---
2904330f5daSKumar Gala	  The TAU supports an interrupt driven mode which causes an interrupt
2914330f5daSKumar Gala	  whenever the temperature goes out of range. This is the fastest way
2924330f5daSKumar Gala	  to get notified the temp has exceeded a range. With this option off,
2934330f5daSKumar Gala	  a timer is used to re-check the temperature periodically.
2944330f5daSKumar Gala
2954330f5daSKumar Gala	  However, on some cpus it appears that the TAU interrupt hardware
2964330f5daSKumar Gala	  is buggy and can cause a situation which would lead unexplained hard
2974330f5daSKumar Gala	  lockups.
2984330f5daSKumar Gala
2994330f5daSKumar Gala	  Unless you are extending the TAU driver, or enjoy kernel/hardware
3004330f5daSKumar Gala	  debugging, leave this option off.
3014330f5daSKumar Gala
3024330f5daSKumar Galaconfig TAU_AVERAGE
3034330f5daSKumar Gala	bool "Average high and low temp"
3044330f5daSKumar Gala	depends on TAU
3054330f5daSKumar Gala	---help---
3064330f5daSKumar Gala	  The TAU hardware can compare the temperature to an upper and lower
3074330f5daSKumar Gala	  bound.  The default behavior is to show both the upper and lower
3084330f5daSKumar Gala	  bound in /proc/cpuinfo. If the range is large, the temperature is
3094330f5daSKumar Gala	  either changing a lot, or the TAU hardware is broken (likely on some
3104330f5daSKumar Gala	  G4's). If the range is small (around 4 degrees), the temperature is
3114330f5daSKumar Gala	  relatively stable.  If you say Y here, a single temperature value,
3124330f5daSKumar Gala	  halfway between the upper and lower bounds, will be reported in
3134330f5daSKumar Gala	  /proc/cpuinfo.
3144330f5daSKumar Gala
3154330f5daSKumar Gala	  If in doubt, say N here.
3164330f5daSKumar Gala
31798750261SKumar Galaconfig QUICC_ENGINE
3184e330bcfSTimur Tabi	bool "Freescale QUICC Engine (QE) Support"
31947fe819eSKumar Gala	depends on FSL_SOC && PPC32
3201088a209SSylvain Munaut	select PPC_LIB_RHEAP
321bc556ba9STimur Tabi	select CRC32
32298750261SKumar Gala	help
32398750261SKumar Gala	  The QUICC Engine (QE) is a new generation of communications
32498750261SKumar Gala	  coprocessors on Freescale embedded CPUs (akin to CPM in older chips).
32598750261SKumar Gala	  Selecting this option means that you wish to build a kernel
32698750261SKumar Gala	  for a machine with a QE coprocessor.
32798750261SKumar Gala
3285c091193SAnton Vorontsovconfig QE_GPIO
3295c091193SAnton Vorontsov	bool "QE GPIO support"
3305c091193SAnton Vorontsov	depends on QUICC_ENGINE
3315c091193SAnton Vorontsov	select ARCH_REQUIRE_GPIOLIB
3325c091193SAnton Vorontsov	help
3335c091193SAnton Vorontsov	  Say Y here if you're going to use hardware that connects to the
3345c091193SAnton Vorontsov	  QE GPIOs.
3355c091193SAnton Vorontsov
336d6071f88SKumar Galaconfig CPM2
337b8b3caf3SPaul Gortmaker	bool "Enable support for the CPM2 (Communications Processor Module)"
3385753c082SKumar Gala	depends on (FSL_SOC_BOOKE && PPC32) || 8260
339c374e00eSScott Wood	select CPM
3401088a209SSylvain Munaut	select PPC_LIB_RHEAP
341b500563bSJohn Rigby	select PPC_PCI_CHOICE
342e193325eSLaurent Pinchart	select ARCH_REQUIRE_GPIOLIB
343d6071f88SKumar Gala	help
344d6071f88SKumar Gala	  The CPM2 (Communications Processor Module) is a coprocessor on
345d6071f88SKumar Gala	  embedded CPUs made by Freescale.  Selecting this option means that
346d6071f88SKumar Gala	  you wish to build a kernel for a machine with a CPM2 coprocessor
347d6071f88SKumar Gala	  on it (826x, 827x, 8560).
348d6071f88SKumar Gala
349dbdf04c4SMaxim Shchetyninconfig AXON_RAM
350dbdf04c4SMaxim Shchetynin	tristate "Axon DDR2 memory device driver"
351ebf0f334SMichael Ellerman	depends on PPC_IBM_CELL_BLADE && BLOCK
352dbdf04c4SMaxim Shchetynin	default m
353dbdf04c4SMaxim Shchetynin	help
354dbdf04c4SMaxim Shchetynin	  It registers one block device per Axon's DDR2 memory bank found
355dbdf04c4SMaxim Shchetynin	  on a system. Block devices are called axonram?, their major and
356dbdf04c4SMaxim Shchetynin	  minor numbers are available in /proc/devices, /proc/partitions or
357dbdf04c4SMaxim Shchetynin	  in /sys/block/axonram?/dev.
358dbdf04c4SMaxim Shchetynin
359b66510cbSKumar Galaconfig FSL_ULI1575
360b66510cbSKumar Gala	bool
361b66510cbSKumar Gala	default n
362fb4f0e88SKumar Gala	select GENERIC_ISA_DMA
363b66510cbSKumar Gala	help
364b66510cbSKumar Gala	  Supports for the ULI1575 PCIe south bridge that exists on some
365b66510cbSKumar Gala	  Freescale reference boards. The boards all use the ULI in pretty
366b66510cbSKumar Gala	  much the same way.
367b66510cbSKumar Gala
368c374e00eSScott Woodconfig CPM
369c374e00eSScott Wood	bool
370c374e00eSScott Wood
37122258fa4SDavid Gibsonconfig OF_RTC
37222258fa4SDavid Gibson	bool
37322258fa4SDavid Gibson	help
374692105b8SMatt LaPlante	  Uses information from the OF or flattened device tree to instantiate
37522258fa4SDavid Gibson	  platform devices for direct mapped RTC chips like the DS1742 or DS1743.
37622258fa4SDavid Gibson
3773d64de9cSAnton Vorontsovconfig SIMPLE_GPIO
3783d64de9cSAnton Vorontsov	bool "Support for simple, memory-mapped GPIO controllers"
3793d64de9cSAnton Vorontsov	depends on PPC
3803d64de9cSAnton Vorontsov	select ARCH_REQUIRE_GPIOLIB
3813d64de9cSAnton Vorontsov	help
3823d64de9cSAnton Vorontsov	  Say Y here to support simple, memory-mapped GPIO controllers.
3833d64de9cSAnton Vorontsov	  These are usually BCSRs used to control board's switches, LEDs,
3843d64de9cSAnton Vorontsov	  chip-selects, Ethernet/USB PHY's power and various other small
3853d64de9cSAnton Vorontsov	  on-board peripherals.
3863d64de9cSAnton Vorontsov
387ea0105eaSAnton Vorontsovconfig MCU_MPC8349EMITX
3886ca6ca5dSFabio Baltieri	bool "MPC8349E-mITX MCU driver"
38982640a6bSAl Viro	depends on I2C=y && PPC_83xx
390ea0105eaSAnton Vorontsov	select ARCH_REQUIRE_GPIOLIB
391ea0105eaSAnton Vorontsov	help
392ea0105eaSAnton Vorontsov	  Say Y here to enable soft power-off functionality on the Freescale
393ea0105eaSAnton Vorontsov	  boards with the MPC8349E-mITX-compatible MCU chips. This driver will
394ea0105eaSAnton Vorontsov	  also register MCU GPIOs with the generic GPIO API, so you'll able
395ea0105eaSAnton Vorontsov	  to use MCU pins as GPIOs.
396ea0105eaSAnton Vorontsov
39764f16502SRoderick Colenbranderconfig XILINX_PCI
39864f16502SRoderick Colenbrander	bool "Xilinx PCI host bridge support"
39964f16502SRoderick Colenbrander	depends on PCI && XILINX_VIRTEX
40064f16502SRoderick Colenbrander
4014330f5daSKumar Galaendmenu
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