14330f5daSKumar Galamenu "Platform support" 24330f5daSKumar Gala 355190f88SBenjamin Herrenschmidtsource "arch/powerpc/platforms/powernv/Kconfig" 44330f5daSKumar Galasource "arch/powerpc/platforms/pseries/Kconfig" 54330f5daSKumar Galasource "arch/powerpc/platforms/chrp/Kconfig" 6e177edcdSJohn Rigbysource "arch/powerpc/platforms/512x/Kconfig" 74330f5daSKumar Galasource "arch/powerpc/platforms/52xx/Kconfig" 84330f5daSKumar Galasource "arch/powerpc/platforms/powermac/Kconfig" 94330f5daSKumar Galasource "arch/powerpc/platforms/maple/Kconfig" 104330f5daSKumar Galasource "arch/powerpc/platforms/pasemi/Kconfig" 1198750261SKumar Galasource "arch/powerpc/platforms/ps3/Kconfig" 1298750261SKumar Galasource "arch/powerpc/platforms/cell/Kconfig" 13c8a55f3dSKumar Galasource "arch/powerpc/platforms/8xx/Kconfig" 14d6071f88SKumar Galasource "arch/powerpc/platforms/82xx/Kconfig" 15b5a48346SKumar Galasource "arch/powerpc/platforms/83xx/Kconfig" 16db947808SKumar Galasource "arch/powerpc/platforms/85xx/Kconfig" 174a89f7faSKumar Galasource "arch/powerpc/platforms/86xx/Kconfig" 1898750261SKumar Galasource "arch/powerpc/platforms/embedded6xx/Kconfig" 19f6dfc805SDavid Gibsonsource "arch/powerpc/platforms/44x/Kconfig" 20545c069cSJosh Boyersource "arch/powerpc/platforms/40x/Kconfig" 2154b318aaSGerhard Pirchersource "arch/powerpc/platforms/amigaone/Kconfig" 224330f5daSKumar Gala 23d17051cbSAlexander Grafconfig KVM_GUEST 24d17051cbSAlexander Graf bool "KVM Guest support" 25643ba4e3SAnton Blanchard default n 262e1ae9c0SLiu Yu-B13201 select EPAPR_PARAVIRT 27d17051cbSAlexander Graf ---help--- 28d17051cbSAlexander Graf This option enables various optimizations for running under the KVM 29d17051cbSAlexander Graf hypervisor. Overhead for the kernel when not running inside KVM should 30d17051cbSAlexander Graf be minimal. 31d17051cbSAlexander Graf 32d17051cbSAlexander Graf In case of doubt, say Y 33d17051cbSAlexander Graf 342e1ae9c0SLiu Yu-B13201config EPAPR_PARAVIRT 352e1ae9c0SLiu Yu-B13201 bool "ePAPR para-virtualization support" 362e1ae9c0SLiu Yu-B13201 default n 372e1ae9c0SLiu Yu-B13201 help 382e1ae9c0SLiu Yu-B13201 Enables ePAPR para-virtualization support for guests. 392e1ae9c0SLiu Yu-B13201 402e1ae9c0SLiu Yu-B13201 In case of doubt, say Y 412e1ae9c0SLiu Yu-B13201 424330f5daSKumar Galaconfig PPC_NATIVE 434330f5daSKumar Gala bool 4428794d34SBenjamin Herrenschmidt depends on 6xx || PPC64 454330f5daSKumar Gala help 464330f5daSKumar Gala Support for running natively on the hardware, i.e. without 474330f5daSKumar Gala a hypervisor. This option is not user-selectable but should 484330f5daSKumar Gala be selected by all platforms that need it. 494330f5daSKumar Gala 5028794d34SBenjamin Herrenschmidtconfig PPC_OF_BOOT_TRAMPOLINE 5128794d34SBenjamin Herrenschmidt bool "Support booting from Open Firmware or yaboot" 5228794d34SBenjamin Herrenschmidt depends on 6xx || PPC64 5328794d34SBenjamin Herrenschmidt default y 5428794d34SBenjamin Herrenschmidt help 5528794d34SBenjamin Herrenschmidt Support from booting from Open Firmware or yaboot using an 5628794d34SBenjamin Herrenschmidt Open Firmware client interface. This enables the kernel to 57f65e51d7SSylvestre Ledru communicate with open firmware to retrieve system information 5828794d34SBenjamin Herrenschmidt such as the device tree. 5928794d34SBenjamin Herrenschmidt 6028794d34SBenjamin Herrenschmidt In case of doubt, say Y 6128794d34SBenjamin Herrenschmidt 62c6ee9619SMichael Ellermanconfig PPC_DT_CPU_FTRS 63c6ee9619SMichael Ellerman bool "Device-tree based CPU feature discovery & setup" 64c6ee9619SMichael Ellerman depends on PPC_BOOK3S_64 65c6ee9619SMichael Ellerman default y 66c6ee9619SMichael Ellerman help 67c6ee9619SMichael Ellerman This enables code to use a new device tree binding for describing CPU 68c6ee9619SMichael Ellerman compatibility and features. Saying Y here will attempt to use the new 69c6ee9619SMichael Ellerman binding if the firmware provides it. Currently only the skiboot 70c6ee9619SMichael Ellerman firmware provides this binding. 71c6ee9619SMichael Ellerman If you're not sure say Y. 72c6ee9619SMichael Ellerman 734330f5daSKumar Galaconfig UDBG_RTAS_CONSOLE 744330f5daSKumar Gala bool "RTAS based debug console" 754330f5daSKumar Gala depends on PPC_RTAS 764330f5daSKumar Gala default n 774330f5daSKumar Gala 781ece355bSMilton Millerconfig PPC_SMP_MUXED_IPI 791ece355bSMilton Miller bool 801ece355bSMilton Miller help 81*83fc61a5SMasanari Iida Select this option if your platform supports SMP and your 821ece355bSMilton Miller interrupt controller provides less than 4 interrupts to each 831ece355bSMilton Miller cpu. This will enable the generic code to multiplex the 4 841ece355bSMilton Miller messages on to one ipi. 851ece355bSMilton Miller 86b0bbad60SJohn Rigbyconfig IPIC 87b0bbad60SJohn Rigby bool 88b0bbad60SJohn Rigby default n 89b0bbad60SJohn Rigby 9098750261SKumar Galaconfig MPIC 9198750261SKumar Gala bool 9298750261SKumar Gala default n 9398750261SKumar Gala 9436ca09beSDongsheng.wang@freescale.comconfig MPIC_TIMER 9536ca09beSDongsheng.wang@freescale.com bool "MPIC Global Timer" 9636ca09beSDongsheng.wang@freescale.com depends on MPIC && FSL_SOC 9736ca09beSDongsheng.wang@freescale.com default n 9836ca09beSDongsheng.wang@freescale.com help 9936ca09beSDongsheng.wang@freescale.com The MPIC global timer is a hardware timer inside the 10036ca09beSDongsheng.wang@freescale.com Freescale PIC complying with OpenPIC standard. When the 10136ca09beSDongsheng.wang@freescale.com specified interval times out, the hardware timer generates 10236ca09beSDongsheng.wang@freescale.com an interrupt. The driver currently is only tested on fsl 10336ca09beSDongsheng.wang@freescale.com chip, but it can potentially support other global timers 10436ca09beSDongsheng.wang@freescale.com complying with the OpenPIC standard. 10536ca09beSDongsheng.wang@freescale.com 106a63b3bc7SDongsheng.wang@freescale.comconfig FSL_MPIC_TIMER_WAKEUP 107a63b3bc7SDongsheng.wang@freescale.com tristate "Freescale MPIC global timer wakeup driver" 108a63b3bc7SDongsheng.wang@freescale.com depends on FSL_SOC && MPIC_TIMER && PM 109a63b3bc7SDongsheng.wang@freescale.com default n 110a63b3bc7SDongsheng.wang@freescale.com help 111a63b3bc7SDongsheng.wang@freescale.com The driver provides a way to wake up the system by MPIC 112a63b3bc7SDongsheng.wang@freescale.com timer. 113a63b3bc7SDongsheng.wang@freescale.com e.g. "echo 5 > /sys/devices/system/mpic/timer_wakeup" 114a63b3bc7SDongsheng.wang@freescale.com 1153a93261fSAshish Kalraconfig PPC_EPAPR_HV_PIC 1163a93261fSAshish Kalra bool 1173a93261fSAshish Kalra default n 11840656397SStuart Yoder select EPAPR_PARAVIRT 1193a93261fSAshish Kalra 12098750261SKumar Galaconfig MPIC_WEIRD 12198750261SKumar Gala bool 12298750261SKumar Gala default n 12398750261SKumar Gala 1248626816eSJia Hongtaoconfig MPIC_MSGR 1258626816eSJia Hongtao bool "MPIC message register support" 1268626816eSJia Hongtao depends on MPIC 1278626816eSJia Hongtao default n 1288626816eSJia Hongtao help 1298626816eSJia Hongtao Enables support for the MPIC message registers. These 1308626816eSJia Hongtao registers are used for inter-processor communication. 1318626816eSJia Hongtao 13298750261SKumar Galaconfig PPC_I8259 13398750261SKumar Gala bool 13498750261SKumar Gala default n 13598750261SKumar Gala 1364330f5daSKumar Galaconfig U3_DART 1374330f5daSKumar Gala bool 13828794d34SBenjamin Herrenschmidt depends on PPC64 1394330f5daSKumar Gala default n 1404330f5daSKumar Gala 1414330f5daSKumar Galaconfig PPC_RTAS 1424330f5daSKumar Gala bool 1434330f5daSKumar Gala default n 1444330f5daSKumar Gala 1454330f5daSKumar Galaconfig RTAS_ERROR_LOGGING 1464330f5daSKumar Gala bool 1474330f5daSKumar Gala depends on PPC_RTAS 1484330f5daSKumar Gala default n 1494330f5daSKumar Gala 1503d541c4bSBenjamin Herrenschmidtconfig PPC_RTAS_DAEMON 1513d541c4bSBenjamin Herrenschmidt bool 1523d541c4bSBenjamin Herrenschmidt depends on PPC_RTAS 1533d541c4bSBenjamin Herrenschmidt default n 1543d541c4bSBenjamin Herrenschmidt 1554330f5daSKumar Galaconfig RTAS_PROC 1564330f5daSKumar Gala bool "Proc interface to RTAS" 157b80ec3dcSMichael Ellerman depends on PPC_RTAS && PROC_FS 1584330f5daSKumar Gala default y 1594330f5daSKumar Gala 1604330f5daSKumar Galaconfig RTAS_FLASH 1614330f5daSKumar Gala tristate "Firmware flash interface" 1624330f5daSKumar Gala depends on PPC64 && RTAS_PROC 1634330f5daSKumar Gala 1644330f5daSKumar Galaconfig MMIO_NVRAM 1654330f5daSKumar Gala bool 1664330f5daSKumar Gala default n 1674330f5daSKumar Gala 1686cfef5b2SMichael Ellermanconfig MPIC_U3_HT_IRQS 1694330f5daSKumar Gala bool 170314b389bSAndreas Schwab default n 1714330f5daSKumar Gala 1720d72ba93SOlof Johanssonconfig MPIC_BROKEN_REGREAD 1730d72ba93SOlof Johansson bool 1740d72ba93SOlof Johansson depends on MPIC 1750d72ba93SOlof Johansson help 1760d72ba93SOlof Johansson This option enables a MPIC driver workaround for some chips 1770d72ba93SOlof Johansson that have a bug that causes some interrupt source information 1780d72ba93SOlof Johansson to not read back properly. It is safe to use on other chips as 1790d72ba93SOlof Johansson well, but enabling it uses about 8KB of memory to keep copies 1800d72ba93SOlof Johansson of the register contents in software. 1810d72ba93SOlof Johansson 182317f06deSGavin Shanconfig EEH 183317f06deSGavin Shan bool 184317f06deSGavin Shan depends on (PPC_POWERNV || PPC_PSERIES) && PCI 185317f06deSGavin Shan default y 186317f06deSGavin Shan 1874330f5daSKumar Galaconfig PPC_MPC106 1884330f5daSKumar Gala bool 1894330f5daSKumar Gala default n 1904330f5daSKumar Gala 1914330f5daSKumar Galaconfig PPC_970_NAP 1924330f5daSKumar Gala bool 1934330f5daSKumar Gala default n 1944330f5daSKumar Gala 195948cf67cSBenjamin Herrenschmidtconfig PPC_P7_NAP 196948cf67cSBenjamin Herrenschmidt bool 197948cf67cSBenjamin Herrenschmidt default n 198948cf67cSBenjamin Herrenschmidt 199ecd73cc5SBenjamin Herrenschmidtconfig PPC_INDIRECT_PIO 2004330f5daSKumar Gala bool 2014330f5daSKumar Gala select GENERIC_IOMAP 20221176fedSMichael Ellerman 20321176fedSMichael Ellermanconfig PPC_INDIRECT_MMIO 20421176fedSMichael Ellerman bool 2054330f5daSKumar Gala 2063cc30d07SMichael Ellermanconfig PPC_IO_WORKAROUNDS 2073cc30d07SMichael Ellerman bool 2083cc30d07SMichael Ellerman 2094330f5daSKumar Galasource "drivers/cpufreq/Kconfig" 2104330f5daSKumar Gala 211e179816cSDeepthi Dharwarmenu "CPUIdle driver" 212e179816cSDeepthi Dharwar 213e179816cSDeepthi Dharwarsource "drivers/cpuidle/Kconfig" 214e179816cSDeepthi Dharwar 215e179816cSDeepthi Dharwarendmenu 216e179816cSDeepthi Dharwar 2174330f5daSKumar Galaconfig PPC601_SYNC_FIX 2184330f5daSKumar Gala bool "Workarounds for PPC601 bugs" 219933ee711SPaul Bolle depends on 6xx && PPC_PMAC 2204330f5daSKumar Gala help 2214330f5daSKumar Gala Some versions of the PPC601 (the first PowerPC chip) have bugs which 2224330f5daSKumar Gala mean that extra synchronization instructions are required near 2234330f5daSKumar Gala certain instructions, typically those that make major changes to the 2244330f5daSKumar Gala CPU state. These extra instructions reduce performance slightly. 2254330f5daSKumar Gala If you say N here, these extra instructions will not be included, 2264330f5daSKumar Gala resulting in a kernel which will run faster but may not run at all 2274330f5daSKumar Gala on some systems with the PPC601 chip. 2284330f5daSKumar Gala 2294330f5daSKumar Gala If in doubt, say Y here. 2304330f5daSKumar Gala 2314330f5daSKumar Galaconfig TAU 2324330f5daSKumar Gala bool "On-chip CPU temperature sensor support" 23328794d34SBenjamin Herrenschmidt depends on 6xx 2344330f5daSKumar Gala help 2354330f5daSKumar Gala G3 and G4 processors have an on-chip temperature sensor called the 2364330f5daSKumar Gala 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die 2374330f5daSKumar Gala temperature within 2-4 degrees Celsius. This option shows the current 2384330f5daSKumar Gala on-die temperature in /proc/cpuinfo if the cpu supports it. 2394330f5daSKumar Gala 2404330f5daSKumar Gala Unfortunately, on some chip revisions, this sensor is very inaccurate 2414330f5daSKumar Gala and in many cases, does not work at all, so don't assume the cpu 2424330f5daSKumar Gala temp is actually what /proc/cpuinfo says it is. 2434330f5daSKumar Gala 2444330f5daSKumar Galaconfig TAU_INT 2454330f5daSKumar Gala bool "Interrupt driven TAU driver (DANGEROUS)" 2464330f5daSKumar Gala depends on TAU 2474330f5daSKumar Gala ---help--- 2484330f5daSKumar Gala The TAU supports an interrupt driven mode which causes an interrupt 2494330f5daSKumar Gala whenever the temperature goes out of range. This is the fastest way 2504330f5daSKumar Gala to get notified the temp has exceeded a range. With this option off, 2514330f5daSKumar Gala a timer is used to re-check the temperature periodically. 2524330f5daSKumar Gala 2534330f5daSKumar Gala However, on some cpus it appears that the TAU interrupt hardware 2544330f5daSKumar Gala is buggy and can cause a situation which would lead unexplained hard 2554330f5daSKumar Gala lockups. 2564330f5daSKumar Gala 2574330f5daSKumar Gala Unless you are extending the TAU driver, or enjoy kernel/hardware 2584330f5daSKumar Gala debugging, leave this option off. 2594330f5daSKumar Gala 2604330f5daSKumar Galaconfig TAU_AVERAGE 2614330f5daSKumar Gala bool "Average high and low temp" 2624330f5daSKumar Gala depends on TAU 2634330f5daSKumar Gala ---help--- 2644330f5daSKumar Gala The TAU hardware can compare the temperature to an upper and lower 2654330f5daSKumar Gala bound. The default behavior is to show both the upper and lower 2664330f5daSKumar Gala bound in /proc/cpuinfo. If the range is large, the temperature is 2674330f5daSKumar Gala either changing a lot, or the TAU hardware is broken (likely on some 2684330f5daSKumar Gala G4's). If the range is small (around 4 degrees), the temperature is 2694330f5daSKumar Gala relatively stable. If you say Y here, a single temperature value, 2704330f5daSKumar Gala halfway between the upper and lower bounds, will be reported in 2714330f5daSKumar Gala /proc/cpuinfo. 2724330f5daSKumar Gala 2734330f5daSKumar Gala If in doubt, say N here. 2744330f5daSKumar Gala 2755c091193SAnton Vorontsovconfig QE_GPIO 2765c091193SAnton Vorontsov bool "QE GPIO support" 2775c091193SAnton Vorontsov depends on QUICC_ENGINE 27886c55af4SLinus Walleij select GPIOLIB 2795c091193SAnton Vorontsov help 2805c091193SAnton Vorontsov Say Y here if you're going to use hardware that connects to the 2815c091193SAnton Vorontsov QE GPIOs. 2825c091193SAnton Vorontsov 283d6071f88SKumar Galaconfig CPM2 284b8b3caf3SPaul Gortmaker bool "Enable support for the CPM2 (Communications Processor Module)" 2855753c082SKumar Gala depends on (FSL_SOC_BOOKE && PPC32) || 8260 286c374e00eSScott Wood select CPM 287b500563bSJohn Rigby select PPC_PCI_CHOICE 28886c55af4SLinus Walleij select GPIOLIB 289d6071f88SKumar Gala help 290d6071f88SKumar Gala The CPM2 (Communications Processor Module) is a coprocessor on 291d6071f88SKumar Gala embedded CPUs made by Freescale. Selecting this option means that 292d6071f88SKumar Gala you wish to build a kernel for a machine with a CPM2 coprocessor 293d6071f88SKumar Gala on it (826x, 827x, 8560). 294d6071f88SKumar Gala 295dbdf04c4SMaxim Shchetyninconfig AXON_RAM 296dbdf04c4SMaxim Shchetynin tristate "Axon DDR2 memory device driver" 297ebf0f334SMichael Ellerman depends on PPC_IBM_CELL_BLADE && BLOCK 29860fcd55cSDan Williams select DAX 299dbdf04c4SMaxim Shchetynin default m 300dbdf04c4SMaxim Shchetynin help 301dbdf04c4SMaxim Shchetynin It registers one block device per Axon's DDR2 memory bank found 302dbdf04c4SMaxim Shchetynin on a system. Block devices are called axonram?, their major and 303dbdf04c4SMaxim Shchetynin minor numbers are available in /proc/devices, /proc/partitions or 304dbdf04c4SMaxim Shchetynin in /sys/block/axonram?/dev. 305dbdf04c4SMaxim Shchetynin 306b66510cbSKumar Galaconfig FSL_ULI1575 307b66510cbSKumar Gala bool 308b66510cbSKumar Gala default n 309fb4f0e88SKumar Gala select GENERIC_ISA_DMA 310b66510cbSKumar Gala help 311b66510cbSKumar Gala Supports for the ULI1575 PCIe south bridge that exists on some 312b66510cbSKumar Gala Freescale reference boards. The boards all use the ULI in pretty 313b66510cbSKumar Gala much the same way. 314b66510cbSKumar Gala 315c374e00eSScott Woodconfig CPM 316c374e00eSScott Wood bool 3170e6e01ffSZhao Qiang select GENERIC_ALLOCATOR 318c374e00eSScott Wood 31922258fa4SDavid Gibsonconfig OF_RTC 32022258fa4SDavid Gibson bool 32122258fa4SDavid Gibson help 322692105b8SMatt LaPlante Uses information from the OF or flattened device tree to instantiate 32322258fa4SDavid Gibson platform devices for direct mapped RTC chips like the DS1742 or DS1743. 32422258fa4SDavid Gibson 325835ea93eSArnd Bergmannconfig GEN_RTC 326835ea93eSArnd Bergmann bool "Use the platform RTC operations from user space" 327835ea93eSArnd Bergmann select RTC_CLASS 328835ea93eSArnd Bergmann select RTC_DRV_GENERIC 329835ea93eSArnd Bergmann help 330835ea93eSArnd Bergmann This option provides backwards compatibility with the old gen_rtc.ko 331835ea93eSArnd Bergmann module that was traditionally used for old PowerPC machines. 332835ea93eSArnd Bergmann Platforms should migrate to enabling the RTC_DRV_GENERIC by hand 333835ea93eSArnd Bergmann replacing their get_rtc_time/set_rtc_time callbacks with 334835ea93eSArnd Bergmann a proper RTC device driver. 335835ea93eSArnd Bergmann 3363d64de9cSAnton Vorontsovconfig SIMPLE_GPIO 3373d64de9cSAnton Vorontsov bool "Support for simple, memory-mapped GPIO controllers" 3383d64de9cSAnton Vorontsov depends on PPC 33986c55af4SLinus Walleij select GPIOLIB 3403d64de9cSAnton Vorontsov help 3413d64de9cSAnton Vorontsov Say Y here to support simple, memory-mapped GPIO controllers. 3423d64de9cSAnton Vorontsov These are usually BCSRs used to control board's switches, LEDs, 3433d64de9cSAnton Vorontsov chip-selects, Ethernet/USB PHY's power and various other small 3443d64de9cSAnton Vorontsov on-board peripherals. 3453d64de9cSAnton Vorontsov 346ea0105eaSAnton Vorontsovconfig MCU_MPC8349EMITX 3476ca6ca5dSFabio Baltieri bool "MPC8349E-mITX MCU driver" 34882640a6bSAl Viro depends on I2C=y && PPC_83xx 34986c55af4SLinus Walleij select GPIOLIB 350ea0105eaSAnton Vorontsov help 351ea0105eaSAnton Vorontsov Say Y here to enable soft power-off functionality on the Freescale 352ea0105eaSAnton Vorontsov boards with the MPC8349E-mITX-compatible MCU chips. This driver will 353ea0105eaSAnton Vorontsov also register MCU GPIOs with the generic GPIO API, so you'll able 354ea0105eaSAnton Vorontsov to use MCU pins as GPIOs. 355ea0105eaSAnton Vorontsov 35664f16502SRoderick Colenbranderconfig XILINX_PCI 35764f16502SRoderick Colenbrander bool "Xilinx PCI host bridge support" 35864f16502SRoderick Colenbrander depends on PCI && XILINX_VIRTEX 35964f16502SRoderick Colenbrander 3604330f5daSKumar Galaendmenu 361