1b2441318SGreg Kroah-Hartman# SPDX-License-Identifier: GPL-2.0 24330f5daSKumar Galamenu "Platform support" 34330f5daSKumar Gala 455190f88SBenjamin Herrenschmidtsource "arch/powerpc/platforms/powernv/Kconfig" 54330f5daSKumar Galasource "arch/powerpc/platforms/pseries/Kconfig" 64330f5daSKumar Galasource "arch/powerpc/platforms/chrp/Kconfig" 7e177edcdSJohn Rigbysource "arch/powerpc/platforms/512x/Kconfig" 84330f5daSKumar Galasource "arch/powerpc/platforms/52xx/Kconfig" 94330f5daSKumar Galasource "arch/powerpc/platforms/powermac/Kconfig" 104330f5daSKumar Galasource "arch/powerpc/platforms/maple/Kconfig" 114330f5daSKumar Galasource "arch/powerpc/platforms/pasemi/Kconfig" 1298750261SKumar Galasource "arch/powerpc/platforms/ps3/Kconfig" 1398750261SKumar Galasource "arch/powerpc/platforms/cell/Kconfig" 14c8a55f3dSKumar Galasource "arch/powerpc/platforms/8xx/Kconfig" 15d6071f88SKumar Galasource "arch/powerpc/platforms/82xx/Kconfig" 16b5a48346SKumar Galasource "arch/powerpc/platforms/83xx/Kconfig" 17db947808SKumar Galasource "arch/powerpc/platforms/85xx/Kconfig" 184a89f7faSKumar Galasource "arch/powerpc/platforms/86xx/Kconfig" 1998750261SKumar Galasource "arch/powerpc/platforms/embedded6xx/Kconfig" 20f6dfc805SDavid Gibsonsource "arch/powerpc/platforms/44x/Kconfig" 21545c069cSJosh Boyersource "arch/powerpc/platforms/40x/Kconfig" 2254b318aaSGerhard Pirchersource "arch/powerpc/platforms/amigaone/Kconfig" 23*413d6ed3SHaren Mynenisource "arch/powerpc/platforms/book3s/Kconfig" 244330f5daSKumar Gala 25d17051cbSAlexander Grafconfig KVM_GUEST 26d17051cbSAlexander Graf bool "KVM Guest support" 272e1ae9c0SLiu Yu-B13201 select EPAPR_PARAVIRT 28a7f7f624SMasahiro Yamada help 29d17051cbSAlexander Graf This option enables various optimizations for running under the KVM 30d17051cbSAlexander Graf hypervisor. Overhead for the kernel when not running inside KVM should 31d17051cbSAlexander Graf be minimal. 32d17051cbSAlexander Graf 33d17051cbSAlexander Graf In case of doubt, say Y 34d17051cbSAlexander Graf 352e1ae9c0SLiu Yu-B13201config EPAPR_PARAVIRT 362e1ae9c0SLiu Yu-B13201 bool "ePAPR para-virtualization support" 372e1ae9c0SLiu Yu-B13201 help 382e1ae9c0SLiu Yu-B13201 Enables ePAPR para-virtualization support for guests. 392e1ae9c0SLiu Yu-B13201 402e1ae9c0SLiu Yu-B13201 In case of doubt, say Y 412e1ae9c0SLiu Yu-B13201 424330f5daSKumar Galaconfig PPC_NATIVE 434330f5daSKumar Gala bool 44be34fff0SChristophe Leroy depends on PPC_BOOK3S_32 || PPC64 454330f5daSKumar Gala help 464330f5daSKumar Gala Support for running natively on the hardware, i.e. without 474330f5daSKumar Gala a hypervisor. This option is not user-selectable but should 484330f5daSKumar Gala be selected by all platforms that need it. 494330f5daSKumar Gala 5028794d34SBenjamin Herrenschmidtconfig PPC_OF_BOOT_TRAMPOLINE 5128794d34SBenjamin Herrenschmidt bool "Support booting from Open Firmware or yaboot" 52be34fff0SChristophe Leroy depends on PPC_BOOK3S_32 || PPC64 5328794d34SBenjamin Herrenschmidt default y 5428794d34SBenjamin Herrenschmidt help 5528794d34SBenjamin Herrenschmidt Support from booting from Open Firmware or yaboot using an 5628794d34SBenjamin Herrenschmidt Open Firmware client interface. This enables the kernel to 57f65e51d7SSylvestre Ledru communicate with open firmware to retrieve system information 5828794d34SBenjamin Herrenschmidt such as the device tree. 5928794d34SBenjamin Herrenschmidt 6028794d34SBenjamin Herrenschmidt In case of doubt, say Y 6128794d34SBenjamin Herrenschmidt 62c6ee9619SMichael Ellermanconfig PPC_DT_CPU_FTRS 63c6ee9619SMichael Ellerman bool "Device-tree based CPU feature discovery & setup" 64c6ee9619SMichael Ellerman depends on PPC_BOOK3S_64 65c6ee9619SMichael Ellerman default y 66c6ee9619SMichael Ellerman help 67c6ee9619SMichael Ellerman This enables code to use a new device tree binding for describing CPU 68c6ee9619SMichael Ellerman compatibility and features. Saying Y here will attempt to use the new 69c6ee9619SMichael Ellerman binding if the firmware provides it. Currently only the skiboot 70c6ee9619SMichael Ellerman firmware provides this binding. 71c6ee9619SMichael Ellerman If you're not sure say Y. 72c6ee9619SMichael Ellerman 734330f5daSKumar Galaconfig UDBG_RTAS_CONSOLE 744330f5daSKumar Gala bool "RTAS based debug console" 754330f5daSKumar Gala depends on PPC_RTAS 764330f5daSKumar Gala 771ece355bSMilton Millerconfig PPC_SMP_MUXED_IPI 781ece355bSMilton Miller bool 791ece355bSMilton Miller help 8083fc61a5SMasanari Iida Select this option if your platform supports SMP and your 811ece355bSMilton Miller interrupt controller provides less than 4 interrupts to each 821ece355bSMilton Miller cpu. This will enable the generic code to multiplex the 4 831ece355bSMilton Miller messages on to one ipi. 841ece355bSMilton Miller 85b0bbad60SJohn Rigbyconfig IPIC 86b0bbad60SJohn Rigby bool 87b0bbad60SJohn Rigby 8898750261SKumar Galaconfig MPIC 8998750261SKumar Gala bool 9098750261SKumar Gala 9136ca09beSDongsheng.wang@freescale.comconfig MPIC_TIMER 9236ca09beSDongsheng.wang@freescale.com bool "MPIC Global Timer" 9336ca09beSDongsheng.wang@freescale.com depends on MPIC && FSL_SOC 9436ca09beSDongsheng.wang@freescale.com help 9536ca09beSDongsheng.wang@freescale.com The MPIC global timer is a hardware timer inside the 9636ca09beSDongsheng.wang@freescale.com Freescale PIC complying with OpenPIC standard. When the 9736ca09beSDongsheng.wang@freescale.com specified interval times out, the hardware timer generates 9836ca09beSDongsheng.wang@freescale.com an interrupt. The driver currently is only tested on fsl 9936ca09beSDongsheng.wang@freescale.com chip, but it can potentially support other global timers 10036ca09beSDongsheng.wang@freescale.com complying with the OpenPIC standard. 10136ca09beSDongsheng.wang@freescale.com 102a63b3bc7SDongsheng.wang@freescale.comconfig FSL_MPIC_TIMER_WAKEUP 103a63b3bc7SDongsheng.wang@freescale.com tristate "Freescale MPIC global timer wakeup driver" 104a63b3bc7SDongsheng.wang@freescale.com depends on FSL_SOC && MPIC_TIMER && PM 105a63b3bc7SDongsheng.wang@freescale.com help 106a63b3bc7SDongsheng.wang@freescale.com The driver provides a way to wake up the system by MPIC 107a63b3bc7SDongsheng.wang@freescale.com timer. 108a63b3bc7SDongsheng.wang@freescale.com e.g. "echo 5 > /sys/devices/system/mpic/timer_wakeup" 109a63b3bc7SDongsheng.wang@freescale.com 1103a93261fSAshish Kalraconfig PPC_EPAPR_HV_PIC 1113a93261fSAshish Kalra bool 11240656397SStuart Yoder select EPAPR_PARAVIRT 1133a93261fSAshish Kalra 11498750261SKumar Galaconfig MPIC_WEIRD 11598750261SKumar Gala bool 11698750261SKumar Gala 1178626816eSJia Hongtaoconfig MPIC_MSGR 1188626816eSJia Hongtao bool "MPIC message register support" 1198626816eSJia Hongtao depends on MPIC 1208626816eSJia Hongtao help 1218626816eSJia Hongtao Enables support for the MPIC message registers. These 1228626816eSJia Hongtao registers are used for inter-processor communication. 1238626816eSJia Hongtao 12498750261SKumar Galaconfig PPC_I8259 12598750261SKumar Gala bool 12698750261SKumar Gala 1274330f5daSKumar Galaconfig U3_DART 1284330f5daSKumar Gala bool 12928794d34SBenjamin Herrenschmidt depends on PPC64 1304330f5daSKumar Gala 1314330f5daSKumar Galaconfig PPC_RTAS 1324330f5daSKumar Gala bool 1334330f5daSKumar Gala 1344330f5daSKumar Galaconfig RTAS_ERROR_LOGGING 1354330f5daSKumar Gala bool 1364330f5daSKumar Gala depends on PPC_RTAS 1374330f5daSKumar Gala 1383d541c4bSBenjamin Herrenschmidtconfig PPC_RTAS_DAEMON 1393d541c4bSBenjamin Herrenschmidt bool 1403d541c4bSBenjamin Herrenschmidt depends on PPC_RTAS 1413d541c4bSBenjamin Herrenschmidt 1424330f5daSKumar Galaconfig RTAS_PROC 1434330f5daSKumar Gala bool "Proc interface to RTAS" 144b80ec3dcSMichael Ellerman depends on PPC_RTAS && PROC_FS 1454330f5daSKumar Gala default y 1464330f5daSKumar Gala 1474330f5daSKumar Galaconfig RTAS_FLASH 1484330f5daSKumar Gala tristate "Firmware flash interface" 1494330f5daSKumar Gala depends on PPC64 && RTAS_PROC 1504330f5daSKumar Gala 1514330f5daSKumar Galaconfig MMIO_NVRAM 1524330f5daSKumar Gala bool 1534330f5daSKumar Gala 1546cfef5b2SMichael Ellermanconfig MPIC_U3_HT_IRQS 1554330f5daSKumar Gala bool 1564330f5daSKumar Gala 1570d72ba93SOlof Johanssonconfig MPIC_BROKEN_REGREAD 1580d72ba93SOlof Johansson bool 1590d72ba93SOlof Johansson depends on MPIC 1600d72ba93SOlof Johansson help 1610d72ba93SOlof Johansson This option enables a MPIC driver workaround for some chips 1620d72ba93SOlof Johansson that have a bug that causes some interrupt source information 1630d72ba93SOlof Johansson to not read back properly. It is safe to use on other chips as 1640d72ba93SOlof Johansson well, but enabling it uses about 8KB of memory to keep copies 1650d72ba93SOlof Johansson of the register contents in software. 1660d72ba93SOlof Johansson 167317f06deSGavin Shanconfig EEH 168317f06deSGavin Shan bool 169317f06deSGavin Shan depends on (PPC_POWERNV || PPC_PSERIES) && PCI 170317f06deSGavin Shan default y 171317f06deSGavin Shan 1724330f5daSKumar Galaconfig PPC_MPC106 1734330f5daSKumar Gala bool 1744330f5daSKumar Gala 1754330f5daSKumar Galaconfig PPC_970_NAP 1764330f5daSKumar Gala bool 1774330f5daSKumar Gala 178948cf67cSBenjamin Herrenschmidtconfig PPC_P7_NAP 179948cf67cSBenjamin Herrenschmidt bool 180948cf67cSBenjamin Herrenschmidt 181ed0bc98fSNicholas Pigginconfig PPC_BOOK3S_IDLE 182ed0bc98fSNicholas Piggin def_bool y 183ed0bc98fSNicholas Piggin depends on (PPC_970_NAP || PPC_P7_NAP) 184ed0bc98fSNicholas Piggin 185ecd73cc5SBenjamin Herrenschmidtconfig PPC_INDIRECT_PIO 1864330f5daSKumar Gala bool 1874330f5daSKumar Gala select GENERIC_IOMAP 18821176fedSMichael Ellerman 18921176fedSMichael Ellermanconfig PPC_INDIRECT_MMIO 19021176fedSMichael Ellerman bool 1914330f5daSKumar Gala 1923cc30d07SMichael Ellermanconfig PPC_IO_WORKAROUNDS 1933cc30d07SMichael Ellerman bool 1943cc30d07SMichael Ellerman 1954330f5daSKumar Galasource "drivers/cpufreq/Kconfig" 1964330f5daSKumar Gala 197e179816cSDeepthi Dharwarmenu "CPUIdle driver" 198e179816cSDeepthi Dharwar 199e179816cSDeepthi Dharwarsource "drivers/cpuidle/Kconfig" 200e179816cSDeepthi Dharwar 201e179816cSDeepthi Dharwarendmenu 202e179816cSDeepthi Dharwar 2034330f5daSKumar Galaconfig TAU 2044330f5daSKumar Gala bool "On-chip CPU temperature sensor support" 205be34fff0SChristophe Leroy depends on PPC_BOOK3S_32 2064330f5daSKumar Gala help 2074330f5daSKumar Gala G3 and G4 processors have an on-chip temperature sensor called the 2084330f5daSKumar Gala 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die 2094330f5daSKumar Gala temperature within 2-4 degrees Celsius. This option shows the current 2104330f5daSKumar Gala on-die temperature in /proc/cpuinfo if the cpu supports it. 2114330f5daSKumar Gala 2125e3119e1SFinn Thain Unfortunately, this sensor is very inaccurate when uncalibrated, so 2135e3119e1SFinn Thain don't assume the cpu temp is actually what /proc/cpuinfo says it is. 2144330f5daSKumar Gala 2154330f5daSKumar Galaconfig TAU_INT 216e63d6fb5SFinn Thain bool "Interrupt driven TAU driver (EXPERIMENTAL)" 2174330f5daSKumar Gala depends on TAU 218a7f7f624SMasahiro Yamada help 2194330f5daSKumar Gala The TAU supports an interrupt driven mode which causes an interrupt 2204330f5daSKumar Gala whenever the temperature goes out of range. This is the fastest way 2214330f5daSKumar Gala to get notified the temp has exceeded a range. With this option off, 2224330f5daSKumar Gala a timer is used to re-check the temperature periodically. 2234330f5daSKumar Gala 224e63d6fb5SFinn Thain If in doubt, say N here. 2254330f5daSKumar Gala 2264330f5daSKumar Galaconfig TAU_AVERAGE 2274330f5daSKumar Gala bool "Average high and low temp" 2284330f5daSKumar Gala depends on TAU 229a7f7f624SMasahiro Yamada help 2304330f5daSKumar Gala The TAU hardware can compare the temperature to an upper and lower 2314330f5daSKumar Gala bound. The default behavior is to show both the upper and lower 2324330f5daSKumar Gala bound in /proc/cpuinfo. If the range is large, the temperature is 2334330f5daSKumar Gala either changing a lot, or the TAU hardware is broken (likely on some 2344330f5daSKumar Gala G4's). If the range is small (around 4 degrees), the temperature is 2354330f5daSKumar Gala relatively stable. If you say Y here, a single temperature value, 2364330f5daSKumar Gala halfway between the upper and lower bounds, will be reported in 2374330f5daSKumar Gala /proc/cpuinfo. 2384330f5daSKumar Gala 2394330f5daSKumar Gala If in doubt, say N here. 2404330f5daSKumar Gala 2415c091193SAnton Vorontsovconfig QE_GPIO 2425c091193SAnton Vorontsov bool "QE GPIO support" 2435c091193SAnton Vorontsov depends on QUICC_ENGINE 24486c55af4SLinus Walleij select GPIOLIB 2455c091193SAnton Vorontsov help 2465c091193SAnton Vorontsov Say Y here if you're going to use hardware that connects to the 2475c091193SAnton Vorontsov QE GPIOs. 2485c091193SAnton Vorontsov 249d6071f88SKumar Galaconfig CPM2 250b8b3caf3SPaul Gortmaker bool "Enable support for the CPM2 (Communications Processor Module)" 2515753c082SKumar Gala depends on (FSL_SOC_BOOKE && PPC32) || 8260 252c374e00eSScott Wood select CPM 253eb01d42aSChristoph Hellwig select HAVE_PCI 25486c55af4SLinus Walleij select GPIOLIB 255d6071f88SKumar Gala help 256d6071f88SKumar Gala The CPM2 (Communications Processor Module) is a coprocessor on 257d6071f88SKumar Gala embedded CPUs made by Freescale. Selecting this option means that 258d6071f88SKumar Gala you wish to build a kernel for a machine with a CPM2 coprocessor 259d6071f88SKumar Gala on it (826x, 827x, 8560). 260d6071f88SKumar Gala 261b66510cbSKumar Galaconfig FSL_ULI1575 262b66510cbSKumar Gala bool 263fb4f0e88SKumar Gala select GENERIC_ISA_DMA 264b66510cbSKumar Gala help 265b66510cbSKumar Gala Supports for the ULI1575 PCIe south bridge that exists on some 266b66510cbSKumar Gala Freescale reference boards. The boards all use the ULI in pretty 267b66510cbSKumar Gala much the same way. 268b66510cbSKumar Gala 269c374e00eSScott Woodconfig CPM 270c374e00eSScott Wood bool 2710e6e01ffSZhao Qiang select GENERIC_ALLOCATOR 272c374e00eSScott Wood 27322258fa4SDavid Gibsonconfig OF_RTC 27422258fa4SDavid Gibson bool 27522258fa4SDavid Gibson help 276692105b8SMatt LaPlante Uses information from the OF or flattened device tree to instantiate 27722258fa4SDavid Gibson platform devices for direct mapped RTC chips like the DS1742 or DS1743. 27822258fa4SDavid Gibson 279835ea93eSArnd Bergmannconfig GEN_RTC 280835ea93eSArnd Bergmann bool "Use the platform RTC operations from user space" 281835ea93eSArnd Bergmann select RTC_CLASS 282835ea93eSArnd Bergmann select RTC_DRV_GENERIC 283835ea93eSArnd Bergmann help 284835ea93eSArnd Bergmann This option provides backwards compatibility with the old gen_rtc.ko 285835ea93eSArnd Bergmann module that was traditionally used for old PowerPC machines. 286835ea93eSArnd Bergmann Platforms should migrate to enabling the RTC_DRV_GENERIC by hand 287835ea93eSArnd Bergmann replacing their get_rtc_time/set_rtc_time callbacks with 288835ea93eSArnd Bergmann a proper RTC device driver. 289835ea93eSArnd Bergmann 290ea0105eaSAnton Vorontsovconfig MCU_MPC8349EMITX 2916ca6ca5dSFabio Baltieri bool "MPC8349E-mITX MCU driver" 29282640a6bSAl Viro depends on I2C=y && PPC_83xx 29386c55af4SLinus Walleij select GPIOLIB 294ea0105eaSAnton Vorontsov help 295ea0105eaSAnton Vorontsov Say Y here to enable soft power-off functionality on the Freescale 296ea0105eaSAnton Vorontsov boards with the MPC8349E-mITX-compatible MCU chips. This driver will 297ea0105eaSAnton Vorontsov also register MCU GPIOs with the generic GPIO API, so you'll able 298ea0105eaSAnton Vorontsov to use MCU pins as GPIOs. 299ea0105eaSAnton Vorontsov 3004330f5daSKumar Galaendmenu 301