1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 1995 Linus Torvalds 4 * Adapted from 'alpha' version by Gary Thomas 5 * Modified by Cort Dougan (cort@cs.nmt.edu) 6 * Modified for MBX using prep/chrp/pmac functions by Dan (dmalek@jlc.net) 7 * Further modified for generic 8xx by Dan. 8 */ 9 10 /* 11 * bootup setup stuff.. 12 */ 13 14 #include <linux/kernel.h> 15 #include <linux/interrupt.h> 16 #include <linux/init.h> 17 #include <linux/time.h> 18 #include <linux/rtc.h> 19 #include <linux/fsl_devices.h> 20 #include <linux/of.h> 21 #include <linux/of_irq.h> 22 23 #include <asm/io.h> 24 #include <asm/8xx_immap.h> 25 #include <mm/mmu_decl.h> 26 27 #include "pic.h" 28 29 #include "mpc8xx.h" 30 31 /* A place holder for time base interrupts, if they are ever enabled. */ 32 static irqreturn_t timebase_interrupt(int irq, void *dev) 33 { 34 printk ("timebase_interrupt()\n"); 35 36 return IRQ_HANDLED; 37 } 38 39 /* per-board overridable init_internal_rtc() function. */ 40 void __init __attribute__ ((weak)) 41 init_internal_rtc(void) 42 { 43 /* Disable the RTC one second and alarm interrupts. */ 44 clrbits16(&mpc8xx_immr->im_sit.sit_rtcsc, (RTCSC_SIE | RTCSC_ALE)); 45 46 /* Enable the RTC */ 47 setbits16(&mpc8xx_immr->im_sit.sit_rtcsc, (RTCSC_RTF | RTCSC_RTE)); 48 } 49 50 static int __init get_freq(char *name, unsigned long *val) 51 { 52 struct device_node *cpu; 53 const unsigned int *fp; 54 int found = 0; 55 56 /* The cpu node should have timebase and clock frequency properties */ 57 cpu = of_get_cpu_node(0, NULL); 58 59 if (cpu) { 60 fp = of_get_property(cpu, name, NULL); 61 if (fp) { 62 found = 1; 63 *val = *fp; 64 } 65 66 of_node_put(cpu); 67 } 68 69 return found; 70 } 71 72 /* The decrementer counts at the system (internal) clock frequency divided by 73 * sixteen, or external oscillator divided by four. We force the processor 74 * to use system clock divided by sixteen. 75 */ 76 void __init mpc8xx_calibrate_decr(void) 77 { 78 struct device_node *cpu; 79 int irq, virq; 80 81 /* Unlock the SCCR. */ 82 out_be32(&mpc8xx_immr->im_clkrstk.cark_sccrk, ~KAPWR_KEY); 83 out_be32(&mpc8xx_immr->im_clkrstk.cark_sccrk, KAPWR_KEY); 84 85 /* Force all 8xx processors to use divide by 16 processor clock. */ 86 setbits32(&mpc8xx_immr->im_clkrst.car_sccr, 0x02000000); 87 88 /* Processor frequency is MHz. 89 */ 90 ppc_proc_freq = 50000000; 91 if (!get_freq("clock-frequency", &ppc_proc_freq)) 92 printk(KERN_ERR "WARNING: Estimating processor frequency " 93 "(not found)\n"); 94 95 ppc_tb_freq = ppc_proc_freq / 16; 96 printk("Decrementer Frequency = 0x%lx\n", ppc_tb_freq); 97 98 /* Perform some more timer/timebase initialization. This used 99 * to be done elsewhere, but other changes caused it to get 100 * called more than once....that is a bad thing. 101 * 102 * First, unlock all of the registers we are going to modify. 103 * To protect them from corruption during power down, registers 104 * that are maintained by keep alive power are "locked". To 105 * modify these registers we have to write the key value to 106 * the key location associated with the register. 107 * Some boards power up with these unlocked, while others 108 * are locked. Writing anything (including the unlock code?) 109 * to the unlocked registers will lock them again. So, here 110 * we guarantee the registers are locked, then we unlock them 111 * for our use. 112 */ 113 out_be32(&mpc8xx_immr->im_sitk.sitk_tbscrk, ~KAPWR_KEY); 114 out_be32(&mpc8xx_immr->im_sitk.sitk_rtcsck, ~KAPWR_KEY); 115 out_be32(&mpc8xx_immr->im_sitk.sitk_tbk, ~KAPWR_KEY); 116 out_be32(&mpc8xx_immr->im_sitk.sitk_tbscrk, KAPWR_KEY); 117 out_be32(&mpc8xx_immr->im_sitk.sitk_rtcsck, KAPWR_KEY); 118 out_be32(&mpc8xx_immr->im_sitk.sitk_tbk, KAPWR_KEY); 119 120 init_internal_rtc(); 121 122 /* Enabling the decrementer also enables the timebase interrupts 123 * (or from the other point of view, to get decrementer interrupts 124 * we have to enable the timebase). The decrementer interrupt 125 * is wired into the vector table, nothing to do here for that. 126 */ 127 cpu = of_get_cpu_node(0, NULL); 128 virq= irq_of_parse_and_map(cpu, 0); 129 of_node_put(cpu); 130 irq = virq_to_hw(virq); 131 132 out_be16(&mpc8xx_immr->im_sit.sit_tbscr, 133 ((1 << (7 - (irq / 2))) << 8) | (TBSCR_TBF | TBSCR_TBE)); 134 135 if (request_irq(virq, timebase_interrupt, IRQF_NO_THREAD, "tbint", 136 NULL)) 137 panic("Could not allocate timer IRQ!"); 138 } 139 140 /* The RTC on the MPC8xx is an internal register. 141 * We want to protect this during power down, so we need to unlock, 142 * modify, and re-lock. 143 */ 144 145 int mpc8xx_set_rtc_time(struct rtc_time *tm) 146 { 147 time64_t time; 148 149 time = rtc_tm_to_time64(tm); 150 151 out_be32(&mpc8xx_immr->im_sitk.sitk_rtck, KAPWR_KEY); 152 out_be32(&mpc8xx_immr->im_sit.sit_rtc, (u32)time); 153 out_be32(&mpc8xx_immr->im_sitk.sitk_rtck, ~KAPWR_KEY); 154 155 return 0; 156 } 157 158 void mpc8xx_get_rtc_time(struct rtc_time *tm) 159 { 160 unsigned long data; 161 162 /* Get time from the RTC. */ 163 data = in_be32(&mpc8xx_immr->im_sit.sit_rtc); 164 rtc_time64_to_tm(data, tm); 165 return; 166 } 167 168 void __noreturn mpc8xx_restart(char *cmd) 169 { 170 local_irq_disable(); 171 172 setbits32(&mpc8xx_immr->im_clkrst.car_plprcr, 0x00000080); 173 /* Clear the ME bit in MSR to cause checkstop on machine check 174 */ 175 mtmsr(mfmsr() & ~0x1000); 176 177 in_8(&mpc8xx_immr->im_clkrst.res[0]); 178 panic("Restart failed\n"); 179 } 180