1df34403dSVitaly Bordug /* 2df34403dSVitaly Bordug * Copyright (C) 1995 Linus Torvalds 3df34403dSVitaly Bordug * Adapted from 'alpha' version by Gary Thomas 4df34403dSVitaly Bordug * Modified by Cort Dougan (cort@cs.nmt.edu) 5df34403dSVitaly Bordug * Modified for MBX using prep/chrp/pmac functions by Dan (dmalek@jlc.net) 6df34403dSVitaly Bordug * Further modified for generic 8xx by Dan. 7df34403dSVitaly Bordug */ 8df34403dSVitaly Bordug 9df34403dSVitaly Bordug /* 10df34403dSVitaly Bordug * bootup setup stuff.. 11df34403dSVitaly Bordug */ 12df34403dSVitaly Bordug 13df34403dSVitaly Bordug #include <linux/kernel.h> 14df34403dSVitaly Bordug #include <linux/slab.h> 15df34403dSVitaly Bordug #include <linux/interrupt.h> 16df34403dSVitaly Bordug #include <linux/init.h> 17df34403dSVitaly Bordug #include <linux/time.h> 18df34403dSVitaly Bordug #include <linux/rtc.h> 19df34403dSVitaly Bordug 20df34403dSVitaly Bordug #include <asm/io.h> 21df34403dSVitaly Bordug #include <asm/mpc8xx.h> 22df34403dSVitaly Bordug #include <asm/8xx_immap.h> 23df34403dSVitaly Bordug #include <asm/prom.h> 24df34403dSVitaly Bordug #include <asm/fs_pd.h> 25df34403dSVitaly Bordug #include <mm/mmu_decl.h> 26df34403dSVitaly Bordug 27*fb533d0cSScott Wood #include <sysdev/mpc8xx_pic.h> 28*fb533d0cSScott Wood #include <sysdev/commproc.h> 29df34403dSVitaly Bordug 3080128ff7SVitaly Bordug #ifdef CONFIG_PCMCIA_M8XX 3180128ff7SVitaly Bordug struct mpc8xx_pcmcia_ops m8xx_pcmcia_ops; 3280128ff7SVitaly Bordug #endif 3380128ff7SVitaly Bordug 34df34403dSVitaly Bordug void m8xx_calibrate_decr(void); 35df34403dSVitaly Bordug extern int cpm_pic_init(void); 36df34403dSVitaly Bordug extern int cpm_get_irq(void); 37df34403dSVitaly Bordug 38df34403dSVitaly Bordug /* A place holder for time base interrupts, if they are ever enabled. */ 39*fb533d0cSScott Wood static irqreturn_t timebase_interrupt(int irq, void *dev) 40df34403dSVitaly Bordug { 41df34403dSVitaly Bordug printk ("timebase_interrupt()\n"); 42df34403dSVitaly Bordug 43df34403dSVitaly Bordug return IRQ_HANDLED; 44df34403dSVitaly Bordug } 45df34403dSVitaly Bordug 46df34403dSVitaly Bordug static struct irqaction tbint_irqaction = { 47df34403dSVitaly Bordug .handler = timebase_interrupt, 48df34403dSVitaly Bordug .mask = CPU_MASK_NONE, 49df34403dSVitaly Bordug .name = "tbint", 50df34403dSVitaly Bordug }; 51df34403dSVitaly Bordug 52df34403dSVitaly Bordug /* per-board overridable init_internal_rtc() function. */ 53df34403dSVitaly Bordug void __init __attribute__ ((weak)) 54df34403dSVitaly Bordug init_internal_rtc(void) 55df34403dSVitaly Bordug { 56*fb533d0cSScott Wood sit8xx_t __iomem *sys_tmr = immr_map(im_sit); 57df34403dSVitaly Bordug 58df34403dSVitaly Bordug /* Disable the RTC one second and alarm interrupts. */ 59df34403dSVitaly Bordug clrbits16(&sys_tmr->sit_rtcsc, (RTCSC_SIE | RTCSC_ALE)); 60df34403dSVitaly Bordug 61df34403dSVitaly Bordug /* Enable the RTC */ 62df34403dSVitaly Bordug setbits16(&sys_tmr->sit_rtcsc, (RTCSC_RTF | RTCSC_RTE)); 63df34403dSVitaly Bordug immr_unmap(sys_tmr); 64df34403dSVitaly Bordug } 65df34403dSVitaly Bordug 66df34403dSVitaly Bordug static int __init get_freq(char *name, unsigned long *val) 67df34403dSVitaly Bordug { 68df34403dSVitaly Bordug struct device_node *cpu; 69e2eb6392SStephen Rothwell const unsigned int *fp; 70df34403dSVitaly Bordug int found = 0; 71df34403dSVitaly Bordug 72df34403dSVitaly Bordug /* The cpu node should have timebase and clock frequency properties */ 73df34403dSVitaly Bordug cpu = of_find_node_by_type(NULL, "cpu"); 74df34403dSVitaly Bordug 75df34403dSVitaly Bordug if (cpu) { 76e2eb6392SStephen Rothwell fp = of_get_property(cpu, name, NULL); 77df34403dSVitaly Bordug if (fp) { 78df34403dSVitaly Bordug found = 1; 79e2eb6392SStephen Rothwell *val = *fp; 80df34403dSVitaly Bordug } 81df34403dSVitaly Bordug 82df34403dSVitaly Bordug of_node_put(cpu); 83df34403dSVitaly Bordug } 84df34403dSVitaly Bordug 85df34403dSVitaly Bordug return found; 86df34403dSVitaly Bordug } 87df34403dSVitaly Bordug 88df34403dSVitaly Bordug /* The decrementer counts at the system (internal) clock frequency divided by 89df34403dSVitaly Bordug * sixteen, or external oscillator divided by four. We force the processor 90df34403dSVitaly Bordug * to use system clock divided by sixteen. 91df34403dSVitaly Bordug */ 92df34403dSVitaly Bordug void __init mpc8xx_calibrate_decr(void) 93df34403dSVitaly Bordug { 94df34403dSVitaly Bordug struct device_node *cpu; 95*fb533d0cSScott Wood cark8xx_t __iomem *clk_r1; 96*fb533d0cSScott Wood car8xx_t __iomem *clk_r2; 97*fb533d0cSScott Wood sitk8xx_t __iomem *sys_tmr1; 98*fb533d0cSScott Wood sit8xx_t __iomem *sys_tmr2; 99df34403dSVitaly Bordug int irq, virq; 100df34403dSVitaly Bordug 101*fb533d0cSScott Wood clk_r1 = immr_map(im_clkrstk); 102df34403dSVitaly Bordug 103df34403dSVitaly Bordug /* Unlock the SCCR. */ 104df34403dSVitaly Bordug out_be32(&clk_r1->cark_sccrk, ~KAPWR_KEY); 105df34403dSVitaly Bordug out_be32(&clk_r1->cark_sccrk, KAPWR_KEY); 106df34403dSVitaly Bordug immr_unmap(clk_r1); 107df34403dSVitaly Bordug 108df34403dSVitaly Bordug /* Force all 8xx processors to use divide by 16 processor clock. */ 109*fb533d0cSScott Wood clk_r2 = immr_map(im_clkrst); 110df34403dSVitaly Bordug setbits32(&clk_r2->car_sccr, 0x02000000); 111df34403dSVitaly Bordug immr_unmap(clk_r2); 112df34403dSVitaly Bordug 113df34403dSVitaly Bordug /* Processor frequency is MHz. 114df34403dSVitaly Bordug */ 115df34403dSVitaly Bordug ppc_tb_freq = 50000000; 116df34403dSVitaly Bordug if (!get_freq("bus-frequency", &ppc_tb_freq)) { 117df34403dSVitaly Bordug printk(KERN_ERR "WARNING: Estimating decrementer frequency " 118df34403dSVitaly Bordug "(not found)\n"); 119df34403dSVitaly Bordug } 120df34403dSVitaly Bordug ppc_tb_freq /= 16; 121df34403dSVitaly Bordug ppc_proc_freq = 50000000; 122df34403dSVitaly Bordug if (!get_freq("clock-frequency", &ppc_proc_freq)) 123df34403dSVitaly Bordug printk(KERN_ERR "WARNING: Estimating processor frequency" 124df34403dSVitaly Bordug "(not found)\n"); 125df34403dSVitaly Bordug 126df34403dSVitaly Bordug printk("Decrementer Frequency = 0x%lx\n", ppc_tb_freq); 127df34403dSVitaly Bordug 128df34403dSVitaly Bordug /* Perform some more timer/timebase initialization. This used 129df34403dSVitaly Bordug * to be done elsewhere, but other changes caused it to get 130df34403dSVitaly Bordug * called more than once....that is a bad thing. 131df34403dSVitaly Bordug * 132df34403dSVitaly Bordug * First, unlock all of the registers we are going to modify. 133df34403dSVitaly Bordug * To protect them from corruption during power down, registers 134df34403dSVitaly Bordug * that are maintained by keep alive power are "locked". To 135df34403dSVitaly Bordug * modify these registers we have to write the key value to 136df34403dSVitaly Bordug * the key location associated with the register. 137df34403dSVitaly Bordug * Some boards power up with these unlocked, while others 138df34403dSVitaly Bordug * are locked. Writing anything (including the unlock code?) 139df34403dSVitaly Bordug * to the unlocked registers will lock them again. So, here 140df34403dSVitaly Bordug * we guarantee the registers are locked, then we unlock them 141df34403dSVitaly Bordug * for our use. 142df34403dSVitaly Bordug */ 143*fb533d0cSScott Wood sys_tmr1 = immr_map(im_sitk); 144df34403dSVitaly Bordug out_be32(&sys_tmr1->sitk_tbscrk, ~KAPWR_KEY); 145df34403dSVitaly Bordug out_be32(&sys_tmr1->sitk_rtcsck, ~KAPWR_KEY); 146df34403dSVitaly Bordug out_be32(&sys_tmr1->sitk_tbk, ~KAPWR_KEY); 147df34403dSVitaly Bordug out_be32(&sys_tmr1->sitk_tbscrk, KAPWR_KEY); 148df34403dSVitaly Bordug out_be32(&sys_tmr1->sitk_rtcsck, KAPWR_KEY); 149df34403dSVitaly Bordug out_be32(&sys_tmr1->sitk_tbk, KAPWR_KEY); 150df34403dSVitaly Bordug immr_unmap(sys_tmr1); 151df34403dSVitaly Bordug 152df34403dSVitaly Bordug init_internal_rtc(); 153df34403dSVitaly Bordug 154df34403dSVitaly Bordug /* Enabling the decrementer also enables the timebase interrupts 155df34403dSVitaly Bordug * (or from the other point of view, to get decrementer interrupts 156df34403dSVitaly Bordug * we have to enable the timebase). The decrementer interrupt 157df34403dSVitaly Bordug * is wired into the vector table, nothing to do here for that. 158df34403dSVitaly Bordug */ 159df34403dSVitaly Bordug cpu = of_find_node_by_type(NULL, "cpu"); 160df34403dSVitaly Bordug virq= irq_of_parse_and_map(cpu, 0); 161df34403dSVitaly Bordug irq = irq_map[virq].hwirq; 162df34403dSVitaly Bordug 163*fb533d0cSScott Wood sys_tmr2 = immr_map(im_sit); 164df34403dSVitaly Bordug out_be16(&sys_tmr2->sit_tbscr, ((1 << (7 - (irq/2))) << 8) | 165df34403dSVitaly Bordug (TBSCR_TBF | TBSCR_TBE)); 166df34403dSVitaly Bordug immr_unmap(sys_tmr2); 167df34403dSVitaly Bordug 168df34403dSVitaly Bordug if (setup_irq(virq, &tbint_irqaction)) 169df34403dSVitaly Bordug panic("Could not allocate timer IRQ!"); 170df34403dSVitaly Bordug } 171df34403dSVitaly Bordug 172df34403dSVitaly Bordug /* The RTC on the MPC8xx is an internal register. 173df34403dSVitaly Bordug * We want to protect this during power down, so we need to unlock, 174df34403dSVitaly Bordug * modify, and re-lock. 175df34403dSVitaly Bordug */ 176df34403dSVitaly Bordug 177df34403dSVitaly Bordug int mpc8xx_set_rtc_time(struct rtc_time *tm) 178df34403dSVitaly Bordug { 179*fb533d0cSScott Wood sitk8xx_t __iomem *sys_tmr1; 180*fb533d0cSScott Wood sit8xx_t __iomem *sys_tmr2; 181df34403dSVitaly Bordug int time; 182df34403dSVitaly Bordug 183*fb533d0cSScott Wood sys_tmr1 = immr_map(im_sitk); 184*fb533d0cSScott Wood sys_tmr2 = immr_map(im_sit); 185df34403dSVitaly Bordug time = mktime(tm->tm_year+1900, tm->tm_mon+1, tm->tm_mday, 186df34403dSVitaly Bordug tm->tm_hour, tm->tm_min, tm->tm_sec); 187df34403dSVitaly Bordug 188df34403dSVitaly Bordug out_be32(&sys_tmr1->sitk_rtck, KAPWR_KEY); 189df34403dSVitaly Bordug out_be32(&sys_tmr2->sit_rtc, time); 190df34403dSVitaly Bordug out_be32(&sys_tmr1->sitk_rtck, ~KAPWR_KEY); 191df34403dSVitaly Bordug 192df34403dSVitaly Bordug immr_unmap(sys_tmr2); 193df34403dSVitaly Bordug immr_unmap(sys_tmr1); 194df34403dSVitaly Bordug return 0; 195df34403dSVitaly Bordug } 196df34403dSVitaly Bordug 197df34403dSVitaly Bordug void mpc8xx_get_rtc_time(struct rtc_time *tm) 198df34403dSVitaly Bordug { 199df34403dSVitaly Bordug unsigned long data; 200*fb533d0cSScott Wood sit8xx_t __iomem *sys_tmr = immr_map(im_sit); 201df34403dSVitaly Bordug 202df34403dSVitaly Bordug /* Get time from the RTC. */ 203df34403dSVitaly Bordug data = in_be32(&sys_tmr->sit_rtc); 204df34403dSVitaly Bordug to_tm(data, tm); 205df34403dSVitaly Bordug tm->tm_year -= 1900; 206df34403dSVitaly Bordug tm->tm_mon -= 1; 207df34403dSVitaly Bordug immr_unmap(sys_tmr); 208df34403dSVitaly Bordug return; 209df34403dSVitaly Bordug } 210df34403dSVitaly Bordug 211df34403dSVitaly Bordug void mpc8xx_restart(char *cmd) 212df34403dSVitaly Bordug { 213*fb533d0cSScott Wood car8xx_t __iomem *clk_r = immr_map(im_clkrst); 214df34403dSVitaly Bordug 215df34403dSVitaly Bordug 216df34403dSVitaly Bordug local_irq_disable(); 217df34403dSVitaly Bordug 218df34403dSVitaly Bordug setbits32(&clk_r->car_plprcr, 0x00000080); 219df34403dSVitaly Bordug /* Clear the ME bit in MSR to cause checkstop on machine check 220df34403dSVitaly Bordug */ 221df34403dSVitaly Bordug mtmsr(mfmsr() & ~0x1000); 222df34403dSVitaly Bordug 223*fb533d0cSScott Wood in_8(&clk_r->res[0]); 224*fb533d0cSScott Wood panic("Restart failed\n"); 225df34403dSVitaly Bordug } 226df34403dSVitaly Bordug 227df34403dSVitaly Bordug static void cpm_cascade(unsigned int irq, struct irq_desc *desc) 228df34403dSVitaly Bordug { 229df34403dSVitaly Bordug int cascade_irq; 230df34403dSVitaly Bordug 231df34403dSVitaly Bordug if ((cascade_irq = cpm_get_irq()) >= 0) { 232df34403dSVitaly Bordug struct irq_desc *cdesc = irq_desc + cascade_irq; 233df34403dSVitaly Bordug 234df34403dSVitaly Bordug generic_handle_irq(cascade_irq); 235df34403dSVitaly Bordug cdesc->chip->eoi(cascade_irq); 236df34403dSVitaly Bordug } 237df34403dSVitaly Bordug desc->chip->eoi(irq); 238df34403dSVitaly Bordug } 239df34403dSVitaly Bordug 240df34403dSVitaly Bordug /* Initialize the internal interrupt controller. The number of 241df34403dSVitaly Bordug * interrupts supported can vary with the processor type, and the 242df34403dSVitaly Bordug * 82xx family can have up to 64. 243df34403dSVitaly Bordug * External interrupts can be either edge or level triggered, and 244df34403dSVitaly Bordug * need to be initialized by the appropriate driver. 245df34403dSVitaly Bordug */ 246df34403dSVitaly Bordug void __init m8xx_pic_init(void) 247df34403dSVitaly Bordug { 248df34403dSVitaly Bordug int irq; 249df34403dSVitaly Bordug 250df34403dSVitaly Bordug if (mpc8xx_pic_init()) { 251df34403dSVitaly Bordug printk(KERN_ERR "Failed interrupt 8xx controller initialization\n"); 252df34403dSVitaly Bordug return; 253df34403dSVitaly Bordug } 254df34403dSVitaly Bordug 255df34403dSVitaly Bordug irq = cpm_pic_init(); 256df34403dSVitaly Bordug if (irq != NO_IRQ) 257df34403dSVitaly Bordug set_irq_chained_handler(irq, cpm_cascade); 258df34403dSVitaly Bordug } 259