1b2441318SGreg Kroah-Hartman // SPDX-License-Identifier: GPL-2.0 2df34403dSVitaly Bordug /* 3df34403dSVitaly Bordug * Copyright (C) 1995 Linus Torvalds 4df34403dSVitaly Bordug * Adapted from 'alpha' version by Gary Thomas 5df34403dSVitaly Bordug * Modified by Cort Dougan (cort@cs.nmt.edu) 6df34403dSVitaly Bordug * Modified for MBX using prep/chrp/pmac functions by Dan (dmalek@jlc.net) 7df34403dSVitaly Bordug * Further modified for generic 8xx by Dan. 8df34403dSVitaly Bordug */ 9df34403dSVitaly Bordug 10df34403dSVitaly Bordug /* 11df34403dSVitaly Bordug * bootup setup stuff.. 12df34403dSVitaly Bordug */ 13df34403dSVitaly Bordug 14df34403dSVitaly Bordug #include <linux/kernel.h> 15df34403dSVitaly Bordug #include <linux/interrupt.h> 16df34403dSVitaly Bordug #include <linux/init.h> 17df34403dSVitaly Bordug #include <linux/time.h> 18df34403dSVitaly Bordug #include <linux/rtc.h> 1902753cb6SJochen Friedrich #include <linux/fsl_devices.h> 20e6f6390aSChristophe Leroy #include <linux/of.h> 21e6f6390aSChristophe Leroy #include <linux/of_irq.h> 22df34403dSVitaly Bordug 23df34403dSVitaly Bordug #include <asm/io.h> 24df34403dSVitaly Bordug #include <asm/8xx_immap.h> 25df34403dSVitaly Bordug #include <mm/mmu_decl.h> 26df34403dSVitaly Bordug 27de41ef6eSChristophe Leroy #include "pic.h" 2849b51545SJochen Friedrich 2949b51545SJochen Friedrich #include "mpc8xx.h" 30df34403dSVitaly Bordug 31df34403dSVitaly Bordug /* A place holder for time base interrupts, if they are ever enabled. */ 32fb533d0cSScott Wood static irqreturn_t timebase_interrupt(int irq, void *dev) 33df34403dSVitaly Bordug { 34df34403dSVitaly Bordug printk ("timebase_interrupt()\n"); 35df34403dSVitaly Bordug 36df34403dSVitaly Bordug return IRQ_HANDLED; 37df34403dSVitaly Bordug } 38df34403dSVitaly Bordug 39df34403dSVitaly Bordug static int __init get_freq(char *name, unsigned long *val) 40df34403dSVitaly Bordug { 41df34403dSVitaly Bordug struct device_node *cpu; 42e2eb6392SStephen Rothwell const unsigned int *fp; 43df34403dSVitaly Bordug int found = 0; 44df34403dSVitaly Bordug 45df34403dSVitaly Bordug /* The cpu node should have timebase and clock frequency properties */ 4638959a09SRob Herring cpu = of_get_cpu_node(0, NULL); 47df34403dSVitaly Bordug 48df34403dSVitaly Bordug if (cpu) { 49e2eb6392SStephen Rothwell fp = of_get_property(cpu, name, NULL); 50df34403dSVitaly Bordug if (fp) { 51df34403dSVitaly Bordug found = 1; 52e2eb6392SStephen Rothwell *val = *fp; 53df34403dSVitaly Bordug } 54df34403dSVitaly Bordug 55df34403dSVitaly Bordug of_node_put(cpu); 56df34403dSVitaly Bordug } 57df34403dSVitaly Bordug 58df34403dSVitaly Bordug return found; 59df34403dSVitaly Bordug } 60df34403dSVitaly Bordug 61df34403dSVitaly Bordug /* The decrementer counts at the system (internal) clock frequency divided by 62df34403dSVitaly Bordug * sixteen, or external oscillator divided by four. We force the processor 63df34403dSVitaly Bordug * to use system clock divided by sixteen. 64df34403dSVitaly Bordug */ 65df34403dSVitaly Bordug void __init mpc8xx_calibrate_decr(void) 66df34403dSVitaly Bordug { 67df34403dSVitaly Bordug struct device_node *cpu; 68df34403dSVitaly Bordug int irq, virq; 69df34403dSVitaly Bordug 70df34403dSVitaly Bordug /* Unlock the SCCR. */ 71fbbf4280SChristophe Leroy out_be32(&mpc8xx_immr->im_clkrstk.cark_sccrk, ~KAPWR_KEY); 72fbbf4280SChristophe Leroy out_be32(&mpc8xx_immr->im_clkrstk.cark_sccrk, KAPWR_KEY); 73df34403dSVitaly Bordug 74df34403dSVitaly Bordug /* Force all 8xx processors to use divide by 16 processor clock. */ 75fbbf4280SChristophe Leroy setbits32(&mpc8xx_immr->im_clkrst.car_sccr, 0x02000000); 76df34403dSVitaly Bordug 77df34403dSVitaly Bordug /* Processor frequency is MHz. 78df34403dSVitaly Bordug */ 79df34403dSVitaly Bordug ppc_proc_freq = 50000000; 80df34403dSVitaly Bordug if (!get_freq("clock-frequency", &ppc_proc_freq)) 81df34403dSVitaly Bordug printk(KERN_ERR "WARNING: Estimating processor frequency " 82df34403dSVitaly Bordug "(not found)\n"); 83df34403dSVitaly Bordug 8450530378SAnton Vorontsov ppc_tb_freq = ppc_proc_freq / 16; 85df34403dSVitaly Bordug printk("Decrementer Frequency = 0x%lx\n", ppc_tb_freq); 86df34403dSVitaly Bordug 87df34403dSVitaly Bordug /* Perform some more timer/timebase initialization. This used 88df34403dSVitaly Bordug * to be done elsewhere, but other changes caused it to get 89df34403dSVitaly Bordug * called more than once....that is a bad thing. 90df34403dSVitaly Bordug * 91df34403dSVitaly Bordug * First, unlock all of the registers we are going to modify. 92df34403dSVitaly Bordug * To protect them from corruption during power down, registers 93df34403dSVitaly Bordug * that are maintained by keep alive power are "locked". To 94df34403dSVitaly Bordug * modify these registers we have to write the key value to 95df34403dSVitaly Bordug * the key location associated with the register. 96df34403dSVitaly Bordug * Some boards power up with these unlocked, while others 97df34403dSVitaly Bordug * are locked. Writing anything (including the unlock code?) 98df34403dSVitaly Bordug * to the unlocked registers will lock them again. So, here 99df34403dSVitaly Bordug * we guarantee the registers are locked, then we unlock them 100df34403dSVitaly Bordug * for our use. 101df34403dSVitaly Bordug */ 102fbbf4280SChristophe Leroy out_be32(&mpc8xx_immr->im_sitk.sitk_tbscrk, ~KAPWR_KEY); 103fbbf4280SChristophe Leroy out_be32(&mpc8xx_immr->im_sitk.sitk_rtcsck, ~KAPWR_KEY); 104fbbf4280SChristophe Leroy out_be32(&mpc8xx_immr->im_sitk.sitk_tbk, ~KAPWR_KEY); 105fbbf4280SChristophe Leroy out_be32(&mpc8xx_immr->im_sitk.sitk_tbscrk, KAPWR_KEY); 106fbbf4280SChristophe Leroy out_be32(&mpc8xx_immr->im_sitk.sitk_rtcsck, KAPWR_KEY); 107fbbf4280SChristophe Leroy out_be32(&mpc8xx_immr->im_sitk.sitk_tbk, KAPWR_KEY); 108df34403dSVitaly Bordug 109*4531f128SChristophe Leroy /* Disable the RTC one second and alarm interrupts. */ 110*4531f128SChristophe Leroy clrbits16(&mpc8xx_immr->im_sit.sit_rtcsc, (RTCSC_SIE | RTCSC_ALE)); 111*4531f128SChristophe Leroy 112*4531f128SChristophe Leroy /* Enable the RTC */ 113*4531f128SChristophe Leroy setbits16(&mpc8xx_immr->im_sit.sit_rtcsc, (RTCSC_RTF | RTCSC_RTE)); 114df34403dSVitaly Bordug 115df34403dSVitaly Bordug /* Enabling the decrementer also enables the timebase interrupts 116df34403dSVitaly Bordug * (or from the other point of view, to get decrementer interrupts 117df34403dSVitaly Bordug * we have to enable the timebase). The decrementer interrupt 118df34403dSVitaly Bordug * is wired into the vector table, nothing to do here for that. 119df34403dSVitaly Bordug */ 12038959a09SRob Herring cpu = of_get_cpu_node(0, NULL); 121df34403dSVitaly Bordug virq= irq_of_parse_and_map(cpu, 0); 12238959a09SRob Herring of_node_put(cpu); 123476eb491SGrant Likely irq = virq_to_hw(virq); 124df34403dSVitaly Bordug 125fbbf4280SChristophe Leroy out_be16(&mpc8xx_immr->im_sit.sit_tbscr, 126fbbf4280SChristophe Leroy ((1 << (7 - (irq / 2))) << 8) | (TBSCR_TBF | TBSCR_TBE)); 127df34403dSVitaly Bordug 128b4f00d5bSafzal mohammed if (request_irq(virq, timebase_interrupt, IRQF_NO_THREAD, "tbint", 129b4f00d5bSafzal mohammed NULL)) 130df34403dSVitaly Bordug panic("Could not allocate timer IRQ!"); 131df34403dSVitaly Bordug } 132df34403dSVitaly Bordug 133df34403dSVitaly Bordug /* The RTC on the MPC8xx is an internal register. 134df34403dSVitaly Bordug * We want to protect this during power down, so we need to unlock, 135df34403dSVitaly Bordug * modify, and re-lock. 136df34403dSVitaly Bordug */ 137df34403dSVitaly Bordug 138df34403dSVitaly Bordug int mpc8xx_set_rtc_time(struct rtc_time *tm) 139df34403dSVitaly Bordug { 1405235afa8SArnd Bergmann time64_t time; 141df34403dSVitaly Bordug 1425235afa8SArnd Bergmann time = rtc_tm_to_time64(tm); 143df34403dSVitaly Bordug 144fbbf4280SChristophe Leroy out_be32(&mpc8xx_immr->im_sitk.sitk_rtck, KAPWR_KEY); 145fbbf4280SChristophe Leroy out_be32(&mpc8xx_immr->im_sit.sit_rtc, (u32)time); 146fbbf4280SChristophe Leroy out_be32(&mpc8xx_immr->im_sitk.sitk_rtck, ~KAPWR_KEY); 147df34403dSVitaly Bordug 148df34403dSVitaly Bordug return 0; 149df34403dSVitaly Bordug } 150df34403dSVitaly Bordug 151df34403dSVitaly Bordug void mpc8xx_get_rtc_time(struct rtc_time *tm) 152df34403dSVitaly Bordug { 153df34403dSVitaly Bordug unsigned long data; 154df34403dSVitaly Bordug 155df34403dSVitaly Bordug /* Get time from the RTC. */ 156fbbf4280SChristophe Leroy data = in_be32(&mpc8xx_immr->im_sit.sit_rtc); 1575bfd6435SArnd Bergmann rtc_time64_to_tm(data, tm); 158df34403dSVitaly Bordug return; 159df34403dSVitaly Bordug } 160df34403dSVitaly Bordug 16195ec77c0SDaniel Axtens void __noreturn mpc8xx_restart(char *cmd) 162df34403dSVitaly Bordug { 163df34403dSVitaly Bordug local_irq_disable(); 164df34403dSVitaly Bordug 165fbbf4280SChristophe Leroy setbits32(&mpc8xx_immr->im_clkrst.car_plprcr, 0x00000080); 166df34403dSVitaly Bordug /* Clear the ME bit in MSR to cause checkstop on machine check 167df34403dSVitaly Bordug */ 168df34403dSVitaly Bordug mtmsr(mfmsr() & ~0x1000); 169df34403dSVitaly Bordug 170fbbf4280SChristophe Leroy in_8(&mpc8xx_immr->im_clkrst.res[0]); 171fb533d0cSScott Wood panic("Restart failed\n"); 172df34403dSVitaly Bordug } 173