xref: /linux/arch/powerpc/platforms/8xx/Kconfig (revision 93d90ad708b8da6efc0e487b66111aa9db7f70c7)
1config CPM1
2	bool
3	select CPM
4
5choice
6	prompt "8xx Machine Type"
7	depends on PPC_8xx
8	depends on 8xx
9	default MPC885ADS
10
11config MPC8XXFADS
12	bool "FADS"
13
14config MPC86XADS
15	bool "MPC86XADS"
16	select CPM1
17	help
18	  MPC86x Application Development System by Freescale Semiconductor.
19	  The MPC86xADS is meant to serve as a platform for s/w and h/w
20	  development around the MPC86X processor families.
21
22config MPC885ADS
23	bool "MPC885ADS"
24	select CPM1
25	select OF_DYNAMIC
26	help
27	  Freescale Semiconductor MPC885 Application Development System (ADS).
28	  Also known as DUET.
29	  The MPC885ADS is meant to serve as a platform for s/w and h/w
30	  development around the MPC885 processor family.
31
32config PPC_EP88XC
33	bool "Embedded Planet EP88xC (a.k.a. CWH-PPC-885XN-VE)"
34	select CPM1
35	help
36	  This enables support for the Embedded Planet EP88xC board.
37
38	  This board is also resold by Freescale as the QUICCStart
39	  MPC885 Evaluation System and/or the CWH-PPC-885XN-VE.
40
41config PPC_ADDER875
42	bool "Analogue & Micro Adder 875"
43	select CPM1
44	help
45	  This enables support for the Analogue & Micro Adder 875
46	  board.
47
48config TQM8XX
49	bool "TQM8XX"
50	select CPM1
51	help
52	  support for the mpc8xx based boards from TQM.
53
54endchoice
55
56menu "Freescale Ethernet driver platform-specific options"
57	depends on (FS_ENET && MPC885ADS)
58
59	config MPC8xx_SECOND_ETH
60	bool "Second Ethernet channel"
61	depends on MPC885ADS
62	default y
63	help
64	  This enables support for second Ethernet on MPC885ADS and MPC86xADS boards.
65	  The latter will use SCC1, for 885ADS you can select it below.
66
67	choice
68		prompt "Second Ethernet channel"
69		depends on MPC8xx_SECOND_ETH
70		default MPC8xx_SECOND_ETH_FEC2
71
72		config MPC8xx_SECOND_ETH_FEC2
73		bool "FEC2"
74		depends on MPC885ADS
75		help
76		  Enable FEC2 to serve as 2-nd Ethernet channel. Note that SMC2
77		  (often 2-nd UART) will not work if this is enabled.
78
79		config MPC8xx_SECOND_ETH_SCC3
80		bool "SCC3"
81		depends on MPC885ADS
82		help
83		  Enable SCC3 to serve as 2-nd Ethernet channel. Note that SMC1
84		  (often 1-nd UART) will not work if this is enabled.
85
86	endchoice
87
88endmenu
89
90#
91# MPC8xx Communication options
92#
93
94menu "MPC8xx CPM Options"
95	depends on 8xx
96
97# This doesn't really belong here, but it is convenient to ask
98# 8xx specific questions.
99comment "Generic MPC8xx Options"
100
101config 8xx_COPYBACK
102	bool "Copy-Back Data Cache (else Writethrough)"
103	help
104	  Saying Y here will cause the cache on an MPC8xx processor to be used
105	  in Copy-Back mode.  If you say N here, it is used in Writethrough
106	  mode.
107
108	  If in doubt, say Y here.
109
110config 8xx_GPIO
111	bool "GPIO API Support"
112	select ARCH_REQUIRE_GPIOLIB
113	help
114	  Saying Y here will cause the ports on an MPC8xx processor to be used
115	  with the GPIO API.  If you say N here, the kernel needs less memory.
116
117	  If in doubt, say Y here.
118
119config 8xx_CPU6
120	bool "CPU6 Silicon Errata (860 Pre Rev. C)"
121	help
122	  MPC860 CPUs, prior to Rev C have some bugs in the silicon, which
123	  require workarounds for Linux (and most other OSes to work).  If you
124	  get a BUG() very early in boot, this might fix the problem.  For
125	  more details read the document entitled "MPC860 Family Device Errata
126	  Reference" on Freescale's website.  This option also incurs a
127	  performance hit.
128
129	  If in doubt, say N here.
130
131config 8xx_CPU15
132	bool "CPU15 Silicon Errata"
133	default y
134	help
135	  This enables a workaround for erratum CPU15 on MPC8xx chips.
136	  This bug can cause incorrect code execution under certain
137	  circumstances.  This workaround adds some overhead (a TLB miss
138	  every time execution crosses a page boundary), and you may wish
139	  to disable it if you have worked around the bug in the compiler
140	  (by not placing conditional branches or branches to LR or CTR
141	  in the last word of a page, with a target of the last cache
142	  line in the next page), or if you have used some other
143	  workaround.
144
145	  If in doubt, say Y here.
146
147choice
148	prompt "Microcode patch selection"
149	default NO_UCODE_PATCH
150	help
151	  Help not implemented yet, coming soon.
152
153config NO_UCODE_PATCH
154	bool "None"
155
156config USB_SOF_UCODE_PATCH
157	bool "USB SOF patch"
158	help
159	  Help not implemented yet, coming soon.
160
161config I2C_SPI_UCODE_PATCH
162	bool "I2C/SPI relocation patch"
163	help
164	  Help not implemented yet, coming soon.
165
166config I2C_SPI_SMC1_UCODE_PATCH
167	bool "I2C/SPI/SMC1 relocation patch"
168	help
169	  Help not implemented yet, coming soon.
170
171endchoice
172
173config UCODE_PATCH
174	bool
175	default y
176	depends on !NO_UCODE_PATCH
177
178endmenu
179