xref: /linux/arch/powerpc/platforms/86xx/mpc86xx_smp.c (revision 1517d90cfafe0f95fd7863d04e1596f7beb7dfa8)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Author: Xianghua Xiao <x.xiao@freescale.com>
4  *         Zhang Wei <wei.zhang@freescale.com>
5  *
6  * Copyright 2006 Freescale Semiconductor Inc.
7  */
8 
9 #include <linux/stddef.h>
10 #include <linux/kernel.h>
11 #include <linux/init.h>
12 #include <linux/delay.h>
13 
14 #include <asm/code-patching.h>
15 #include <asm/page.h>
16 #include <asm/pgtable.h>
17 #include <asm/pci-bridge.h>
18 #include <asm/mpic.h>
19 #include <asm/cacheflush.h>
20 
21 #include <sysdev/fsl_soc.h>
22 
23 #include "mpc86xx.h"
24 
25 extern void __secondary_start_mpc86xx(void);
26 
27 #define MCM_PORT_CONFIG_OFFSET	0x10
28 
29 /* Offset from CCSRBAR */
30 #define MPC86xx_MCM_OFFSET      (0x1000)
31 #define MPC86xx_MCM_SIZE        (0x1000)
32 
33 static void __init
34 smp_86xx_release_core(int nr)
35 {
36 	__be32 __iomem *mcm_vaddr;
37 	unsigned long pcr;
38 
39 	if (nr < 0 || nr >= NR_CPUS)
40 		return;
41 
42 	/*
43 	 * Startup Core #nr.
44 	 */
45 	mcm_vaddr = ioremap(get_immrbase() + MPC86xx_MCM_OFFSET,
46 			    MPC86xx_MCM_SIZE);
47 	pcr = in_be32(mcm_vaddr + (MCM_PORT_CONFIG_OFFSET >> 2));
48 	pcr |= 1 << (nr + 24);
49 	out_be32(mcm_vaddr + (MCM_PORT_CONFIG_OFFSET >> 2), pcr);
50 
51 	iounmap(mcm_vaddr);
52 }
53 
54 
55 static int __init
56 smp_86xx_kick_cpu(int nr)
57 {
58 	unsigned int save_vector;
59 	unsigned long target, flags;
60 	int n = 0;
61 	unsigned int *vector = (unsigned int *)(KERNELBASE + 0x100);
62 
63 	if (nr < 0 || nr >= NR_CPUS)
64 		return -ENOENT;
65 
66 	pr_debug("smp_86xx_kick_cpu: kick CPU #%d\n", nr);
67 
68 	local_irq_save(flags);
69 
70 	/* Save reset vector */
71 	save_vector = *vector;
72 
73 	/* Setup fake reset vector to call __secondary_start_mpc86xx. */
74 	target = (unsigned long) __secondary_start_mpc86xx;
75 	patch_branch(vector, target, BRANCH_SET_LINK);
76 
77 	/* Kick that CPU */
78 	smp_86xx_release_core(nr);
79 
80 	/* Wait a bit for the CPU to take the exception. */
81 	while ((__secondary_hold_acknowledge != nr) && (n++, n < 1000))
82 		mdelay(1);
83 
84 	/* Restore the exception vector */
85 	patch_instruction(vector, save_vector);
86 
87 	local_irq_restore(flags);
88 
89 	pr_debug("wait CPU #%d for %d msecs.\n", nr, n);
90 
91 	return 0;
92 }
93 
94 
95 static void __init
96 smp_86xx_setup_cpu(int cpu_nr)
97 {
98 	mpic_setup_this_cpu();
99 }
100 
101 
102 struct smp_ops_t smp_86xx_ops = {
103 	.cause_nmi_ipi = NULL,
104 	.message_pass = smp_mpic_message_pass,
105 	.probe = smp_mpic_probe,
106 	.kick_cpu = smp_86xx_kick_cpu,
107 	.setup_cpu = smp_86xx_setup_cpu,
108 	.take_timebase = smp_generic_take_timebase,
109 	.give_timebase = smp_generic_give_timebase,
110 };
111 
112 
113 void __init
114 mpc86xx_smp_init(void)
115 {
116 	smp_ops = &smp_86xx_ops;
117 }
118