1 /* 2 * GE PPC9A board support 3 * 4 * Author: Martyn Welch <martyn.welch@ge.com> 5 * 6 * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc. 7 * 8 * This program is free software; you can redistribute it and/or modify it 9 * under the terms of the GNU General Public License as published by the 10 * Free Software Foundation; either version 2 of the License, or (at your 11 * option) any later version. 12 * 13 * Based on: mpc86xx_hpcn.c (MPC86xx HPCN board specific routines) 14 * Copyright 2006 Freescale Semiconductor Inc. 15 * 16 * NEC fixup adapted from arch/mips/pci/fixup-lm2e.c 17 */ 18 19 #include <linux/stddef.h> 20 #include <linux/kernel.h> 21 #include <linux/pci.h> 22 #include <linux/kdev_t.h> 23 #include <linux/delay.h> 24 #include <linux/seq_file.h> 25 #include <linux/of_platform.h> 26 27 #include <asm/time.h> 28 #include <asm/machdep.h> 29 #include <asm/pci-bridge.h> 30 #include <asm/prom.h> 31 #include <mm/mmu_decl.h> 32 #include <asm/udbg.h> 33 34 #include <asm/mpic.h> 35 #include <asm/nvram.h> 36 37 #include <sysdev/fsl_pci.h> 38 #include <sysdev/fsl_soc.h> 39 #include <sysdev/ge/ge_pic.h> 40 41 #include "mpc86xx.h" 42 43 #undef DEBUG 44 45 #ifdef DEBUG 46 #define DBG (fmt...) do { printk(KERN_ERR "PPC9A: " fmt); } while (0) 47 #else 48 #define DBG (fmt...) do { } while (0) 49 #endif 50 51 void __iomem *ppc9a_regs; 52 53 static void __init gef_ppc9a_init_irq(void) 54 { 55 struct device_node *cascade_node = NULL; 56 57 mpc86xx_init_irq(); 58 59 /* 60 * There is a simple interrupt handler in the main FPGA, this needs 61 * to be cascaded into the MPIC 62 */ 63 cascade_node = of_find_compatible_node(NULL, NULL, "gef,fpga-pic-1.00"); 64 if (!cascade_node) { 65 printk(KERN_WARNING "PPC9A: No FPGA PIC\n"); 66 return; 67 } 68 69 gef_pic_init(cascade_node); 70 of_node_put(cascade_node); 71 } 72 73 static void __init gef_ppc9a_setup_arch(void) 74 { 75 struct device_node *regs; 76 #ifdef CONFIG_PCI 77 struct device_node *np; 78 79 for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") { 80 fsl_add_bridge(np, 1); 81 } 82 #endif 83 84 printk(KERN_INFO "GE Intelligent Platforms PPC9A 6U VME SBC\n"); 85 86 #ifdef CONFIG_SMP 87 mpc86xx_smp_init(); 88 #endif 89 90 /* Remap basic board registers */ 91 regs = of_find_compatible_node(NULL, NULL, "gef,ppc9a-fpga-regs"); 92 if (regs) { 93 ppc9a_regs = of_iomap(regs, 0); 94 if (ppc9a_regs == NULL) 95 printk(KERN_WARNING "Unable to map board registers\n"); 96 of_node_put(regs); 97 } 98 99 #if defined(CONFIG_MMIO_NVRAM) 100 mmio_nvram_init(); 101 #endif 102 } 103 104 /* Return the PCB revision */ 105 static unsigned int gef_ppc9a_get_pcb_rev(void) 106 { 107 unsigned int reg; 108 109 reg = ioread32be(ppc9a_regs); 110 return (reg >> 16) & 0xff; 111 } 112 113 /* Return the board (software) revision */ 114 static unsigned int gef_ppc9a_get_board_rev(void) 115 { 116 unsigned int reg; 117 118 reg = ioread32be(ppc9a_regs); 119 return (reg >> 8) & 0xff; 120 } 121 122 /* Return the FPGA revision */ 123 static unsigned int gef_ppc9a_get_fpga_rev(void) 124 { 125 unsigned int reg; 126 127 reg = ioread32be(ppc9a_regs); 128 return reg & 0xf; 129 } 130 131 /* Return VME Geographical Address */ 132 static unsigned int gef_ppc9a_get_vme_geo_addr(void) 133 { 134 unsigned int reg; 135 136 reg = ioread32be(ppc9a_regs + 0x4); 137 return reg & 0x1f; 138 } 139 140 /* Return VME System Controller Status */ 141 static unsigned int gef_ppc9a_get_vme_is_syscon(void) 142 { 143 unsigned int reg; 144 145 reg = ioread32be(ppc9a_regs + 0x4); 146 return (reg >> 9) & 0x1; 147 } 148 149 static void gef_ppc9a_show_cpuinfo(struct seq_file *m) 150 { 151 uint svid = mfspr(SPRN_SVR); 152 153 seq_printf(m, "Vendor\t\t: GE Intelligent Platforms\n"); 154 155 seq_printf(m, "Revision\t: %u%c\n", gef_ppc9a_get_pcb_rev(), 156 ('A' + gef_ppc9a_get_board_rev())); 157 seq_printf(m, "FPGA Revision\t: %u\n", gef_ppc9a_get_fpga_rev()); 158 159 seq_printf(m, "SVR\t\t: 0x%x\n", svid); 160 161 seq_printf(m, "VME geo. addr\t: %u\n", gef_ppc9a_get_vme_geo_addr()); 162 163 seq_printf(m, "VME syscon\t: %s\n", 164 gef_ppc9a_get_vme_is_syscon() ? "yes" : "no"); 165 } 166 167 static void __devinit gef_ppc9a_nec_fixup(struct pci_dev *pdev) 168 { 169 unsigned int val; 170 171 /* Do not do the fixup on other platforms! */ 172 if (!machine_is(gef_ppc9a)) 173 return; 174 175 printk(KERN_INFO "Running NEC uPD720101 Fixup\n"); 176 177 /* Ensure ports 1, 2, 3, 4 & 5 are enabled */ 178 pci_read_config_dword(pdev, 0xe0, &val); 179 pci_write_config_dword(pdev, 0xe0, (val & ~7) | 0x5); 180 181 /* System clock is 48-MHz Oscillator and EHCI Enabled. */ 182 pci_write_config_dword(pdev, 0xe4, 1 << 5); 183 } 184 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB, 185 gef_ppc9a_nec_fixup); 186 187 /* 188 * Called very early, device-tree isn't unflattened 189 * 190 * This function is called to determine whether the BSP is compatible with the 191 * supplied device-tree, which is assumed to be the correct one for the actual 192 * board. It is expected thati, in the future, a kernel may support multiple 193 * boards. 194 */ 195 static int __init gef_ppc9a_probe(void) 196 { 197 unsigned long root = of_get_flat_dt_root(); 198 199 if (of_flat_dt_is_compatible(root, "gef,ppc9a")) 200 return 1; 201 202 return 0; 203 } 204 205 static long __init mpc86xx_time_init(void) 206 { 207 unsigned int temp; 208 209 /* Set the time base to zero */ 210 mtspr(SPRN_TBWL, 0); 211 mtspr(SPRN_TBWU, 0); 212 213 temp = mfspr(SPRN_HID0); 214 temp |= HID0_TBEN; 215 mtspr(SPRN_HID0, temp); 216 asm volatile("isync"); 217 218 return 0; 219 } 220 221 static __initdata struct of_device_id of_bus_ids[] = { 222 { .compatible = "simple-bus", }, 223 { .compatible = "gianfar", }, 224 {}, 225 }; 226 227 static int __init declare_of_platform_devices(void) 228 { 229 printk(KERN_DEBUG "Probe platform devices\n"); 230 of_platform_bus_probe(NULL, of_bus_ids, NULL); 231 232 return 0; 233 } 234 machine_device_initcall(gef_ppc9a, declare_of_platform_devices); 235 236 define_machine(gef_ppc9a) { 237 .name = "GE PPC9A", 238 .probe = gef_ppc9a_probe, 239 .setup_arch = gef_ppc9a_setup_arch, 240 .init_IRQ = gef_ppc9a_init_irq, 241 .show_cpuinfo = gef_ppc9a_show_cpuinfo, 242 .get_irq = mpic_get_irq, 243 .restart = fsl_rstcr_restart, 244 .time_init = mpc86xx_time_init, 245 .calibrate_decr = generic_calibrate_decr, 246 .progress = udbg_progress, 247 #ifdef CONFIG_PCI 248 .pcibios_fixup_bus = fsl_pcibios_fixup_bus, 249 #endif 250 }; 251