1 /* 2 * Author: Andy Fleming <afleming@freescale.com> 3 * Kumar Gala <galak@kernel.crashing.org> 4 * 5 * Copyright 2006-2008, 2011 Freescale Semiconductor Inc. 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License as published by the 9 * Free Software Foundation; either version 2 of the License, or (at your 10 * option) any later version. 11 */ 12 13 #include <linux/stddef.h> 14 #include <linux/kernel.h> 15 #include <linux/init.h> 16 #include <linux/delay.h> 17 #include <linux/of.h> 18 #include <linux/kexec.h> 19 #include <linux/highmem.h> 20 21 #include <asm/machdep.h> 22 #include <asm/pgtable.h> 23 #include <asm/page.h> 24 #include <asm/mpic.h> 25 #include <asm/cacheflush.h> 26 #include <asm/dbell.h> 27 28 #include <sysdev/fsl_soc.h> 29 #include <sysdev/mpic.h> 30 31 extern void __early_start(void); 32 33 #define BOOT_ENTRY_ADDR_UPPER 0 34 #define BOOT_ENTRY_ADDR_LOWER 1 35 #define BOOT_ENTRY_R3_UPPER 2 36 #define BOOT_ENTRY_R3_LOWER 3 37 #define BOOT_ENTRY_RESV 4 38 #define BOOT_ENTRY_PIR 5 39 #define BOOT_ENTRY_R6_UPPER 6 40 #define BOOT_ENTRY_R6_LOWER 7 41 #define NUM_BOOT_ENTRY 8 42 #define SIZE_BOOT_ENTRY (NUM_BOOT_ENTRY * sizeof(u32)) 43 44 static int __init 45 smp_85xx_kick_cpu(int nr) 46 { 47 unsigned long flags; 48 const u64 *cpu_rel_addr; 49 __iomem u32 *bptr_vaddr; 50 struct device_node *np; 51 int n = 0, hw_cpu = get_hard_smp_processor_id(nr); 52 int ioremappable; 53 54 WARN_ON(nr < 0 || nr >= NR_CPUS); 55 WARN_ON(hw_cpu < 0 || hw_cpu >= NR_CPUS); 56 57 pr_debug("smp_85xx_kick_cpu: kick CPU #%d\n", nr); 58 59 np = of_get_cpu_node(nr, NULL); 60 cpu_rel_addr = of_get_property(np, "cpu-release-addr", NULL); 61 62 if (cpu_rel_addr == NULL) { 63 printk(KERN_ERR "No cpu-release-addr for cpu %d\n", nr); 64 return -ENOENT; 65 } 66 67 /* 68 * A secondary core could be in a spinloop in the bootpage 69 * (0xfffff000), somewhere in highmem, or somewhere in lowmem. 70 * The bootpage and highmem can be accessed via ioremap(), but 71 * we need to directly access the spinloop if its in lowmem. 72 */ 73 ioremappable = *cpu_rel_addr > virt_to_phys(high_memory); 74 75 /* Map the spin table */ 76 if (ioremappable) 77 bptr_vaddr = ioremap(*cpu_rel_addr, SIZE_BOOT_ENTRY); 78 else 79 bptr_vaddr = phys_to_virt(*cpu_rel_addr); 80 81 local_irq_save(flags); 82 83 out_be32(bptr_vaddr + BOOT_ENTRY_PIR, hw_cpu); 84 #ifdef CONFIG_PPC32 85 out_be32(bptr_vaddr + BOOT_ENTRY_ADDR_LOWER, __pa(__early_start)); 86 87 if (!ioremappable) 88 flush_dcache_range((ulong)bptr_vaddr, 89 (ulong)(bptr_vaddr + SIZE_BOOT_ENTRY)); 90 91 /* Wait a bit for the CPU to ack. */ 92 while ((__secondary_hold_acknowledge != hw_cpu) && (++n < 1000)) 93 mdelay(1); 94 #else 95 smp_generic_kick_cpu(nr); 96 97 out_be64((u64 *)(bptr_vaddr + BOOT_ENTRY_ADDR_UPPER), 98 __pa((u64)*((unsigned long long *) generic_secondary_smp_init))); 99 100 if (!ioremappable) 101 flush_dcache_range((ulong)bptr_vaddr, 102 (ulong)(bptr_vaddr + SIZE_BOOT_ENTRY)); 103 #endif 104 105 local_irq_restore(flags); 106 107 if (ioremappable) 108 iounmap(bptr_vaddr); 109 110 pr_debug("waited %d msecs for CPU #%d.\n", n, nr); 111 112 return 0; 113 } 114 115 struct smp_ops_t smp_85xx_ops = { 116 .kick_cpu = smp_85xx_kick_cpu, 117 #ifdef CONFIG_KEXEC 118 .give_timebase = smp_generic_give_timebase, 119 .take_timebase = smp_generic_take_timebase, 120 #endif 121 }; 122 123 #ifdef CONFIG_KEXEC 124 atomic_t kexec_down_cpus = ATOMIC_INIT(0); 125 126 void mpc85xx_smp_kexec_cpu_down(int crash_shutdown, int secondary) 127 { 128 local_irq_disable(); 129 130 if (secondary) { 131 atomic_inc(&kexec_down_cpus); 132 /* loop forever */ 133 while (1); 134 } 135 } 136 137 static void mpc85xx_smp_kexec_down(void *arg) 138 { 139 if (ppc_md.kexec_cpu_down) 140 ppc_md.kexec_cpu_down(0,1); 141 } 142 143 static void map_and_flush(unsigned long paddr) 144 { 145 struct page *page = pfn_to_page(paddr >> PAGE_SHIFT); 146 unsigned long kaddr = (unsigned long)kmap(page); 147 148 flush_dcache_range(kaddr, kaddr + PAGE_SIZE); 149 kunmap(page); 150 } 151 152 /** 153 * Before we reset the other cores, we need to flush relevant cache 154 * out to memory so we don't get anything corrupted, some of these flushes 155 * are performed out of an overabundance of caution as interrupts are not 156 * disabled yet and we can switch cores 157 */ 158 static void mpc85xx_smp_flush_dcache_kexec(struct kimage *image) 159 { 160 kimage_entry_t *ptr, entry; 161 unsigned long paddr; 162 int i; 163 164 if (image->type == KEXEC_TYPE_DEFAULT) { 165 /* normal kexec images are stored in temporary pages */ 166 for (ptr = &image->head; (entry = *ptr) && !(entry & IND_DONE); 167 ptr = (entry & IND_INDIRECTION) ? 168 phys_to_virt(entry & PAGE_MASK) : ptr + 1) { 169 if (!(entry & IND_DESTINATION)) { 170 map_and_flush(entry); 171 } 172 } 173 /* flush out last IND_DONE page */ 174 map_and_flush(entry); 175 } else { 176 /* crash type kexec images are copied to the crash region */ 177 for (i = 0; i < image->nr_segments; i++) { 178 struct kexec_segment *seg = &image->segment[i]; 179 for (paddr = seg->mem; paddr < seg->mem + seg->memsz; 180 paddr += PAGE_SIZE) { 181 map_and_flush(paddr); 182 } 183 } 184 } 185 186 /* also flush the kimage struct to be passed in as well */ 187 flush_dcache_range((unsigned long)image, 188 (unsigned long)image + sizeof(*image)); 189 } 190 191 static void mpc85xx_smp_machine_kexec(struct kimage *image) 192 { 193 int timeout = INT_MAX; 194 int i, num_cpus = num_present_cpus(); 195 196 mpc85xx_smp_flush_dcache_kexec(image); 197 198 if (image->type == KEXEC_TYPE_DEFAULT) 199 smp_call_function(mpc85xx_smp_kexec_down, NULL, 0); 200 201 while ( (atomic_read(&kexec_down_cpus) != (num_cpus - 1)) && 202 ( timeout > 0 ) ) 203 { 204 timeout--; 205 } 206 207 if ( !timeout ) 208 printk(KERN_ERR "Unable to bring down secondary cpu(s)"); 209 210 for_each_online_cpu(i) 211 { 212 if ( i == smp_processor_id() ) continue; 213 mpic_reset_core(i); 214 } 215 216 default_machine_kexec(image); 217 } 218 #endif /* CONFIG_KEXEC */ 219 220 static void __init 221 smp_85xx_setup_cpu(int cpu_nr) 222 { 223 if (smp_85xx_ops.probe == smp_mpic_probe) 224 mpic_setup_this_cpu(); 225 226 if (cpu_has_feature(CPU_FTR_DBELL)) 227 doorbell_setup_this_cpu(); 228 } 229 230 void __init mpc85xx_smp_init(void) 231 { 232 struct device_node *np; 233 234 smp_85xx_ops.setup_cpu = smp_85xx_setup_cpu; 235 236 np = of_find_node_by_type(NULL, "open-pic"); 237 if (np) { 238 smp_85xx_ops.probe = smp_mpic_probe; 239 smp_85xx_ops.message_pass = smp_mpic_message_pass; 240 } 241 242 if (cpu_has_feature(CPU_FTR_DBELL)) { 243 /* 244 * If left NULL, .message_pass defaults to 245 * smp_muxed_ipi_message_pass 246 */ 247 smp_85xx_ops.message_pass = NULL; 248 smp_85xx_ops.cause_ipi = doorbell_cause_ipi; 249 } 250 251 smp_ops = &smp_85xx_ops; 252 253 #ifdef CONFIG_KEXEC 254 ppc_md.kexec_cpu_down = mpc85xx_smp_kexec_cpu_down; 255 ppc_md.machine_kexec = mpc85xx_smp_machine_kexec; 256 #endif 257 } 258