1 /* 2 * Paravirt target for a generic QEMU e500 machine 3 * 4 * This is intended to be a flexible device-tree-driven platform, not fixed 5 * to a particular piece of hardware or a particular spec of virtual hardware, 6 * beyond the assumption of an e500-family CPU. Some things are still hardcoded 7 * here, such as MPIC, but this is a limitation of the current code rather than 8 * an interface contract with QEMU. 9 * 10 * Copyright 2012 Freescale Semiconductor Inc. 11 * 12 * This program is free software; you can redistribute it and/or modify it 13 * under the terms of the GNU General Public License as published by the 14 * Free Software Foundation; either version 2 of the License, or (at your 15 * option) any later version. 16 */ 17 18 #include <linux/kernel.h> 19 #include <linux/of_fdt.h> 20 #include <asm/machdep.h> 21 #include <asm/pgtable.h> 22 #include <asm/time.h> 23 #include <asm/udbg.h> 24 #include <asm/mpic.h> 25 #include <sysdev/fsl_soc.h> 26 #include <sysdev/fsl_pci.h> 27 #include "smp.h" 28 #include "mpc85xx.h" 29 30 void __init qemu_e500_pic_init(void) 31 { 32 struct mpic *mpic; 33 unsigned int flags = MPIC_BIG_ENDIAN | MPIC_SINGLE_DEST_CPU | 34 MPIC_ENABLE_COREINT; 35 36 mpic = mpic_alloc(NULL, 0, flags, 0, 256, " OpenPIC "); 37 38 BUG_ON(mpic == NULL); 39 mpic_init(mpic); 40 } 41 42 static void __init qemu_e500_setup_arch(void) 43 { 44 ppc_md.progress("qemu_e500_setup_arch()", 0); 45 46 fsl_pci_assign_primary(); 47 swiotlb_detect_4g(); 48 #if defined(CONFIG_FSL_PCI) && defined(CONFIG_ZONE_DMA32) 49 /* 50 * Inbound windows don't cover the full lower 4 GiB 51 * due to conflicts with PCICSRBAR and outbound windows, 52 * so limit the DMA32 zone to 2 GiB, to allow consistent 53 * allocations to succeed. 54 */ 55 limit_zone_pfn(ZONE_DMA32, 1UL << (31 - PAGE_SHIFT)); 56 #endif 57 mpc85xx_smp_init(); 58 } 59 60 /* 61 * Called very early, device-tree isn't unflattened 62 */ 63 static int __init qemu_e500_probe(void) 64 { 65 unsigned long root = of_get_flat_dt_root(); 66 67 return !!of_flat_dt_is_compatible(root, "fsl,qemu-e500"); 68 } 69 70 machine_arch_initcall(qemu_e500, mpc85xx_common_publish_devices); 71 72 define_machine(qemu_e500) { 73 .name = "QEMU e500", 74 .probe = qemu_e500_probe, 75 .setup_arch = qemu_e500_setup_arch, 76 .init_IRQ = qemu_e500_pic_init, 77 #ifdef CONFIG_PCI 78 .pcibios_fixup_bus = fsl_pcibios_fixup_bus, 79 .pcibios_fixup_phb = fsl_pcibios_fixup_phb, 80 #endif 81 .get_irq = mpic_get_coreint_irq, 82 .restart = fsl_rstcr_restart, 83 .calibrate_decr = generic_calibrate_decr, 84 .progress = udbg_progress, 85 }; 86