12874c5fdSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later 2fd7e5b7aSLijun Pan /* 3fd7e5b7aSLijun Pan * Copyright 2010-2011, 2013 Freescale Semiconductor, Inc. 4fd7e5b7aSLijun Pan * 5fd7e5b7aSLijun Pan * Author: Roy Zang <tie-fei.zang@freescale.com> 6fd7e5b7aSLijun Pan * 7fd7e5b7aSLijun Pan * Description: 8fd7e5b7aSLijun Pan * P1023 RDB Board Setup 9fd7e5b7aSLijun Pan */ 10fd7e5b7aSLijun Pan 11fd7e5b7aSLijun Pan #include <linux/kernel.h> 12fd7e5b7aSLijun Pan #include <linux/init.h> 13fd7e5b7aSLijun Pan #include <linux/errno.h> 14fd7e5b7aSLijun Pan #include <linux/pci.h> 15fd7e5b7aSLijun Pan #include <linux/delay.h> 16fd7e5b7aSLijun Pan #include <linux/module.h> 17fd7e5b7aSLijun Pan #include <linux/fsl_devices.h> 18*81d7cac4SRob Herring #include <linux/of.h> 19e6f6390aSChristophe Leroy #include <linux/of_address.h> 20fd7e5b7aSLijun Pan 21fd7e5b7aSLijun Pan #include <asm/time.h> 22fd7e5b7aSLijun Pan #include <asm/machdep.h> 23fd7e5b7aSLijun Pan #include <asm/pci-bridge.h> 24fd7e5b7aSLijun Pan #include <mm/mmu_decl.h> 25fd7e5b7aSLijun Pan #include <asm/udbg.h> 26fd7e5b7aSLijun Pan #include <asm/mpic.h> 27fd7e5b7aSLijun Pan #include "smp.h" 28fd7e5b7aSLijun Pan 29fd7e5b7aSLijun Pan #include <sysdev/fsl_soc.h> 30fd7e5b7aSLijun Pan #include <sysdev/fsl_pci.h> 31fd7e5b7aSLijun Pan 32fd7e5b7aSLijun Pan #include "mpc85xx.h" 33fd7e5b7aSLijun Pan 34fd7e5b7aSLijun Pan /* ************************************************************************ 35fd7e5b7aSLijun Pan * 36fd7e5b7aSLijun Pan * Setup the architecture 37fd7e5b7aSLijun Pan * 38fd7e5b7aSLijun Pan */ 395a81c02dSChristophe Leroy static void __init p1023_rdb_setup_arch(void) 40fd7e5b7aSLijun Pan { 41fd7e5b7aSLijun Pan struct device_node *np; 42fd7e5b7aSLijun Pan 43fd7e5b7aSLijun Pan if (ppc_md.progress) 44fd7e5b7aSLijun Pan ppc_md.progress("p1023_rdb_setup_arch()", 0); 45fd7e5b7aSLijun Pan 46fd7e5b7aSLijun Pan /* Map BCSR area */ 47fd7e5b7aSLijun Pan np = of_find_node_by_name(NULL, "bcsr"); 48fd7e5b7aSLijun Pan if (np != NULL) { 49fd7e5b7aSLijun Pan static u8 __iomem *bcsr_regs; 50fd7e5b7aSLijun Pan 51fd7e5b7aSLijun Pan bcsr_regs = of_iomap(np, 0); 52fd7e5b7aSLijun Pan of_node_put(np); 53fd7e5b7aSLijun Pan 54fd7e5b7aSLijun Pan if (!bcsr_regs) { 55fd7e5b7aSLijun Pan printk(KERN_ERR 56fd7e5b7aSLijun Pan "BCSR: Failed to map bcsr register space\n"); 57fd7e5b7aSLijun Pan return; 58fd7e5b7aSLijun Pan } else { 59fd7e5b7aSLijun Pan #define BCSR15_I2C_BUS0_SEG_CLR 0x07 60fd7e5b7aSLijun Pan #define BCSR15_I2C_BUS0_SEG2 0x02 61fd7e5b7aSLijun Pan /* 62fd7e5b7aSLijun Pan * Note: Accessing exclusively i2c devices. 63fd7e5b7aSLijun Pan * 64fd7e5b7aSLijun Pan * The i2c controller selects initially ID EEPROM in the u-boot; 65fd7e5b7aSLijun Pan * but if menu configuration selects RTC support in the kernel, 66fd7e5b7aSLijun Pan * the i2c controller switches to select RTC chip in the kernel. 67fd7e5b7aSLijun Pan */ 68fd7e5b7aSLijun Pan #ifdef CONFIG_RTC_CLASS 69fd7e5b7aSLijun Pan /* Enable RTC chip on the segment #2 of i2c */ 70fd7e5b7aSLijun Pan clrbits8(&bcsr_regs[15], BCSR15_I2C_BUS0_SEG_CLR); 71fd7e5b7aSLijun Pan setbits8(&bcsr_regs[15], BCSR15_I2C_BUS0_SEG2); 72fd7e5b7aSLijun Pan #endif 73fd7e5b7aSLijun Pan 74fd7e5b7aSLijun Pan iounmap(bcsr_regs); 75fd7e5b7aSLijun Pan } 76fd7e5b7aSLijun Pan } 77fd7e5b7aSLijun Pan 78fd7e5b7aSLijun Pan mpc85xx_smp_init(); 79fd7e5b7aSLijun Pan 80fd7e5b7aSLijun Pan fsl_pci_assign_primary(); 81fd7e5b7aSLijun Pan } 82fd7e5b7aSLijun Pan 83fd7e5b7aSLijun Pan machine_arch_initcall(p1023_rdb, mpc85xx_common_publish_devices); 84fd7e5b7aSLijun Pan 855a81c02dSChristophe Leroy static void __init p1023_rdb_pic_init(void) 86fd7e5b7aSLijun Pan { 87fd7e5b7aSLijun Pan struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN | 88fd7e5b7aSLijun Pan MPIC_SINGLE_DEST_CPU, 89fd7e5b7aSLijun Pan 0, 256, " OpenPIC "); 90fd7e5b7aSLijun Pan 91fd7e5b7aSLijun Pan BUG_ON(mpic == NULL); 92fd7e5b7aSLijun Pan 93fd7e5b7aSLijun Pan mpic_init(mpic); 94fd7e5b7aSLijun Pan } 95fd7e5b7aSLijun Pan 96fd7e5b7aSLijun Pan define_machine(p1023_rdb) { 97fd7e5b7aSLijun Pan .name = "P1023 RDB", 981c96fcdeSChristophe Leroy .compatible = "fsl,P1023RDB", 995a81c02dSChristophe Leroy .setup_arch = p1023_rdb_setup_arch, 1005a81c02dSChristophe Leroy .init_IRQ = p1023_rdb_pic_init, 101fd7e5b7aSLijun Pan .get_irq = mpic_get_irq, 102fd7e5b7aSLijun Pan .progress = udbg_progress, 103fd7e5b7aSLijun Pan #ifdef CONFIG_PCI 104fd7e5b7aSLijun Pan .pcibios_fixup_bus = fsl_pcibios_fixup_bus, 105fd7e5b7aSLijun Pan .pcibios_fixup_phb = fsl_pcibios_fixup_phb, 106fd7e5b7aSLijun Pan #endif 107fd7e5b7aSLijun Pan }; 108