1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved. 4 * 5 * Author: John Rigby, <jrigby@freescale.com> 6 * 7 * Description: 8 * MPC5121ADS CPLD irq handling 9 */ 10 11 #undef DEBUG 12 13 #include <linux/kernel.h> 14 #include <linux/interrupt.h> 15 #include <linux/irq.h> 16 #include <linux/io.h> 17 #include <asm/prom.h> 18 19 static struct device_node *cpld_pic_node; 20 static struct irq_domain *cpld_pic_host; 21 22 /* 23 * Bits to ignore in the misc_status register 24 * 0x10 touch screen pendown is hard routed to irq1 25 * 0x02 pci status is read from pci status register 26 */ 27 #define MISC_IGNORE 0x12 28 29 /* 30 * Nothing to ignore in pci status register 31 */ 32 #define PCI_IGNORE 0x00 33 34 struct cpld_pic { 35 u8 pci_mask; 36 u8 pci_status; 37 u8 route; 38 u8 misc_mask; 39 u8 misc_status; 40 u8 misc_control; 41 }; 42 43 static struct cpld_pic __iomem *cpld_regs; 44 45 static void __iomem * 46 irq_to_pic_mask(unsigned int irq) 47 { 48 return irq <= 7 ? &cpld_regs->pci_mask : &cpld_regs->misc_mask; 49 } 50 51 static unsigned int 52 irq_to_pic_bit(unsigned int irq) 53 { 54 return 1 << (irq & 0x7); 55 } 56 57 static void 58 cpld_mask_irq(struct irq_data *d) 59 { 60 unsigned int cpld_irq = (unsigned int)irqd_to_hwirq(d); 61 void __iomem *pic_mask = irq_to_pic_mask(cpld_irq); 62 63 out_8(pic_mask, 64 in_8(pic_mask) | irq_to_pic_bit(cpld_irq)); 65 } 66 67 static void 68 cpld_unmask_irq(struct irq_data *d) 69 { 70 unsigned int cpld_irq = (unsigned int)irqd_to_hwirq(d); 71 void __iomem *pic_mask = irq_to_pic_mask(cpld_irq); 72 73 out_8(pic_mask, 74 in_8(pic_mask) & ~irq_to_pic_bit(cpld_irq)); 75 } 76 77 static struct irq_chip cpld_pic = { 78 .name = "CPLD PIC", 79 .irq_mask = cpld_mask_irq, 80 .irq_ack = cpld_mask_irq, 81 .irq_unmask = cpld_unmask_irq, 82 }; 83 84 static int 85 cpld_pic_get_irq(int offset, u8 ignore, u8 __iomem *statusp, 86 u8 __iomem *maskp) 87 { 88 int cpld_irq; 89 u8 status = in_8(statusp); 90 u8 mask = in_8(maskp); 91 92 /* ignore don't cares and masked irqs */ 93 status |= (ignore | mask); 94 95 if (status == 0xff) 96 return 0; 97 98 cpld_irq = ffz(status) + offset; 99 100 return irq_linear_revmap(cpld_pic_host, cpld_irq); 101 } 102 103 static void cpld_pic_cascade(struct irq_desc *desc) 104 { 105 unsigned int irq; 106 107 irq = cpld_pic_get_irq(0, PCI_IGNORE, &cpld_regs->pci_status, 108 &cpld_regs->pci_mask); 109 if (irq) { 110 generic_handle_irq(irq); 111 return; 112 } 113 114 irq = cpld_pic_get_irq(8, MISC_IGNORE, &cpld_regs->misc_status, 115 &cpld_regs->misc_mask); 116 if (irq) { 117 generic_handle_irq(irq); 118 return; 119 } 120 } 121 122 static int 123 cpld_pic_host_match(struct irq_domain *h, struct device_node *node, 124 enum irq_domain_bus_token bus_token) 125 { 126 return cpld_pic_node == node; 127 } 128 129 static int 130 cpld_pic_host_map(struct irq_domain *h, unsigned int virq, 131 irq_hw_number_t hw) 132 { 133 irq_set_status_flags(virq, IRQ_LEVEL); 134 irq_set_chip_and_handler(virq, &cpld_pic, handle_level_irq); 135 return 0; 136 } 137 138 static const struct irq_domain_ops cpld_pic_host_ops = { 139 .match = cpld_pic_host_match, 140 .map = cpld_pic_host_map, 141 }; 142 143 void __init 144 mpc5121_ads_cpld_map(void) 145 { 146 struct device_node *np = NULL; 147 148 np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121ads-cpld-pic"); 149 if (!np) { 150 printk(KERN_ERR "CPLD PIC init: can not find cpld-pic node\n"); 151 return; 152 } 153 154 cpld_regs = of_iomap(np, 0); 155 of_node_put(np); 156 } 157 158 void __init 159 mpc5121_ads_cpld_pic_init(void) 160 { 161 unsigned int cascade_irq; 162 struct device_node *np = NULL; 163 164 pr_debug("cpld_ic_init\n"); 165 166 np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121ads-cpld-pic"); 167 if (!np) { 168 printk(KERN_ERR "CPLD PIC init: can not find cpld-pic node\n"); 169 return; 170 } 171 172 if (!cpld_regs) 173 goto end; 174 175 cascade_irq = irq_of_parse_and_map(np, 0); 176 if (!cascade_irq) 177 goto end; 178 179 /* 180 * statically route touch screen pendown through 1 181 * and ignore it here 182 * route all others through our cascade irq 183 */ 184 out_8(&cpld_regs->route, 0xfd); 185 out_8(&cpld_regs->pci_mask, 0xff); 186 /* unmask pci ints in misc mask */ 187 out_8(&cpld_regs->misc_mask, ~(MISC_IGNORE)); 188 189 cpld_pic_node = of_node_get(np); 190 191 cpld_pic_host = irq_domain_add_linear(np, 16, &cpld_pic_host_ops, NULL); 192 if (!cpld_pic_host) { 193 printk(KERN_ERR "CPLD PIC: failed to allocate irq host!\n"); 194 goto end; 195 } 196 197 irq_set_chained_handler(cascade_irq, cpld_pic_cascade); 198 end: 199 of_node_put(np); 200 } 201