1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 */ 4 5 #include <linux/kernel.h> 6 #include <linux/printk.h> 7 #include <linux/ptrace.h> 8 9 #include <asm/reg.h> 10 #include <asm/cacheflush.h> 11 12 int machine_check_4xx(struct pt_regs *regs) 13 { 14 unsigned long reason = regs->esr; 15 16 if (reason & ESR_IMCP) { 17 printk("Instruction"); 18 mtspr(SPRN_ESR, reason & ~ESR_IMCP); 19 } else 20 printk("Data"); 21 22 printk(" machine check in kernel mode.\n"); 23 24 return 0; 25 } 26 27 int machine_check_440A(struct pt_regs *regs) 28 { 29 unsigned long reason = regs->esr; 30 31 printk("Machine check in kernel mode.\n"); 32 if (reason & ESR_IMCP){ 33 printk("Instruction Synchronous Machine Check exception\n"); 34 mtspr(SPRN_ESR, reason & ~ESR_IMCP); 35 } 36 else { 37 u32 mcsr = mfspr(SPRN_MCSR); 38 if (mcsr & MCSR_IB) 39 printk("Instruction Read PLB Error\n"); 40 if (mcsr & MCSR_DRB) 41 printk("Data Read PLB Error\n"); 42 if (mcsr & MCSR_DWB) 43 printk("Data Write PLB Error\n"); 44 if (mcsr & MCSR_TLBP) 45 printk("TLB Parity Error\n"); 46 if (mcsr & MCSR_ICP){ 47 flush_instruction_cache(); 48 printk("I-Cache Parity Error\n"); 49 } 50 if (mcsr & MCSR_DCSP) 51 printk("D-Cache Search Parity Error\n"); 52 if (mcsr & MCSR_DCFP) 53 printk("D-Cache Flush Parity Error\n"); 54 if (mcsr & MCSR_IMPE) 55 printk("Machine Check exception is imprecise\n"); 56 57 /* Clear MCSR */ 58 mtspr(SPRN_MCSR, mcsr); 59 } 60 return 0; 61 } 62 63 #ifdef CONFIG_PPC_47x 64 int machine_check_47x(struct pt_regs *regs) 65 { 66 unsigned long reason = regs->esr; 67 u32 mcsr; 68 69 printk(KERN_ERR "Machine check in kernel mode.\n"); 70 if (reason & ESR_IMCP) { 71 printk(KERN_ERR "Instruction Synchronous Machine Check exception\n"); 72 mtspr(SPRN_ESR, reason & ~ESR_IMCP); 73 return 0; 74 } 75 mcsr = mfspr(SPRN_MCSR); 76 if (mcsr & MCSR_IB) 77 printk(KERN_ERR "Instruction Read PLB Error\n"); 78 if (mcsr & MCSR_DRB) 79 printk(KERN_ERR "Data Read PLB Error\n"); 80 if (mcsr & MCSR_DWB) 81 printk(KERN_ERR "Data Write PLB Error\n"); 82 if (mcsr & MCSR_TLBP) 83 printk(KERN_ERR "TLB Parity Error\n"); 84 if (mcsr & MCSR_ICP) { 85 flush_instruction_cache(); 86 printk(KERN_ERR "I-Cache Parity Error\n"); 87 } 88 if (mcsr & MCSR_DCSP) 89 printk(KERN_ERR "D-Cache Search Parity Error\n"); 90 if (mcsr & PPC47x_MCSR_GPR) 91 printk(KERN_ERR "GPR Parity Error\n"); 92 if (mcsr & PPC47x_MCSR_FPR) 93 printk(KERN_ERR "FPR Parity Error\n"); 94 if (mcsr & PPC47x_MCSR_IPR) 95 printk(KERN_ERR "Machine Check exception is imprecise\n"); 96 97 /* Clear MCSR */ 98 mtspr(SPRN_MCSR, mcsr); 99 100 return 0; 101 } 102 #endif /* CONFIG_PPC_47x */ 103