1 /* 2 * bpf_jit_comp64.c: eBPF JIT compiler 3 * 4 * Copyright 2016 Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> 5 * IBM Corporation 6 * 7 * Based on the powerpc classic BPF JIT compiler by Matt Evans 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License 11 * as published by the Free Software Foundation; version 2 12 * of the License. 13 */ 14 #include <linux/moduleloader.h> 15 #include <asm/cacheflush.h> 16 #include <asm/asm-compat.h> 17 #include <linux/netdevice.h> 18 #include <linux/filter.h> 19 #include <linux/if_vlan.h> 20 #include <asm/kprobes.h> 21 #include <linux/bpf.h> 22 23 #include "bpf_jit64.h" 24 25 static void bpf_jit_fill_ill_insns(void *area, unsigned int size) 26 { 27 memset32(area, BREAKPOINT_INSTRUCTION, size/4); 28 } 29 30 static inline void bpf_flush_icache(void *start, void *end) 31 { 32 smp_wmb(); 33 flush_icache_range((unsigned long)start, (unsigned long)end); 34 } 35 36 static inline bool bpf_is_seen_register(struct codegen_context *ctx, int i) 37 { 38 return (ctx->seen & (1 << (31 - b2p[i]))); 39 } 40 41 static inline void bpf_set_seen_register(struct codegen_context *ctx, int i) 42 { 43 ctx->seen |= (1 << (31 - b2p[i])); 44 } 45 46 static inline bool bpf_has_stack_frame(struct codegen_context *ctx) 47 { 48 /* 49 * We only need a stack frame if: 50 * - we call other functions (kernel helpers), or 51 * - the bpf program uses its stack area 52 * The latter condition is deduced from the usage of BPF_REG_FP 53 */ 54 return ctx->seen & SEEN_FUNC || bpf_is_seen_register(ctx, BPF_REG_FP); 55 } 56 57 /* 58 * When not setting up our own stackframe, the redzone usage is: 59 * 60 * [ prev sp ] <------------- 61 * [ ... ] | 62 * sp (r1) ---> [ stack pointer ] -------------- 63 * [ nv gpr save area ] 6*8 64 * [ tail_call_cnt ] 8 65 * [ local_tmp_var ] 8 66 * [ unused red zone ] 208 bytes protected 67 */ 68 static int bpf_jit_stack_local(struct codegen_context *ctx) 69 { 70 if (bpf_has_stack_frame(ctx)) 71 return STACK_FRAME_MIN_SIZE + ctx->stack_size; 72 else 73 return -(BPF_PPC_STACK_SAVE + 16); 74 } 75 76 static int bpf_jit_stack_tailcallcnt(struct codegen_context *ctx) 77 { 78 return bpf_jit_stack_local(ctx) + 8; 79 } 80 81 static int bpf_jit_stack_offsetof(struct codegen_context *ctx, int reg) 82 { 83 if (reg >= BPF_PPC_NVR_MIN && reg < 32) 84 return (bpf_has_stack_frame(ctx) ? 85 (BPF_PPC_STACKFRAME + ctx->stack_size) : 0) 86 - (8 * (32 - reg)); 87 88 pr_err("BPF JIT is asking about unknown registers"); 89 BUG(); 90 } 91 92 static void bpf_jit_build_prologue(u32 *image, struct codegen_context *ctx) 93 { 94 int i; 95 96 /* 97 * Initialize tail_call_cnt if we do tail calls. 98 * Otherwise, put in NOPs so that it can be skipped when we are 99 * invoked through a tail call. 100 */ 101 if (ctx->seen & SEEN_TAILCALL) { 102 PPC_LI(b2p[TMP_REG_1], 0); 103 /* this goes in the redzone */ 104 PPC_BPF_STL(b2p[TMP_REG_1], 1, -(BPF_PPC_STACK_SAVE + 8)); 105 } else { 106 PPC_NOP(); 107 PPC_NOP(); 108 } 109 110 #define BPF_TAILCALL_PROLOGUE_SIZE 8 111 112 if (bpf_has_stack_frame(ctx)) { 113 /* 114 * We need a stack frame, but we don't necessarily need to 115 * save/restore LR unless we call other functions 116 */ 117 if (ctx->seen & SEEN_FUNC) { 118 EMIT(PPC_INST_MFLR | __PPC_RT(R0)); 119 PPC_BPF_STL(0, 1, PPC_LR_STKOFF); 120 } 121 122 PPC_BPF_STLU(1, 1, -(BPF_PPC_STACKFRAME + ctx->stack_size)); 123 } 124 125 /* 126 * Back up non-volatile regs -- BPF registers 6-10 127 * If we haven't created our own stack frame, we save these 128 * in the protected zone below the previous stack frame 129 */ 130 for (i = BPF_REG_6; i <= BPF_REG_10; i++) 131 if (bpf_is_seen_register(ctx, i)) 132 PPC_BPF_STL(b2p[i], 1, bpf_jit_stack_offsetof(ctx, b2p[i])); 133 134 /* Setup frame pointer to point to the bpf stack area */ 135 if (bpf_is_seen_register(ctx, BPF_REG_FP)) 136 PPC_ADDI(b2p[BPF_REG_FP], 1, 137 STACK_FRAME_MIN_SIZE + ctx->stack_size); 138 } 139 140 static void bpf_jit_emit_common_epilogue(u32 *image, struct codegen_context *ctx) 141 { 142 int i; 143 144 /* Restore NVRs */ 145 for (i = BPF_REG_6; i <= BPF_REG_10; i++) 146 if (bpf_is_seen_register(ctx, i)) 147 PPC_BPF_LL(b2p[i], 1, bpf_jit_stack_offsetof(ctx, b2p[i])); 148 149 /* Tear down our stack frame */ 150 if (bpf_has_stack_frame(ctx)) { 151 PPC_ADDI(1, 1, BPF_PPC_STACKFRAME + ctx->stack_size); 152 if (ctx->seen & SEEN_FUNC) { 153 PPC_BPF_LL(0, 1, PPC_LR_STKOFF); 154 PPC_MTLR(0); 155 } 156 } 157 } 158 159 static void bpf_jit_build_epilogue(u32 *image, struct codegen_context *ctx) 160 { 161 bpf_jit_emit_common_epilogue(image, ctx); 162 163 /* Move result to r3 */ 164 PPC_MR(3, b2p[BPF_REG_0]); 165 166 PPC_BLR(); 167 } 168 169 static void bpf_jit_emit_func_call(u32 *image, struct codegen_context *ctx, u64 func) 170 { 171 unsigned int i, ctx_idx = ctx->idx; 172 173 /* Load function address into r12 */ 174 PPC_LI64(12, func); 175 176 /* For bpf-to-bpf function calls, the callee's address is unknown 177 * until the last extra pass. As seen above, we use PPC_LI64() to 178 * load the callee's address, but this may optimize the number of 179 * instructions required based on the nature of the address. 180 * 181 * Since we don't want the number of instructions emitted to change, 182 * we pad the optimized PPC_LI64() call with NOPs to guarantee that 183 * we always have a five-instruction sequence, which is the maximum 184 * that PPC_LI64() can emit. 185 */ 186 for (i = ctx->idx - ctx_idx; i < 5; i++) 187 PPC_NOP(); 188 189 #ifdef PPC64_ELF_ABI_v1 190 /* 191 * Load TOC from function descriptor at offset 8. 192 * We can clobber r2 since we get called through a 193 * function pointer (so caller will save/restore r2) 194 * and since we don't use a TOC ourself. 195 */ 196 PPC_BPF_LL(2, 12, 8); 197 /* Load actual entry point from function descriptor */ 198 PPC_BPF_LL(12, 12, 0); 199 #endif 200 201 PPC_MTLR(12); 202 PPC_BLRL(); 203 } 204 205 static void bpf_jit_emit_tail_call(u32 *image, struct codegen_context *ctx, u32 out) 206 { 207 /* 208 * By now, the eBPF program has already setup parameters in r3, r4 and r5 209 * r3/BPF_REG_1 - pointer to ctx -- passed as is to the next bpf program 210 * r4/BPF_REG_2 - pointer to bpf_array 211 * r5/BPF_REG_3 - index in bpf_array 212 */ 213 int b2p_bpf_array = b2p[BPF_REG_2]; 214 int b2p_index = b2p[BPF_REG_3]; 215 216 /* 217 * if (index >= array->map.max_entries) 218 * goto out; 219 */ 220 PPC_LWZ(b2p[TMP_REG_1], b2p_bpf_array, offsetof(struct bpf_array, map.max_entries)); 221 PPC_RLWINM(b2p_index, b2p_index, 0, 0, 31); 222 PPC_CMPLW(b2p_index, b2p[TMP_REG_1]); 223 PPC_BCC(COND_GE, out); 224 225 /* 226 * if (tail_call_cnt > MAX_TAIL_CALL_CNT) 227 * goto out; 228 */ 229 PPC_LD(b2p[TMP_REG_1], 1, bpf_jit_stack_tailcallcnt(ctx)); 230 PPC_CMPLWI(b2p[TMP_REG_1], MAX_TAIL_CALL_CNT); 231 PPC_BCC(COND_GT, out); 232 233 /* 234 * tail_call_cnt++; 235 */ 236 PPC_ADDI(b2p[TMP_REG_1], b2p[TMP_REG_1], 1); 237 PPC_BPF_STL(b2p[TMP_REG_1], 1, bpf_jit_stack_tailcallcnt(ctx)); 238 239 /* prog = array->ptrs[index]; */ 240 PPC_MULI(b2p[TMP_REG_1], b2p_index, 8); 241 PPC_ADD(b2p[TMP_REG_1], b2p[TMP_REG_1], b2p_bpf_array); 242 PPC_LD(b2p[TMP_REG_1], b2p[TMP_REG_1], offsetof(struct bpf_array, ptrs)); 243 244 /* 245 * if (prog == NULL) 246 * goto out; 247 */ 248 PPC_CMPLDI(b2p[TMP_REG_1], 0); 249 PPC_BCC(COND_EQ, out); 250 251 /* goto *(prog->bpf_func + prologue_size); */ 252 PPC_LD(b2p[TMP_REG_1], b2p[TMP_REG_1], offsetof(struct bpf_prog, bpf_func)); 253 #ifdef PPC64_ELF_ABI_v1 254 /* skip past the function descriptor */ 255 PPC_ADDI(b2p[TMP_REG_1], b2p[TMP_REG_1], 256 FUNCTION_DESCR_SIZE + BPF_TAILCALL_PROLOGUE_SIZE); 257 #else 258 PPC_ADDI(b2p[TMP_REG_1], b2p[TMP_REG_1], BPF_TAILCALL_PROLOGUE_SIZE); 259 #endif 260 PPC_MTCTR(b2p[TMP_REG_1]); 261 262 /* tear down stack, restore NVRs, ... */ 263 bpf_jit_emit_common_epilogue(image, ctx); 264 265 PPC_BCTR(); 266 /* out: */ 267 } 268 269 /* Assemble the body code between the prologue & epilogue */ 270 static int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, 271 struct codegen_context *ctx, 272 u32 *addrs, bool extra_pass) 273 { 274 const struct bpf_insn *insn = fp->insnsi; 275 int flen = fp->len; 276 int i; 277 278 /* Start of epilogue code - will only be valid 2nd pass onwards */ 279 u32 exit_addr = addrs[flen]; 280 281 for (i = 0; i < flen; i++) { 282 u32 code = insn[i].code; 283 u32 dst_reg = b2p[insn[i].dst_reg]; 284 u32 src_reg = b2p[insn[i].src_reg]; 285 s16 off = insn[i].off; 286 s32 imm = insn[i].imm; 287 u64 imm64; 288 u8 *func; 289 u32 true_cond; 290 291 /* 292 * addrs[] maps a BPF bytecode address into a real offset from 293 * the start of the body code. 294 */ 295 addrs[i] = ctx->idx * 4; 296 297 /* 298 * As an optimization, we note down which non-volatile registers 299 * are used so that we can only save/restore those in our 300 * prologue and epilogue. We do this here regardless of whether 301 * the actual BPF instruction uses src/dst registers or not 302 * (for instance, BPF_CALL does not use them). The expectation 303 * is that those instructions will have src_reg/dst_reg set to 304 * 0. Even otherwise, we just lose some prologue/epilogue 305 * optimization but everything else should work without 306 * any issues. 307 */ 308 if (dst_reg >= BPF_PPC_NVR_MIN && dst_reg < 32) 309 bpf_set_seen_register(ctx, insn[i].dst_reg); 310 if (src_reg >= BPF_PPC_NVR_MIN && src_reg < 32) 311 bpf_set_seen_register(ctx, insn[i].src_reg); 312 313 switch (code) { 314 /* 315 * Arithmetic operations: ADD/SUB/MUL/DIV/MOD/NEG 316 */ 317 case BPF_ALU | BPF_ADD | BPF_X: /* (u32) dst += (u32) src */ 318 case BPF_ALU64 | BPF_ADD | BPF_X: /* dst += src */ 319 PPC_ADD(dst_reg, dst_reg, src_reg); 320 goto bpf_alu32_trunc; 321 case BPF_ALU | BPF_SUB | BPF_X: /* (u32) dst -= (u32) src */ 322 case BPF_ALU64 | BPF_SUB | BPF_X: /* dst -= src */ 323 PPC_SUB(dst_reg, dst_reg, src_reg); 324 goto bpf_alu32_trunc; 325 case BPF_ALU | BPF_ADD | BPF_K: /* (u32) dst += (u32) imm */ 326 case BPF_ALU | BPF_SUB | BPF_K: /* (u32) dst -= (u32) imm */ 327 case BPF_ALU64 | BPF_ADD | BPF_K: /* dst += imm */ 328 case BPF_ALU64 | BPF_SUB | BPF_K: /* dst -= imm */ 329 if (BPF_OP(code) == BPF_SUB) 330 imm = -imm; 331 if (imm) { 332 if (imm >= -32768 && imm < 32768) 333 PPC_ADDI(dst_reg, dst_reg, IMM_L(imm)); 334 else { 335 PPC_LI32(b2p[TMP_REG_1], imm); 336 PPC_ADD(dst_reg, dst_reg, b2p[TMP_REG_1]); 337 } 338 } 339 goto bpf_alu32_trunc; 340 case BPF_ALU | BPF_MUL | BPF_X: /* (u32) dst *= (u32) src */ 341 case BPF_ALU64 | BPF_MUL | BPF_X: /* dst *= src */ 342 if (BPF_CLASS(code) == BPF_ALU) 343 PPC_MULW(dst_reg, dst_reg, src_reg); 344 else 345 PPC_MULD(dst_reg, dst_reg, src_reg); 346 goto bpf_alu32_trunc; 347 case BPF_ALU | BPF_MUL | BPF_K: /* (u32) dst *= (u32) imm */ 348 case BPF_ALU64 | BPF_MUL | BPF_K: /* dst *= imm */ 349 if (imm >= -32768 && imm < 32768) 350 PPC_MULI(dst_reg, dst_reg, IMM_L(imm)); 351 else { 352 PPC_LI32(b2p[TMP_REG_1], imm); 353 if (BPF_CLASS(code) == BPF_ALU) 354 PPC_MULW(dst_reg, dst_reg, 355 b2p[TMP_REG_1]); 356 else 357 PPC_MULD(dst_reg, dst_reg, 358 b2p[TMP_REG_1]); 359 } 360 goto bpf_alu32_trunc; 361 case BPF_ALU | BPF_DIV | BPF_X: /* (u32) dst /= (u32) src */ 362 case BPF_ALU | BPF_MOD | BPF_X: /* (u32) dst %= (u32) src */ 363 if (BPF_OP(code) == BPF_MOD) { 364 PPC_DIVWU(b2p[TMP_REG_1], dst_reg, src_reg); 365 PPC_MULW(b2p[TMP_REG_1], src_reg, 366 b2p[TMP_REG_1]); 367 PPC_SUB(dst_reg, dst_reg, b2p[TMP_REG_1]); 368 } else 369 PPC_DIVWU(dst_reg, dst_reg, src_reg); 370 goto bpf_alu32_trunc; 371 case BPF_ALU64 | BPF_DIV | BPF_X: /* dst /= src */ 372 case BPF_ALU64 | BPF_MOD | BPF_X: /* dst %= src */ 373 if (BPF_OP(code) == BPF_MOD) { 374 PPC_DIVD(b2p[TMP_REG_1], dst_reg, src_reg); 375 PPC_MULD(b2p[TMP_REG_1], src_reg, 376 b2p[TMP_REG_1]); 377 PPC_SUB(dst_reg, dst_reg, b2p[TMP_REG_1]); 378 } else 379 PPC_DIVD(dst_reg, dst_reg, src_reg); 380 break; 381 case BPF_ALU | BPF_MOD | BPF_K: /* (u32) dst %= (u32) imm */ 382 case BPF_ALU | BPF_DIV | BPF_K: /* (u32) dst /= (u32) imm */ 383 case BPF_ALU64 | BPF_MOD | BPF_K: /* dst %= imm */ 384 case BPF_ALU64 | BPF_DIV | BPF_K: /* dst /= imm */ 385 if (imm == 0) 386 return -EINVAL; 387 else if (imm == 1) 388 goto bpf_alu32_trunc; 389 390 PPC_LI32(b2p[TMP_REG_1], imm); 391 switch (BPF_CLASS(code)) { 392 case BPF_ALU: 393 if (BPF_OP(code) == BPF_MOD) { 394 PPC_DIVWU(b2p[TMP_REG_2], dst_reg, 395 b2p[TMP_REG_1]); 396 PPC_MULW(b2p[TMP_REG_1], 397 b2p[TMP_REG_1], 398 b2p[TMP_REG_2]); 399 PPC_SUB(dst_reg, dst_reg, 400 b2p[TMP_REG_1]); 401 } else 402 PPC_DIVWU(dst_reg, dst_reg, 403 b2p[TMP_REG_1]); 404 break; 405 case BPF_ALU64: 406 if (BPF_OP(code) == BPF_MOD) { 407 PPC_DIVD(b2p[TMP_REG_2], dst_reg, 408 b2p[TMP_REG_1]); 409 PPC_MULD(b2p[TMP_REG_1], 410 b2p[TMP_REG_1], 411 b2p[TMP_REG_2]); 412 PPC_SUB(dst_reg, dst_reg, 413 b2p[TMP_REG_1]); 414 } else 415 PPC_DIVD(dst_reg, dst_reg, 416 b2p[TMP_REG_1]); 417 break; 418 } 419 goto bpf_alu32_trunc; 420 case BPF_ALU | BPF_NEG: /* (u32) dst = -dst */ 421 case BPF_ALU64 | BPF_NEG: /* dst = -dst */ 422 PPC_NEG(dst_reg, dst_reg); 423 goto bpf_alu32_trunc; 424 425 /* 426 * Logical operations: AND/OR/XOR/[A]LSH/[A]RSH 427 */ 428 case BPF_ALU | BPF_AND | BPF_X: /* (u32) dst = dst & src */ 429 case BPF_ALU64 | BPF_AND | BPF_X: /* dst = dst & src */ 430 PPC_AND(dst_reg, dst_reg, src_reg); 431 goto bpf_alu32_trunc; 432 case BPF_ALU | BPF_AND | BPF_K: /* (u32) dst = dst & imm */ 433 case BPF_ALU64 | BPF_AND | BPF_K: /* dst = dst & imm */ 434 if (!IMM_H(imm)) 435 PPC_ANDI(dst_reg, dst_reg, IMM_L(imm)); 436 else { 437 /* Sign-extended */ 438 PPC_LI32(b2p[TMP_REG_1], imm); 439 PPC_AND(dst_reg, dst_reg, b2p[TMP_REG_1]); 440 } 441 goto bpf_alu32_trunc; 442 case BPF_ALU | BPF_OR | BPF_X: /* dst = (u32) dst | (u32) src */ 443 case BPF_ALU64 | BPF_OR | BPF_X: /* dst = dst | src */ 444 PPC_OR(dst_reg, dst_reg, src_reg); 445 goto bpf_alu32_trunc; 446 case BPF_ALU | BPF_OR | BPF_K:/* dst = (u32) dst | (u32) imm */ 447 case BPF_ALU64 | BPF_OR | BPF_K:/* dst = dst | imm */ 448 if (imm < 0 && BPF_CLASS(code) == BPF_ALU64) { 449 /* Sign-extended */ 450 PPC_LI32(b2p[TMP_REG_1], imm); 451 PPC_OR(dst_reg, dst_reg, b2p[TMP_REG_1]); 452 } else { 453 if (IMM_L(imm)) 454 PPC_ORI(dst_reg, dst_reg, IMM_L(imm)); 455 if (IMM_H(imm)) 456 PPC_ORIS(dst_reg, dst_reg, IMM_H(imm)); 457 } 458 goto bpf_alu32_trunc; 459 case BPF_ALU | BPF_XOR | BPF_X: /* (u32) dst ^= src */ 460 case BPF_ALU64 | BPF_XOR | BPF_X: /* dst ^= src */ 461 PPC_XOR(dst_reg, dst_reg, src_reg); 462 goto bpf_alu32_trunc; 463 case BPF_ALU | BPF_XOR | BPF_K: /* (u32) dst ^= (u32) imm */ 464 case BPF_ALU64 | BPF_XOR | BPF_K: /* dst ^= imm */ 465 if (imm < 0 && BPF_CLASS(code) == BPF_ALU64) { 466 /* Sign-extended */ 467 PPC_LI32(b2p[TMP_REG_1], imm); 468 PPC_XOR(dst_reg, dst_reg, b2p[TMP_REG_1]); 469 } else { 470 if (IMM_L(imm)) 471 PPC_XORI(dst_reg, dst_reg, IMM_L(imm)); 472 if (IMM_H(imm)) 473 PPC_XORIS(dst_reg, dst_reg, IMM_H(imm)); 474 } 475 goto bpf_alu32_trunc; 476 case BPF_ALU | BPF_LSH | BPF_X: /* (u32) dst <<= (u32) src */ 477 /* slw clears top 32 bits */ 478 PPC_SLW(dst_reg, dst_reg, src_reg); 479 break; 480 case BPF_ALU64 | BPF_LSH | BPF_X: /* dst <<= src; */ 481 PPC_SLD(dst_reg, dst_reg, src_reg); 482 break; 483 case BPF_ALU | BPF_LSH | BPF_K: /* (u32) dst <<== (u32) imm */ 484 /* with imm 0, we still need to clear top 32 bits */ 485 PPC_SLWI(dst_reg, dst_reg, imm); 486 break; 487 case BPF_ALU64 | BPF_LSH | BPF_K: /* dst <<== imm */ 488 if (imm != 0) 489 PPC_SLDI(dst_reg, dst_reg, imm); 490 break; 491 case BPF_ALU | BPF_RSH | BPF_X: /* (u32) dst >>= (u32) src */ 492 PPC_SRW(dst_reg, dst_reg, src_reg); 493 break; 494 case BPF_ALU64 | BPF_RSH | BPF_X: /* dst >>= src */ 495 PPC_SRD(dst_reg, dst_reg, src_reg); 496 break; 497 case BPF_ALU | BPF_RSH | BPF_K: /* (u32) dst >>= (u32) imm */ 498 PPC_SRWI(dst_reg, dst_reg, imm); 499 break; 500 case BPF_ALU64 | BPF_RSH | BPF_K: /* dst >>= imm */ 501 if (imm != 0) 502 PPC_SRDI(dst_reg, dst_reg, imm); 503 break; 504 case BPF_ALU64 | BPF_ARSH | BPF_X: /* (s64) dst >>= src */ 505 PPC_SRAD(dst_reg, dst_reg, src_reg); 506 break; 507 case BPF_ALU64 | BPF_ARSH | BPF_K: /* (s64) dst >>= imm */ 508 if (imm != 0) 509 PPC_SRADI(dst_reg, dst_reg, imm); 510 break; 511 512 /* 513 * MOV 514 */ 515 case BPF_ALU | BPF_MOV | BPF_X: /* (u32) dst = src */ 516 case BPF_ALU64 | BPF_MOV | BPF_X: /* dst = src */ 517 PPC_MR(dst_reg, src_reg); 518 goto bpf_alu32_trunc; 519 case BPF_ALU | BPF_MOV | BPF_K: /* (u32) dst = imm */ 520 case BPF_ALU64 | BPF_MOV | BPF_K: /* dst = (s64) imm */ 521 PPC_LI32(dst_reg, imm); 522 if (imm < 0) 523 goto bpf_alu32_trunc; 524 break; 525 526 bpf_alu32_trunc: 527 /* Truncate to 32-bits */ 528 if (BPF_CLASS(code) == BPF_ALU) 529 PPC_RLWINM(dst_reg, dst_reg, 0, 0, 31); 530 break; 531 532 /* 533 * BPF_FROM_BE/LE 534 */ 535 case BPF_ALU | BPF_END | BPF_FROM_LE: 536 case BPF_ALU | BPF_END | BPF_FROM_BE: 537 #ifdef __BIG_ENDIAN__ 538 if (BPF_SRC(code) == BPF_FROM_BE) 539 goto emit_clear; 540 #else /* !__BIG_ENDIAN__ */ 541 if (BPF_SRC(code) == BPF_FROM_LE) 542 goto emit_clear; 543 #endif 544 switch (imm) { 545 case 16: 546 /* Rotate 8 bits left & mask with 0x0000ff00 */ 547 PPC_RLWINM(b2p[TMP_REG_1], dst_reg, 8, 16, 23); 548 /* Rotate 8 bits right & insert LSB to reg */ 549 PPC_RLWIMI(b2p[TMP_REG_1], dst_reg, 24, 24, 31); 550 /* Move result back to dst_reg */ 551 PPC_MR(dst_reg, b2p[TMP_REG_1]); 552 break; 553 case 32: 554 /* 555 * Rotate word left by 8 bits: 556 * 2 bytes are already in their final position 557 * -- byte 2 and 4 (of bytes 1, 2, 3 and 4) 558 */ 559 PPC_RLWINM(b2p[TMP_REG_1], dst_reg, 8, 0, 31); 560 /* Rotate 24 bits and insert byte 1 */ 561 PPC_RLWIMI(b2p[TMP_REG_1], dst_reg, 24, 0, 7); 562 /* Rotate 24 bits and insert byte 3 */ 563 PPC_RLWIMI(b2p[TMP_REG_1], dst_reg, 24, 16, 23); 564 PPC_MR(dst_reg, b2p[TMP_REG_1]); 565 break; 566 case 64: 567 /* 568 * Way easier and faster(?) to store the value 569 * into stack and then use ldbrx 570 * 571 * ctx->seen will be reliable in pass2, but 572 * the instructions generated will remain the 573 * same across all passes 574 */ 575 PPC_STD(dst_reg, 1, bpf_jit_stack_local(ctx)); 576 PPC_ADDI(b2p[TMP_REG_1], 1, bpf_jit_stack_local(ctx)); 577 PPC_LDBRX(dst_reg, 0, b2p[TMP_REG_1]); 578 break; 579 } 580 break; 581 582 emit_clear: 583 switch (imm) { 584 case 16: 585 /* zero-extend 16 bits into 64 bits */ 586 PPC_RLDICL(dst_reg, dst_reg, 0, 48); 587 break; 588 case 32: 589 /* zero-extend 32 bits into 64 bits */ 590 PPC_RLDICL(dst_reg, dst_reg, 0, 32); 591 break; 592 case 64: 593 /* nop */ 594 break; 595 } 596 break; 597 598 /* 599 * BPF_ST(X) 600 */ 601 case BPF_STX | BPF_MEM | BPF_B: /* *(u8 *)(dst + off) = src */ 602 case BPF_ST | BPF_MEM | BPF_B: /* *(u8 *)(dst + off) = imm */ 603 if (BPF_CLASS(code) == BPF_ST) { 604 PPC_LI(b2p[TMP_REG_1], imm); 605 src_reg = b2p[TMP_REG_1]; 606 } 607 PPC_STB(src_reg, dst_reg, off); 608 break; 609 case BPF_STX | BPF_MEM | BPF_H: /* (u16 *)(dst + off) = src */ 610 case BPF_ST | BPF_MEM | BPF_H: /* (u16 *)(dst + off) = imm */ 611 if (BPF_CLASS(code) == BPF_ST) { 612 PPC_LI(b2p[TMP_REG_1], imm); 613 src_reg = b2p[TMP_REG_1]; 614 } 615 PPC_STH(src_reg, dst_reg, off); 616 break; 617 case BPF_STX | BPF_MEM | BPF_W: /* *(u32 *)(dst + off) = src */ 618 case BPF_ST | BPF_MEM | BPF_W: /* *(u32 *)(dst + off) = imm */ 619 if (BPF_CLASS(code) == BPF_ST) { 620 PPC_LI32(b2p[TMP_REG_1], imm); 621 src_reg = b2p[TMP_REG_1]; 622 } 623 PPC_STW(src_reg, dst_reg, off); 624 break; 625 case BPF_STX | BPF_MEM | BPF_DW: /* (u64 *)(dst + off) = src */ 626 case BPF_ST | BPF_MEM | BPF_DW: /* *(u64 *)(dst + off) = imm */ 627 if (BPF_CLASS(code) == BPF_ST) { 628 PPC_LI32(b2p[TMP_REG_1], imm); 629 src_reg = b2p[TMP_REG_1]; 630 } 631 PPC_STD(src_reg, dst_reg, off); 632 break; 633 634 /* 635 * BPF_STX XADD (atomic_add) 636 */ 637 /* *(u32 *)(dst + off) += src */ 638 case BPF_STX | BPF_XADD | BPF_W: 639 /* Get EA into TMP_REG_1 */ 640 PPC_ADDI(b2p[TMP_REG_1], dst_reg, off); 641 /* error if EA is not word-aligned */ 642 PPC_ANDI(b2p[TMP_REG_2], b2p[TMP_REG_1], 0x03); 643 PPC_BCC_SHORT(COND_EQ, (ctx->idx * 4) + 12); 644 PPC_LI(b2p[BPF_REG_0], 0); 645 PPC_JMP(exit_addr); 646 /* load value from memory into TMP_REG_2 */ 647 PPC_BPF_LWARX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1], 0); 648 /* add value from src_reg into this */ 649 PPC_ADD(b2p[TMP_REG_2], b2p[TMP_REG_2], src_reg); 650 /* store result back */ 651 PPC_BPF_STWCX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1]); 652 /* we're done if this succeeded */ 653 PPC_BCC_SHORT(COND_EQ, (ctx->idx * 4) + (7*4)); 654 /* otherwise, let's try once more */ 655 PPC_BPF_LWARX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1], 0); 656 PPC_ADD(b2p[TMP_REG_2], b2p[TMP_REG_2], src_reg); 657 PPC_BPF_STWCX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1]); 658 /* exit if the store was not successful */ 659 PPC_LI(b2p[BPF_REG_0], 0); 660 PPC_BCC(COND_NE, exit_addr); 661 break; 662 /* *(u64 *)(dst + off) += src */ 663 case BPF_STX | BPF_XADD | BPF_DW: 664 PPC_ADDI(b2p[TMP_REG_1], dst_reg, off); 665 /* error if EA is not doubleword-aligned */ 666 PPC_ANDI(b2p[TMP_REG_2], b2p[TMP_REG_1], 0x07); 667 PPC_BCC_SHORT(COND_EQ, (ctx->idx * 4) + (3*4)); 668 PPC_LI(b2p[BPF_REG_0], 0); 669 PPC_JMP(exit_addr); 670 PPC_BPF_LDARX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1], 0); 671 PPC_ADD(b2p[TMP_REG_2], b2p[TMP_REG_2], src_reg); 672 PPC_BPF_STDCX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1]); 673 PPC_BCC_SHORT(COND_EQ, (ctx->idx * 4) + (7*4)); 674 PPC_BPF_LDARX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1], 0); 675 PPC_ADD(b2p[TMP_REG_2], b2p[TMP_REG_2], src_reg); 676 PPC_BPF_STDCX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1]); 677 PPC_LI(b2p[BPF_REG_0], 0); 678 PPC_BCC(COND_NE, exit_addr); 679 break; 680 681 /* 682 * BPF_LDX 683 */ 684 /* dst = *(u8 *)(ul) (src + off) */ 685 case BPF_LDX | BPF_MEM | BPF_B: 686 PPC_LBZ(dst_reg, src_reg, off); 687 break; 688 /* dst = *(u16 *)(ul) (src + off) */ 689 case BPF_LDX | BPF_MEM | BPF_H: 690 PPC_LHZ(dst_reg, src_reg, off); 691 break; 692 /* dst = *(u32 *)(ul) (src + off) */ 693 case BPF_LDX | BPF_MEM | BPF_W: 694 PPC_LWZ(dst_reg, src_reg, off); 695 break; 696 /* dst = *(u64 *)(ul) (src + off) */ 697 case BPF_LDX | BPF_MEM | BPF_DW: 698 PPC_LD(dst_reg, src_reg, off); 699 break; 700 701 /* 702 * Doubleword load 703 * 16 byte instruction that uses two 'struct bpf_insn' 704 */ 705 case BPF_LD | BPF_IMM | BPF_DW: /* dst = (u64) imm */ 706 imm64 = ((u64)(u32) insn[i].imm) | 707 (((u64)(u32) insn[i+1].imm) << 32); 708 /* Adjust for two bpf instructions */ 709 addrs[++i] = ctx->idx * 4; 710 PPC_LI64(dst_reg, imm64); 711 break; 712 713 /* 714 * Return/Exit 715 */ 716 case BPF_JMP | BPF_EXIT: 717 /* 718 * If this isn't the very last instruction, branch to 719 * the epilogue. If we _are_ the last instruction, 720 * we'll just fall through to the epilogue. 721 */ 722 if (i != flen - 1) 723 PPC_JMP(exit_addr); 724 /* else fall through to the epilogue */ 725 break; 726 727 /* 728 * Call kernel helper or bpf function 729 */ 730 case BPF_JMP | BPF_CALL: 731 ctx->seen |= SEEN_FUNC; 732 733 /* bpf function call */ 734 if (insn[i].src_reg == BPF_PSEUDO_CALL) 735 if (!extra_pass) 736 func = NULL; 737 else if (fp->aux->func && off < fp->aux->func_cnt) 738 /* use the subprog id from the off 739 * field to lookup the callee address 740 */ 741 func = (u8 *) fp->aux->func[off]->bpf_func; 742 else 743 return -EINVAL; 744 /* kernel helper call */ 745 else 746 func = (u8 *) __bpf_call_base + imm; 747 748 bpf_jit_emit_func_call(image, ctx, (u64)func); 749 750 /* move return value from r3 to BPF_REG_0 */ 751 PPC_MR(b2p[BPF_REG_0], 3); 752 break; 753 754 /* 755 * Jumps and branches 756 */ 757 case BPF_JMP | BPF_JA: 758 PPC_JMP(addrs[i + 1 + off]); 759 break; 760 761 case BPF_JMP | BPF_JGT | BPF_K: 762 case BPF_JMP | BPF_JGT | BPF_X: 763 case BPF_JMP | BPF_JSGT | BPF_K: 764 case BPF_JMP | BPF_JSGT | BPF_X: 765 true_cond = COND_GT; 766 goto cond_branch; 767 case BPF_JMP | BPF_JLT | BPF_K: 768 case BPF_JMP | BPF_JLT | BPF_X: 769 case BPF_JMP | BPF_JSLT | BPF_K: 770 case BPF_JMP | BPF_JSLT | BPF_X: 771 true_cond = COND_LT; 772 goto cond_branch; 773 case BPF_JMP | BPF_JGE | BPF_K: 774 case BPF_JMP | BPF_JGE | BPF_X: 775 case BPF_JMP | BPF_JSGE | BPF_K: 776 case BPF_JMP | BPF_JSGE | BPF_X: 777 true_cond = COND_GE; 778 goto cond_branch; 779 case BPF_JMP | BPF_JLE | BPF_K: 780 case BPF_JMP | BPF_JLE | BPF_X: 781 case BPF_JMP | BPF_JSLE | BPF_K: 782 case BPF_JMP | BPF_JSLE | BPF_X: 783 true_cond = COND_LE; 784 goto cond_branch; 785 case BPF_JMP | BPF_JEQ | BPF_K: 786 case BPF_JMP | BPF_JEQ | BPF_X: 787 true_cond = COND_EQ; 788 goto cond_branch; 789 case BPF_JMP | BPF_JNE | BPF_K: 790 case BPF_JMP | BPF_JNE | BPF_X: 791 true_cond = COND_NE; 792 goto cond_branch; 793 case BPF_JMP | BPF_JSET | BPF_K: 794 case BPF_JMP | BPF_JSET | BPF_X: 795 true_cond = COND_NE; 796 /* Fall through */ 797 798 cond_branch: 799 switch (code) { 800 case BPF_JMP | BPF_JGT | BPF_X: 801 case BPF_JMP | BPF_JLT | BPF_X: 802 case BPF_JMP | BPF_JGE | BPF_X: 803 case BPF_JMP | BPF_JLE | BPF_X: 804 case BPF_JMP | BPF_JEQ | BPF_X: 805 case BPF_JMP | BPF_JNE | BPF_X: 806 /* unsigned comparison */ 807 PPC_CMPLD(dst_reg, src_reg); 808 break; 809 case BPF_JMP | BPF_JSGT | BPF_X: 810 case BPF_JMP | BPF_JSLT | BPF_X: 811 case BPF_JMP | BPF_JSGE | BPF_X: 812 case BPF_JMP | BPF_JSLE | BPF_X: 813 /* signed comparison */ 814 PPC_CMPD(dst_reg, src_reg); 815 break; 816 case BPF_JMP | BPF_JSET | BPF_X: 817 PPC_AND_DOT(b2p[TMP_REG_1], dst_reg, src_reg); 818 break; 819 case BPF_JMP | BPF_JNE | BPF_K: 820 case BPF_JMP | BPF_JEQ | BPF_K: 821 case BPF_JMP | BPF_JGT | BPF_K: 822 case BPF_JMP | BPF_JLT | BPF_K: 823 case BPF_JMP | BPF_JGE | BPF_K: 824 case BPF_JMP | BPF_JLE | BPF_K: 825 /* 826 * Need sign-extended load, so only positive 827 * values can be used as imm in cmpldi 828 */ 829 if (imm >= 0 && imm < 32768) 830 PPC_CMPLDI(dst_reg, imm); 831 else { 832 /* sign-extending load */ 833 PPC_LI32(b2p[TMP_REG_1], imm); 834 /* ... but unsigned comparison */ 835 PPC_CMPLD(dst_reg, b2p[TMP_REG_1]); 836 } 837 break; 838 case BPF_JMP | BPF_JSGT | BPF_K: 839 case BPF_JMP | BPF_JSLT | BPF_K: 840 case BPF_JMP | BPF_JSGE | BPF_K: 841 case BPF_JMP | BPF_JSLE | BPF_K: 842 /* 843 * signed comparison, so any 16-bit value 844 * can be used in cmpdi 845 */ 846 if (imm >= -32768 && imm < 32768) 847 PPC_CMPDI(dst_reg, imm); 848 else { 849 PPC_LI32(b2p[TMP_REG_1], imm); 850 PPC_CMPD(dst_reg, b2p[TMP_REG_1]); 851 } 852 break; 853 case BPF_JMP | BPF_JSET | BPF_K: 854 /* andi does not sign-extend the immediate */ 855 if (imm >= 0 && imm < 32768) 856 /* PPC_ANDI is _only/always_ dot-form */ 857 PPC_ANDI(b2p[TMP_REG_1], dst_reg, imm); 858 else { 859 PPC_LI32(b2p[TMP_REG_1], imm); 860 PPC_AND_DOT(b2p[TMP_REG_1], dst_reg, 861 b2p[TMP_REG_1]); 862 } 863 break; 864 } 865 PPC_BCC(true_cond, addrs[i + 1 + off]); 866 break; 867 868 /* 869 * Tail call 870 */ 871 case BPF_JMP | BPF_TAIL_CALL: 872 ctx->seen |= SEEN_TAILCALL; 873 bpf_jit_emit_tail_call(image, ctx, addrs[i + 1]); 874 break; 875 876 default: 877 /* 878 * The filter contains something cruel & unusual. 879 * We don't handle it, but also there shouldn't be 880 * anything missing from our list. 881 */ 882 pr_err_ratelimited("eBPF filter opcode %04x (@%d) unsupported\n", 883 code, i); 884 return -ENOTSUPP; 885 } 886 } 887 888 /* Set end-of-body-code address for exit. */ 889 addrs[i] = ctx->idx * 4; 890 891 return 0; 892 } 893 894 struct powerpc64_jit_data { 895 struct bpf_binary_header *header; 896 u32 *addrs; 897 u8 *image; 898 u32 proglen; 899 struct codegen_context ctx; 900 }; 901 902 struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *fp) 903 { 904 u32 proglen; 905 u32 alloclen; 906 u8 *image = NULL; 907 u32 *code_base; 908 u32 *addrs; 909 struct powerpc64_jit_data *jit_data; 910 struct codegen_context cgctx; 911 int pass; 912 int flen; 913 struct bpf_binary_header *bpf_hdr; 914 struct bpf_prog *org_fp = fp; 915 struct bpf_prog *tmp_fp; 916 bool bpf_blinded = false; 917 bool extra_pass = false; 918 919 if (!fp->jit_requested) 920 return org_fp; 921 922 tmp_fp = bpf_jit_blind_constants(org_fp); 923 if (IS_ERR(tmp_fp)) 924 return org_fp; 925 926 if (tmp_fp != org_fp) { 927 bpf_blinded = true; 928 fp = tmp_fp; 929 } 930 931 jit_data = fp->aux->jit_data; 932 if (!jit_data) { 933 jit_data = kzalloc(sizeof(*jit_data), GFP_KERNEL); 934 if (!jit_data) { 935 fp = org_fp; 936 goto out; 937 } 938 fp->aux->jit_data = jit_data; 939 } 940 941 flen = fp->len; 942 addrs = jit_data->addrs; 943 if (addrs) { 944 cgctx = jit_data->ctx; 945 image = jit_data->image; 946 bpf_hdr = jit_data->header; 947 proglen = jit_data->proglen; 948 alloclen = proglen + FUNCTION_DESCR_SIZE; 949 extra_pass = true; 950 goto skip_init_ctx; 951 } 952 953 addrs = kcalloc(flen + 1, sizeof(*addrs), GFP_KERNEL); 954 if (addrs == NULL) { 955 fp = org_fp; 956 goto out_addrs; 957 } 958 959 memset(&cgctx, 0, sizeof(struct codegen_context)); 960 961 /* Make sure that the stack is quadword aligned. */ 962 cgctx.stack_size = round_up(fp->aux->stack_depth, 16); 963 964 /* Scouting faux-generate pass 0 */ 965 if (bpf_jit_build_body(fp, 0, &cgctx, addrs, false)) { 966 /* We hit something illegal or unsupported. */ 967 fp = org_fp; 968 goto out_addrs; 969 } 970 971 /* 972 * Pretend to build prologue, given the features we've seen. This will 973 * update ctgtx.idx as it pretends to output instructions, then we can 974 * calculate total size from idx. 975 */ 976 bpf_jit_build_prologue(0, &cgctx); 977 bpf_jit_build_epilogue(0, &cgctx); 978 979 proglen = cgctx.idx * 4; 980 alloclen = proglen + FUNCTION_DESCR_SIZE; 981 982 bpf_hdr = bpf_jit_binary_alloc(alloclen, &image, 4, 983 bpf_jit_fill_ill_insns); 984 if (!bpf_hdr) { 985 fp = org_fp; 986 goto out_addrs; 987 } 988 989 skip_init_ctx: 990 code_base = (u32 *)(image + FUNCTION_DESCR_SIZE); 991 992 /* Code generation passes 1-2 */ 993 for (pass = 1; pass < 3; pass++) { 994 /* Now build the prologue, body code & epilogue for real. */ 995 cgctx.idx = 0; 996 bpf_jit_build_prologue(code_base, &cgctx); 997 bpf_jit_build_body(fp, code_base, &cgctx, addrs, extra_pass); 998 bpf_jit_build_epilogue(code_base, &cgctx); 999 1000 if (bpf_jit_enable > 1) 1001 pr_info("Pass %d: shrink = %d, seen = 0x%x\n", pass, 1002 proglen - (cgctx.idx * 4), cgctx.seen); 1003 } 1004 1005 if (bpf_jit_enable > 1) 1006 /* 1007 * Note that we output the base address of the code_base 1008 * rather than image, since opcodes are in code_base. 1009 */ 1010 bpf_jit_dump(flen, proglen, pass, code_base); 1011 1012 #ifdef PPC64_ELF_ABI_v1 1013 /* Function descriptor nastiness: Address + TOC */ 1014 ((u64 *)image)[0] = (u64)code_base; 1015 ((u64 *)image)[1] = local_paca->kernel_toc; 1016 #endif 1017 1018 fp->bpf_func = (void *)image; 1019 fp->jited = 1; 1020 fp->jited_len = alloclen; 1021 1022 bpf_flush_icache(bpf_hdr, (u8 *)bpf_hdr + (bpf_hdr->pages * PAGE_SIZE)); 1023 if (!fp->is_func || extra_pass) { 1024 out_addrs: 1025 kfree(addrs); 1026 kfree(jit_data); 1027 fp->aux->jit_data = NULL; 1028 } else { 1029 jit_data->addrs = addrs; 1030 jit_data->ctx = cgctx; 1031 jit_data->proglen = proglen; 1032 jit_data->image = image; 1033 jit_data->header = bpf_hdr; 1034 } 1035 1036 out: 1037 if (bpf_blinded) 1038 bpf_jit_prog_release_other(fp, fp == org_fp ? tmp_fp : org_fp); 1039 1040 return fp; 1041 } 1042 1043 /* Overriding bpf_jit_free() as we don't set images read-only. */ 1044 void bpf_jit_free(struct bpf_prog *fp) 1045 { 1046 unsigned long addr = (unsigned long)fp->bpf_func & PAGE_MASK; 1047 struct bpf_binary_header *bpf_hdr = (void *)addr; 1048 1049 if (fp->jited) 1050 bpf_jit_binary_free(bpf_hdr); 1051 1052 bpf_prog_unlock_free(fp); 1053 } 1054