1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * eBPF JIT compiler for PPC32 4 * 5 * Copyright 2020 Christophe Leroy <christophe.leroy@csgroup.eu> 6 * CS GROUP France 7 * 8 * Based on PPC64 eBPF JIT compiler by Naveen N. Rao 9 */ 10 #include <linux/moduleloader.h> 11 #include <asm/cacheflush.h> 12 #include <asm/asm-compat.h> 13 #include <linux/netdevice.h> 14 #include <linux/filter.h> 15 #include <linux/if_vlan.h> 16 #include <asm/kprobes.h> 17 #include <linux/bpf.h> 18 19 #include "bpf_jit.h" 20 21 /* 22 * Stack layout: 23 * 24 * [ prev sp ] <------------- 25 * [ nv gpr save area ] 16 * 4 | 26 * fp (r31) --> [ ebpf stack space ] upto 512 | 27 * [ frame header ] 16 | 28 * sp (r1) ---> [ stack pointer ] -------------- 29 */ 30 31 /* for gpr non volatile registers r17 to r31 (14) + tail call */ 32 #define BPF_PPC_STACK_SAVE (15 * 4 + 4) 33 /* stack frame, ensure this is quadword aligned */ 34 #define BPF_PPC_STACKFRAME(ctx) (STACK_FRAME_MIN_SIZE + BPF_PPC_STACK_SAVE + (ctx)->stack_size) 35 36 /* BPF register usage */ 37 #define TMP_REG (MAX_BPF_JIT_REG + 0) 38 39 /* BPF to ppc register mappings */ 40 const int b2p[MAX_BPF_JIT_REG + 1] = { 41 /* function return value */ 42 [BPF_REG_0] = 12, 43 /* function arguments */ 44 [BPF_REG_1] = 4, 45 [BPF_REG_2] = 6, 46 [BPF_REG_3] = 8, 47 [BPF_REG_4] = 10, 48 [BPF_REG_5] = 22, 49 /* non volatile registers */ 50 [BPF_REG_6] = 24, 51 [BPF_REG_7] = 26, 52 [BPF_REG_8] = 28, 53 [BPF_REG_9] = 30, 54 /* frame pointer aka BPF_REG_10 */ 55 [BPF_REG_FP] = 18, 56 /* eBPF jit internal registers */ 57 [BPF_REG_AX] = 20, 58 [TMP_REG] = 31, /* 32 bits */ 59 }; 60 61 static int bpf_to_ppc(struct codegen_context *ctx, int reg) 62 { 63 return ctx->b2p[reg]; 64 } 65 66 /* PPC NVR range -- update this if we ever use NVRs below r17 */ 67 #define BPF_PPC_NVR_MIN 17 68 #define BPF_PPC_TC 16 69 70 static int bpf_jit_stack_offsetof(struct codegen_context *ctx, int reg) 71 { 72 if ((reg >= BPF_PPC_NVR_MIN && reg < 32) || reg == BPF_PPC_TC) 73 return BPF_PPC_STACKFRAME(ctx) - 4 * (32 - reg); 74 75 WARN(true, "BPF JIT is asking about unknown registers, will crash the stack"); 76 /* Use the hole we have left for alignment */ 77 return BPF_PPC_STACKFRAME(ctx) - 4; 78 } 79 80 void bpf_jit_realloc_regs(struct codegen_context *ctx) 81 { 82 if (ctx->seen & SEEN_FUNC) 83 return; 84 85 while (ctx->seen & SEEN_NVREG_MASK && 86 (ctx->seen & SEEN_VREG_MASK) != SEEN_VREG_MASK) { 87 int old = 32 - fls(ctx->seen & (SEEN_NVREG_MASK & 0xaaaaaaab)); 88 int new = 32 - fls(~ctx->seen & (SEEN_VREG_MASK & 0xaaaaaaaa)); 89 int i; 90 91 for (i = BPF_REG_0; i <= TMP_REG; i++) { 92 if (ctx->b2p[i] != old) 93 continue; 94 ctx->b2p[i] = new; 95 bpf_set_seen_register(ctx, new); 96 bpf_clear_seen_register(ctx, old); 97 if (i != TMP_REG) { 98 bpf_set_seen_register(ctx, new - 1); 99 bpf_clear_seen_register(ctx, old - 1); 100 } 101 break; 102 } 103 } 104 } 105 106 void bpf_jit_build_prologue(u32 *image, struct codegen_context *ctx) 107 { 108 int i; 109 110 /* First arg comes in as a 32 bits pointer. */ 111 EMIT(PPC_RAW_MR(bpf_to_ppc(ctx, BPF_REG_1), __REG_R3)); 112 EMIT(PPC_RAW_LI(bpf_to_ppc(ctx, BPF_REG_1) - 1, 0)); 113 EMIT(PPC_RAW_STWU(__REG_R1, __REG_R1, -BPF_PPC_STACKFRAME(ctx))); 114 115 /* 116 * Initialize tail_call_cnt in stack frame if we do tail calls. 117 * Otherwise, put in NOPs so that it can be skipped when we are 118 * invoked through a tail call. 119 */ 120 if (ctx->seen & SEEN_TAILCALL) { 121 EMIT(PPC_RAW_STW(bpf_to_ppc(ctx, BPF_REG_1) - 1, __REG_R1, bpf_jit_stack_offsetof(ctx, BPF_PPC_TC))); 122 } else { 123 EMIT(PPC_RAW_NOP()); 124 } 125 126 #define BPF_TAILCALL_PROLOGUE_SIZE 16 127 128 /* 129 * We need a stack frame, but we don't necessarily need to 130 * save/restore LR unless we call other functions 131 */ 132 if (ctx->seen & SEEN_FUNC) 133 EMIT(PPC_RAW_MFLR(__REG_R0)); 134 135 /* 136 * Back up non-volatile regs -- registers r18-r31 137 */ 138 for (i = BPF_PPC_NVR_MIN; i <= 31; i++) 139 if (bpf_is_seen_register(ctx, i)) 140 EMIT(PPC_RAW_STW(i, __REG_R1, bpf_jit_stack_offsetof(ctx, i))); 141 142 /* If needed retrieve arguments 9 and 10, ie 5th 64 bits arg.*/ 143 if (bpf_is_seen_register(ctx, bpf_to_ppc(ctx, BPF_REG_5))) { 144 EMIT(PPC_RAW_LWZ(bpf_to_ppc(ctx, BPF_REG_5) - 1, __REG_R1, BPF_PPC_STACKFRAME(ctx)) + 8); 145 EMIT(PPC_RAW_LWZ(bpf_to_ppc(ctx, BPF_REG_5), __REG_R1, BPF_PPC_STACKFRAME(ctx)) + 12); 146 } 147 148 /* Setup frame pointer to point to the bpf stack area */ 149 if (bpf_is_seen_register(ctx, bpf_to_ppc(ctx, BPF_REG_FP))) { 150 EMIT(PPC_RAW_LI(bpf_to_ppc(ctx, BPF_REG_FP) - 1, 0)); 151 EMIT(PPC_RAW_ADDI(bpf_to_ppc(ctx, BPF_REG_FP), __REG_R1, 152 STACK_FRAME_MIN_SIZE + ctx->stack_size)); 153 } 154 155 if (ctx->seen & SEEN_FUNC) 156 EMIT(PPC_RAW_STW(__REG_R0, __REG_R1, BPF_PPC_STACKFRAME(ctx) + PPC_LR_STKOFF)); 157 } 158 159 static void bpf_jit_emit_common_epilogue(u32 *image, struct codegen_context *ctx) 160 { 161 int i; 162 163 /* Restore NVRs */ 164 for (i = BPF_PPC_NVR_MIN; i <= 31; i++) 165 if (bpf_is_seen_register(ctx, i)) 166 EMIT(PPC_RAW_LWZ(i, __REG_R1, bpf_jit_stack_offsetof(ctx, i))); 167 } 168 169 void bpf_jit_build_epilogue(u32 *image, struct codegen_context *ctx) 170 { 171 EMIT(PPC_RAW_MR(__REG_R3, bpf_to_ppc(ctx, BPF_REG_0))); 172 173 bpf_jit_emit_common_epilogue(image, ctx); 174 175 /* Tear down our stack frame */ 176 177 if (ctx->seen & SEEN_FUNC) 178 EMIT(PPC_RAW_LWZ(__REG_R0, __REG_R1, BPF_PPC_STACKFRAME(ctx) + PPC_LR_STKOFF)); 179 180 EMIT(PPC_RAW_ADDI(__REG_R1, __REG_R1, BPF_PPC_STACKFRAME(ctx))); 181 182 if (ctx->seen & SEEN_FUNC) 183 EMIT(PPC_RAW_MTLR(__REG_R0)); 184 185 EMIT(PPC_RAW_BLR()); 186 } 187 188 void bpf_jit_emit_func_call_rel(u32 *image, struct codegen_context *ctx, u64 func) 189 { 190 /* Load function address into r0 */ 191 EMIT(PPC_RAW_LIS(__REG_R0, IMM_H(func))); 192 EMIT(PPC_RAW_ORI(__REG_R0, __REG_R0, IMM_L(func))); 193 EMIT(PPC_RAW_MTLR(__REG_R0)); 194 EMIT(PPC_RAW_BLRL()); 195 } 196 197 static void bpf_jit_emit_tail_call(u32 *image, struct codegen_context *ctx, u32 out) 198 { 199 /* 200 * By now, the eBPF program has already setup parameters in r3-r6 201 * r3-r4/BPF_REG_1 - pointer to ctx -- passed as is to the next bpf program 202 * r5-r6/BPF_REG_2 - pointer to bpf_array 203 * r7-r8/BPF_REG_3 - index in bpf_array 204 */ 205 int b2p_bpf_array = bpf_to_ppc(ctx, BPF_REG_2); 206 int b2p_index = bpf_to_ppc(ctx, BPF_REG_3); 207 208 /* 209 * if (index >= array->map.max_entries) 210 * goto out; 211 */ 212 EMIT(PPC_RAW_LWZ(__REG_R0, b2p_bpf_array, offsetof(struct bpf_array, map.max_entries))); 213 EMIT(PPC_RAW_CMPLW(b2p_index, __REG_R0)); 214 EMIT(PPC_RAW_LWZ(__REG_R0, __REG_R1, bpf_jit_stack_offsetof(ctx, BPF_PPC_TC))); 215 PPC_BCC(COND_GE, out); 216 217 /* 218 * if (tail_call_cnt > MAX_TAIL_CALL_CNT) 219 * goto out; 220 */ 221 EMIT(PPC_RAW_CMPLWI(__REG_R0, MAX_TAIL_CALL_CNT)); 222 /* tail_call_cnt++; */ 223 EMIT(PPC_RAW_ADDIC(__REG_R0, __REG_R0, 1)); 224 PPC_BCC(COND_GT, out); 225 226 /* prog = array->ptrs[index]; */ 227 EMIT(PPC_RAW_RLWINM(__REG_R3, b2p_index, 2, 0, 29)); 228 EMIT(PPC_RAW_ADD(__REG_R3, __REG_R3, b2p_bpf_array)); 229 EMIT(PPC_RAW_LWZ(__REG_R3, __REG_R3, offsetof(struct bpf_array, ptrs))); 230 EMIT(PPC_RAW_STW(__REG_R0, __REG_R1, bpf_jit_stack_offsetof(ctx, BPF_PPC_TC))); 231 232 /* 233 * if (prog == NULL) 234 * goto out; 235 */ 236 EMIT(PPC_RAW_CMPLWI(__REG_R3, 0)); 237 PPC_BCC(COND_EQ, out); 238 239 /* goto *(prog->bpf_func + prologue_size); */ 240 EMIT(PPC_RAW_LWZ(__REG_R3, __REG_R3, offsetof(struct bpf_prog, bpf_func))); 241 242 if (ctx->seen & SEEN_FUNC) 243 EMIT(PPC_RAW_LWZ(__REG_R0, __REG_R1, BPF_PPC_STACKFRAME(ctx) + PPC_LR_STKOFF)); 244 245 EMIT(PPC_RAW_ADDIC(__REG_R3, __REG_R3, BPF_TAILCALL_PROLOGUE_SIZE)); 246 247 if (ctx->seen & SEEN_FUNC) 248 EMIT(PPC_RAW_MTLR(__REG_R0)); 249 250 EMIT(PPC_RAW_MTCTR(__REG_R3)); 251 252 EMIT(PPC_RAW_MR(__REG_R3, bpf_to_ppc(ctx, BPF_REG_1))); 253 254 /* tear restore NVRs, ... */ 255 bpf_jit_emit_common_epilogue(image, ctx); 256 257 EMIT(PPC_RAW_BCTR()); 258 /* out: */ 259 } 260 261 /* Assemble the body code between the prologue & epilogue */ 262 int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, struct codegen_context *ctx, 263 u32 *addrs, bool extra_pass) 264 { 265 const struct bpf_insn *insn = fp->insnsi; 266 int flen = fp->len; 267 int i, ret; 268 269 /* Start of epilogue code - will only be valid 2nd pass onwards */ 270 u32 exit_addr = addrs[flen]; 271 272 for (i = 0; i < flen; i++) { 273 u32 code = insn[i].code; 274 u32 dst_reg = bpf_to_ppc(ctx, insn[i].dst_reg); 275 u32 dst_reg_h = dst_reg - 1; 276 u32 src_reg = bpf_to_ppc(ctx, insn[i].src_reg); 277 u32 src_reg_h = src_reg - 1; 278 u32 tmp_reg = bpf_to_ppc(ctx, TMP_REG); 279 s16 off = insn[i].off; 280 s32 imm = insn[i].imm; 281 bool func_addr_fixed; 282 u64 func_addr; 283 u32 true_cond; 284 285 /* 286 * addrs[] maps a BPF bytecode address into a real offset from 287 * the start of the body code. 288 */ 289 addrs[i] = ctx->idx * 4; 290 291 /* 292 * As an optimization, we note down which registers 293 * are used so that we can only save/restore those in our 294 * prologue and epilogue. We do this here regardless of whether 295 * the actual BPF instruction uses src/dst registers or not 296 * (for instance, BPF_CALL does not use them). The expectation 297 * is that those instructions will have src_reg/dst_reg set to 298 * 0. Even otherwise, we just lose some prologue/epilogue 299 * optimization but everything else should work without 300 * any issues. 301 */ 302 if (dst_reg >= 3 && dst_reg < 32) { 303 bpf_set_seen_register(ctx, dst_reg); 304 bpf_set_seen_register(ctx, dst_reg_h); 305 } 306 307 if (src_reg >= 3 && src_reg < 32) { 308 bpf_set_seen_register(ctx, src_reg); 309 bpf_set_seen_register(ctx, src_reg_h); 310 } 311 312 switch (code) { 313 /* 314 * Arithmetic operations: ADD/SUB/MUL/DIV/MOD/NEG 315 */ 316 case BPF_ALU | BPF_ADD | BPF_X: /* (u32) dst += (u32) src */ 317 EMIT(PPC_RAW_ADD(dst_reg, dst_reg, src_reg)); 318 break; 319 case BPF_ALU64 | BPF_ADD | BPF_X: /* dst += src */ 320 EMIT(PPC_RAW_ADDC(dst_reg, dst_reg, src_reg)); 321 EMIT(PPC_RAW_ADDE(dst_reg_h, dst_reg_h, src_reg_h)); 322 break; 323 case BPF_ALU | BPF_SUB | BPF_X: /* (u32) dst -= (u32) src */ 324 EMIT(PPC_RAW_SUB(dst_reg, dst_reg, src_reg)); 325 break; 326 case BPF_ALU64 | BPF_SUB | BPF_X: /* dst -= src */ 327 EMIT(PPC_RAW_SUBFC(dst_reg, src_reg, dst_reg)); 328 EMIT(PPC_RAW_SUBFE(dst_reg_h, src_reg_h, dst_reg_h)); 329 break; 330 case BPF_ALU | BPF_SUB | BPF_K: /* (u32) dst -= (u32) imm */ 331 imm = -imm; 332 fallthrough; 333 case BPF_ALU | BPF_ADD | BPF_K: /* (u32) dst += (u32) imm */ 334 if (IMM_HA(imm) & 0xffff) 335 EMIT(PPC_RAW_ADDIS(dst_reg, dst_reg, IMM_HA(imm))); 336 if (IMM_L(imm)) 337 EMIT(PPC_RAW_ADDI(dst_reg, dst_reg, IMM_L(imm))); 338 break; 339 case BPF_ALU64 | BPF_SUB | BPF_K: /* dst -= imm */ 340 imm = -imm; 341 fallthrough; 342 case BPF_ALU64 | BPF_ADD | BPF_K: /* dst += imm */ 343 if (!imm) 344 break; 345 346 if (imm >= -32768 && imm < 32768) { 347 EMIT(PPC_RAW_ADDIC(dst_reg, dst_reg, imm)); 348 } else { 349 PPC_LI32(__REG_R0, imm); 350 EMIT(PPC_RAW_ADDC(dst_reg, dst_reg, __REG_R0)); 351 } 352 if (imm >= 0) 353 EMIT(PPC_RAW_ADDZE(dst_reg_h, dst_reg_h)); 354 else 355 EMIT(PPC_RAW_ADDME(dst_reg_h, dst_reg_h)); 356 break; 357 case BPF_ALU64 | BPF_MUL | BPF_X: /* dst *= src */ 358 bpf_set_seen_register(ctx, tmp_reg); 359 EMIT(PPC_RAW_MULW(__REG_R0, dst_reg, src_reg_h)); 360 EMIT(PPC_RAW_MULW(dst_reg_h, dst_reg_h, src_reg)); 361 EMIT(PPC_RAW_MULHWU(tmp_reg, dst_reg, src_reg)); 362 EMIT(PPC_RAW_MULW(dst_reg, dst_reg, src_reg)); 363 EMIT(PPC_RAW_ADD(dst_reg_h, dst_reg_h, __REG_R0)); 364 EMIT(PPC_RAW_ADD(dst_reg_h, dst_reg_h, tmp_reg)); 365 break; 366 case BPF_ALU | BPF_MUL | BPF_X: /* (u32) dst *= (u32) src */ 367 EMIT(PPC_RAW_MULW(dst_reg, dst_reg, src_reg)); 368 break; 369 case BPF_ALU | BPF_MUL | BPF_K: /* (u32) dst *= (u32) imm */ 370 if (imm >= -32768 && imm < 32768) { 371 EMIT(PPC_RAW_MULI(dst_reg, dst_reg, imm)); 372 } else { 373 PPC_LI32(__REG_R0, imm); 374 EMIT(PPC_RAW_MULW(dst_reg, dst_reg, __REG_R0)); 375 } 376 break; 377 case BPF_ALU64 | BPF_MUL | BPF_K: /* dst *= imm */ 378 if (!imm) { 379 PPC_LI32(dst_reg, 0); 380 PPC_LI32(dst_reg_h, 0); 381 break; 382 } 383 if (imm == 1) 384 break; 385 if (imm == -1) { 386 EMIT(PPC_RAW_SUBFIC(dst_reg, dst_reg, 0)); 387 EMIT(PPC_RAW_SUBFZE(dst_reg_h, dst_reg_h)); 388 break; 389 } 390 bpf_set_seen_register(ctx, tmp_reg); 391 PPC_LI32(tmp_reg, imm); 392 EMIT(PPC_RAW_MULW(dst_reg_h, dst_reg_h, tmp_reg)); 393 if (imm < 0) 394 EMIT(PPC_RAW_SUB(dst_reg_h, dst_reg_h, dst_reg)); 395 EMIT(PPC_RAW_MULHWU(__REG_R0, dst_reg, tmp_reg)); 396 EMIT(PPC_RAW_MULW(dst_reg, dst_reg, tmp_reg)); 397 EMIT(PPC_RAW_ADD(dst_reg_h, dst_reg_h, __REG_R0)); 398 break; 399 case BPF_ALU | BPF_DIV | BPF_X: /* (u32) dst /= (u32) src */ 400 EMIT(PPC_RAW_DIVWU(dst_reg, dst_reg, src_reg)); 401 break; 402 case BPF_ALU | BPF_MOD | BPF_X: /* (u32) dst %= (u32) src */ 403 EMIT(PPC_RAW_DIVWU(__REG_R0, dst_reg, src_reg)); 404 EMIT(PPC_RAW_MULW(__REG_R0, src_reg, __REG_R0)); 405 EMIT(PPC_RAW_SUB(dst_reg, dst_reg, __REG_R0)); 406 break; 407 case BPF_ALU64 | BPF_DIV | BPF_X: /* dst /= src */ 408 return -EOPNOTSUPP; 409 case BPF_ALU64 | BPF_MOD | BPF_X: /* dst %= src */ 410 return -EOPNOTSUPP; 411 case BPF_ALU | BPF_DIV | BPF_K: /* (u32) dst /= (u32) imm */ 412 if (!imm) 413 return -EINVAL; 414 if (imm == 1) 415 break; 416 417 PPC_LI32(__REG_R0, imm); 418 EMIT(PPC_RAW_DIVWU(dst_reg, dst_reg, __REG_R0)); 419 break; 420 case BPF_ALU | BPF_MOD | BPF_K: /* (u32) dst %= (u32) imm */ 421 if (!imm) 422 return -EINVAL; 423 424 if (!is_power_of_2((u32)imm)) { 425 bpf_set_seen_register(ctx, tmp_reg); 426 PPC_LI32(tmp_reg, imm); 427 EMIT(PPC_RAW_DIVWU(__REG_R0, dst_reg, tmp_reg)); 428 EMIT(PPC_RAW_MULW(__REG_R0, tmp_reg, __REG_R0)); 429 EMIT(PPC_RAW_SUB(dst_reg, dst_reg, __REG_R0)); 430 break; 431 } 432 if (imm == 1) 433 EMIT(PPC_RAW_LI(dst_reg, 0)); 434 else 435 EMIT(PPC_RAW_RLWINM(dst_reg, dst_reg, 0, 32 - ilog2((u32)imm), 31)); 436 437 break; 438 case BPF_ALU64 | BPF_MOD | BPF_K: /* dst %= imm */ 439 if (!imm) 440 return -EINVAL; 441 if (imm < 0) 442 imm = -imm; 443 if (!is_power_of_2(imm)) 444 return -EOPNOTSUPP; 445 if (imm == 1) 446 EMIT(PPC_RAW_LI(dst_reg, 0)); 447 else 448 EMIT(PPC_RAW_RLWINM(dst_reg, dst_reg, 0, 32 - ilog2(imm), 31)); 449 EMIT(PPC_RAW_LI(dst_reg_h, 0)); 450 break; 451 case BPF_ALU64 | BPF_DIV | BPF_K: /* dst /= imm */ 452 if (!imm) 453 return -EINVAL; 454 if (!is_power_of_2(abs(imm))) 455 return -EOPNOTSUPP; 456 457 if (imm < 0) { 458 EMIT(PPC_RAW_SUBFIC(dst_reg, dst_reg, 0)); 459 EMIT(PPC_RAW_SUBFZE(dst_reg_h, dst_reg_h)); 460 imm = -imm; 461 } 462 if (imm == 1) 463 break; 464 imm = ilog2(imm); 465 EMIT(PPC_RAW_RLWINM(dst_reg, dst_reg, 32 - imm, imm, 31)); 466 EMIT(PPC_RAW_RLWIMI(dst_reg, dst_reg_h, 32 - imm, 0, imm - 1)); 467 EMIT(PPC_RAW_SRAWI(dst_reg_h, dst_reg_h, imm)); 468 break; 469 case BPF_ALU | BPF_NEG: /* (u32) dst = -dst */ 470 EMIT(PPC_RAW_NEG(dst_reg, dst_reg)); 471 break; 472 case BPF_ALU64 | BPF_NEG: /* dst = -dst */ 473 EMIT(PPC_RAW_SUBFIC(dst_reg, dst_reg, 0)); 474 EMIT(PPC_RAW_SUBFZE(dst_reg_h, dst_reg_h)); 475 break; 476 477 /* 478 * Logical operations: AND/OR/XOR/[A]LSH/[A]RSH 479 */ 480 case BPF_ALU64 | BPF_AND | BPF_X: /* dst = dst & src */ 481 EMIT(PPC_RAW_AND(dst_reg, dst_reg, src_reg)); 482 EMIT(PPC_RAW_AND(dst_reg_h, dst_reg_h, src_reg_h)); 483 break; 484 case BPF_ALU | BPF_AND | BPF_X: /* (u32) dst = dst & src */ 485 EMIT(PPC_RAW_AND(dst_reg, dst_reg, src_reg)); 486 break; 487 case BPF_ALU64 | BPF_AND | BPF_K: /* dst = dst & imm */ 488 if (imm >= 0) 489 EMIT(PPC_RAW_LI(dst_reg_h, 0)); 490 fallthrough; 491 case BPF_ALU | BPF_AND | BPF_K: /* (u32) dst = dst & imm */ 492 if (!IMM_H(imm)) { 493 EMIT(PPC_RAW_ANDI(dst_reg, dst_reg, IMM_L(imm))); 494 } else if (!IMM_L(imm)) { 495 EMIT(PPC_RAW_ANDIS(dst_reg, dst_reg, IMM_H(imm))); 496 } else if (imm == (((1 << fls(imm)) - 1) ^ ((1 << (ffs(i) - 1)) - 1))) { 497 EMIT(PPC_RAW_RLWINM(dst_reg, dst_reg, 0, 498 32 - fls(imm), 32 - ffs(imm))); 499 } else { 500 PPC_LI32(__REG_R0, imm); 501 EMIT(PPC_RAW_AND(dst_reg, dst_reg, __REG_R0)); 502 } 503 break; 504 case BPF_ALU64 | BPF_OR | BPF_X: /* dst = dst | src */ 505 EMIT(PPC_RAW_OR(dst_reg, dst_reg, src_reg)); 506 EMIT(PPC_RAW_OR(dst_reg_h, dst_reg_h, src_reg_h)); 507 break; 508 case BPF_ALU | BPF_OR | BPF_X: /* dst = (u32) dst | (u32) src */ 509 EMIT(PPC_RAW_OR(dst_reg, dst_reg, src_reg)); 510 break; 511 case BPF_ALU64 | BPF_OR | BPF_K:/* dst = dst | imm */ 512 /* Sign-extended */ 513 if (imm < 0) 514 EMIT(PPC_RAW_LI(dst_reg_h, -1)); 515 fallthrough; 516 case BPF_ALU | BPF_OR | BPF_K:/* dst = (u32) dst | (u32) imm */ 517 if (IMM_L(imm)) 518 EMIT(PPC_RAW_ORI(dst_reg, dst_reg, IMM_L(imm))); 519 if (IMM_H(imm)) 520 EMIT(PPC_RAW_ORIS(dst_reg, dst_reg, IMM_H(imm))); 521 break; 522 case BPF_ALU64 | BPF_XOR | BPF_X: /* dst ^= src */ 523 if (dst_reg == src_reg) { 524 EMIT(PPC_RAW_LI(dst_reg, 0)); 525 EMIT(PPC_RAW_LI(dst_reg_h, 0)); 526 } else { 527 EMIT(PPC_RAW_XOR(dst_reg, dst_reg, src_reg)); 528 EMIT(PPC_RAW_XOR(dst_reg_h, dst_reg_h, src_reg_h)); 529 } 530 break; 531 case BPF_ALU | BPF_XOR | BPF_X: /* (u32) dst ^= src */ 532 if (dst_reg == src_reg) 533 EMIT(PPC_RAW_LI(dst_reg, 0)); 534 else 535 EMIT(PPC_RAW_XOR(dst_reg, dst_reg, src_reg)); 536 break; 537 case BPF_ALU64 | BPF_XOR | BPF_K: /* dst ^= imm */ 538 if (imm < 0) 539 EMIT(PPC_RAW_NOR(dst_reg_h, dst_reg_h, dst_reg_h)); 540 fallthrough; 541 case BPF_ALU | BPF_XOR | BPF_K: /* (u32) dst ^= (u32) imm */ 542 if (IMM_L(imm)) 543 EMIT(PPC_RAW_XORI(dst_reg, dst_reg, IMM_L(imm))); 544 if (IMM_H(imm)) 545 EMIT(PPC_RAW_XORIS(dst_reg, dst_reg, IMM_H(imm))); 546 break; 547 case BPF_ALU | BPF_LSH | BPF_X: /* (u32) dst <<= (u32) src */ 548 EMIT(PPC_RAW_SLW(dst_reg, dst_reg, src_reg)); 549 break; 550 case BPF_ALU64 | BPF_LSH | BPF_X: /* dst <<= src; */ 551 EMIT(PPC_RAW_ADDIC_DOT(__REG_R0, src_reg, -32)); 552 PPC_BCC_SHORT(COND_LT, (ctx->idx + 4) * 4); 553 EMIT(PPC_RAW_SLW(dst_reg_h, dst_reg, __REG_R0)); 554 EMIT(PPC_RAW_LI(dst_reg, 0)); 555 PPC_JMP((ctx->idx + 6) * 4); 556 EMIT(PPC_RAW_SUBFIC(__REG_R0, src_reg, 32)); 557 EMIT(PPC_RAW_SLW(dst_reg_h, dst_reg_h, src_reg)); 558 EMIT(PPC_RAW_SRW(__REG_R0, dst_reg, __REG_R0)); 559 EMIT(PPC_RAW_SLW(dst_reg, dst_reg, src_reg)); 560 EMIT(PPC_RAW_OR(dst_reg_h, dst_reg_h, __REG_R0)); 561 break; 562 case BPF_ALU | BPF_LSH | BPF_K: /* (u32) dst <<== (u32) imm */ 563 if (!imm) 564 break; 565 EMIT(PPC_RAW_SLWI(dst_reg, dst_reg, imm)); 566 break; 567 case BPF_ALU64 | BPF_LSH | BPF_K: /* dst <<== imm */ 568 if (imm < 0) 569 return -EINVAL; 570 if (!imm) 571 break; 572 if (imm < 32) { 573 EMIT(PPC_RAW_RLWINM(dst_reg_h, dst_reg_h, imm, 0, 31 - imm)); 574 EMIT(PPC_RAW_RLWIMI(dst_reg_h, dst_reg, imm, 32 - imm, 31)); 575 EMIT(PPC_RAW_RLWINM(dst_reg, dst_reg, imm, 0, 31 - imm)); 576 break; 577 } 578 if (imm < 64) 579 EMIT(PPC_RAW_RLWINM(dst_reg_h, dst_reg, imm, 0, 31 - imm)); 580 else 581 EMIT(PPC_RAW_LI(dst_reg_h, 0)); 582 EMIT(PPC_RAW_LI(dst_reg, 0)); 583 break; 584 case BPF_ALU | BPF_RSH | BPF_X: /* (u32) dst >>= (u32) src */ 585 EMIT(PPC_RAW_SRW(dst_reg, dst_reg, src_reg)); 586 break; 587 case BPF_ALU64 | BPF_RSH | BPF_X: /* dst >>= src */ 588 EMIT(PPC_RAW_ADDIC_DOT(__REG_R0, src_reg, -32)); 589 PPC_BCC_SHORT(COND_LT, (ctx->idx + 4) * 4); 590 EMIT(PPC_RAW_SRW(dst_reg, dst_reg_h, __REG_R0)); 591 EMIT(PPC_RAW_LI(dst_reg_h, 0)); 592 PPC_JMP((ctx->idx + 6) * 4); 593 EMIT(PPC_RAW_SUBFIC(0, src_reg, 32)); 594 EMIT(PPC_RAW_SRW(dst_reg, dst_reg, src_reg)); 595 EMIT(PPC_RAW_SLW(__REG_R0, dst_reg_h, __REG_R0)); 596 EMIT(PPC_RAW_SRW(dst_reg_h, dst_reg_h, src_reg)); 597 EMIT(PPC_RAW_OR(dst_reg, dst_reg, __REG_R0)); 598 break; 599 case BPF_ALU | BPF_RSH | BPF_K: /* (u32) dst >>= (u32) imm */ 600 if (!imm) 601 break; 602 EMIT(PPC_RAW_SRWI(dst_reg, dst_reg, imm)); 603 break; 604 case BPF_ALU64 | BPF_RSH | BPF_K: /* dst >>= imm */ 605 if (imm < 0) 606 return -EINVAL; 607 if (!imm) 608 break; 609 if (imm < 32) { 610 EMIT(PPC_RAW_RLWINM(dst_reg, dst_reg, 32 - imm, imm, 31)); 611 EMIT(PPC_RAW_RLWIMI(dst_reg, dst_reg_h, 32 - imm, 0, imm - 1)); 612 EMIT(PPC_RAW_RLWINM(dst_reg_h, dst_reg_h, 32 - imm, imm, 31)); 613 break; 614 } 615 if (imm < 64) 616 EMIT(PPC_RAW_RLWINM(dst_reg, dst_reg_h, 64 - imm, imm - 32, 31)); 617 else 618 EMIT(PPC_RAW_LI(dst_reg, 0)); 619 EMIT(PPC_RAW_LI(dst_reg_h, 0)); 620 break; 621 case BPF_ALU | BPF_ARSH | BPF_X: /* (s32) dst >>= src */ 622 EMIT(PPC_RAW_SRAW(dst_reg_h, dst_reg, src_reg)); 623 break; 624 case BPF_ALU64 | BPF_ARSH | BPF_X: /* (s64) dst >>= src */ 625 EMIT(PPC_RAW_ADDIC_DOT(__REG_R0, src_reg, -32)); 626 PPC_BCC_SHORT(COND_LT, (ctx->idx + 4) * 4); 627 EMIT(PPC_RAW_SRAW(dst_reg, dst_reg_h, __REG_R0)); 628 EMIT(PPC_RAW_SRAWI(dst_reg_h, dst_reg_h, 31)); 629 PPC_JMP((ctx->idx + 6) * 4); 630 EMIT(PPC_RAW_SUBFIC(0, src_reg, 32)); 631 EMIT(PPC_RAW_SRW(dst_reg, dst_reg, src_reg)); 632 EMIT(PPC_RAW_SLW(__REG_R0, dst_reg_h, __REG_R0)); 633 EMIT(PPC_RAW_SRAW(dst_reg_h, dst_reg_h, src_reg)); 634 EMIT(PPC_RAW_OR(dst_reg, dst_reg, __REG_R0)); 635 break; 636 case BPF_ALU | BPF_ARSH | BPF_K: /* (s32) dst >>= imm */ 637 if (!imm) 638 break; 639 EMIT(PPC_RAW_SRAWI(dst_reg, dst_reg, imm)); 640 break; 641 case BPF_ALU64 | BPF_ARSH | BPF_K: /* (s64) dst >>= imm */ 642 if (imm < 0) 643 return -EINVAL; 644 if (!imm) 645 break; 646 if (imm < 32) { 647 EMIT(PPC_RAW_RLWINM(dst_reg, dst_reg, 32 - imm, imm, 31)); 648 EMIT(PPC_RAW_RLWIMI(dst_reg, dst_reg_h, 32 - imm, 0, imm - 1)); 649 EMIT(PPC_RAW_SRAWI(dst_reg_h, dst_reg_h, imm)); 650 break; 651 } 652 if (imm < 64) 653 EMIT(PPC_RAW_SRAWI(dst_reg, dst_reg_h, imm - 32)); 654 else 655 EMIT(PPC_RAW_SRAWI(dst_reg, dst_reg_h, 31)); 656 EMIT(PPC_RAW_SRAWI(dst_reg_h, dst_reg_h, 31)); 657 break; 658 659 /* 660 * MOV 661 */ 662 case BPF_ALU64 | BPF_MOV | BPF_X: /* dst = src */ 663 if (dst_reg == src_reg) 664 break; 665 EMIT(PPC_RAW_MR(dst_reg, src_reg)); 666 EMIT(PPC_RAW_MR(dst_reg_h, src_reg_h)); 667 break; 668 case BPF_ALU | BPF_MOV | BPF_X: /* (u32) dst = src */ 669 /* special mov32 for zext */ 670 if (imm == 1) 671 EMIT(PPC_RAW_LI(dst_reg_h, 0)); 672 else if (dst_reg != src_reg) 673 EMIT(PPC_RAW_MR(dst_reg, src_reg)); 674 break; 675 case BPF_ALU64 | BPF_MOV | BPF_K: /* dst = (s64) imm */ 676 PPC_LI32(dst_reg, imm); 677 PPC_EX32(dst_reg_h, imm); 678 break; 679 case BPF_ALU | BPF_MOV | BPF_K: /* (u32) dst = imm */ 680 PPC_LI32(dst_reg, imm); 681 break; 682 683 /* 684 * BPF_FROM_BE/LE 685 */ 686 case BPF_ALU | BPF_END | BPF_FROM_LE: 687 switch (imm) { 688 case 16: 689 /* Copy 16 bits to upper part */ 690 EMIT(PPC_RAW_RLWIMI(dst_reg, dst_reg, 16, 0, 15)); 691 /* Rotate 8 bits right & mask */ 692 EMIT(PPC_RAW_RLWINM(dst_reg, dst_reg, 24, 16, 31)); 693 break; 694 case 32: 695 /* 696 * Rotate word left by 8 bits: 697 * 2 bytes are already in their final position 698 * -- byte 2 and 4 (of bytes 1, 2, 3 and 4) 699 */ 700 EMIT(PPC_RAW_RLWINM(__REG_R0, dst_reg, 8, 0, 31)); 701 /* Rotate 24 bits and insert byte 1 */ 702 EMIT(PPC_RAW_RLWIMI(__REG_R0, dst_reg, 24, 0, 7)); 703 /* Rotate 24 bits and insert byte 3 */ 704 EMIT(PPC_RAW_RLWIMI(__REG_R0, dst_reg, 24, 16, 23)); 705 EMIT(PPC_RAW_MR(dst_reg, __REG_R0)); 706 break; 707 case 64: 708 bpf_set_seen_register(ctx, tmp_reg); 709 EMIT(PPC_RAW_RLWINM(tmp_reg, dst_reg, 8, 0, 31)); 710 EMIT(PPC_RAW_RLWINM(__REG_R0, dst_reg_h, 8, 0, 31)); 711 /* Rotate 24 bits and insert byte 1 */ 712 EMIT(PPC_RAW_RLWIMI(tmp_reg, dst_reg, 24, 0, 7)); 713 EMIT(PPC_RAW_RLWIMI(__REG_R0, dst_reg_h, 24, 0, 7)); 714 /* Rotate 24 bits and insert byte 3 */ 715 EMIT(PPC_RAW_RLWIMI(tmp_reg, dst_reg, 24, 16, 23)); 716 EMIT(PPC_RAW_RLWIMI(__REG_R0, dst_reg_h, 24, 16, 23)); 717 EMIT(PPC_RAW_MR(dst_reg, __REG_R0)); 718 EMIT(PPC_RAW_MR(dst_reg_h, tmp_reg)); 719 break; 720 } 721 break; 722 case BPF_ALU | BPF_END | BPF_FROM_BE: 723 switch (imm) { 724 case 16: 725 /* zero-extend 16 bits into 32 bits */ 726 EMIT(PPC_RAW_RLWINM(dst_reg, dst_reg, 0, 16, 31)); 727 break; 728 case 32: 729 case 64: 730 /* nop */ 731 break; 732 } 733 break; 734 735 /* 736 * BPF_ST(X) 737 */ 738 case BPF_STX | BPF_MEM | BPF_B: /* *(u8 *)(dst + off) = src */ 739 EMIT(PPC_RAW_STB(src_reg, dst_reg, off)); 740 break; 741 case BPF_ST | BPF_MEM | BPF_B: /* *(u8 *)(dst + off) = imm */ 742 PPC_LI32(__REG_R0, imm); 743 EMIT(PPC_RAW_STB(__REG_R0, dst_reg, off)); 744 break; 745 case BPF_STX | BPF_MEM | BPF_H: /* (u16 *)(dst + off) = src */ 746 EMIT(PPC_RAW_STH(src_reg, dst_reg, off)); 747 break; 748 case BPF_ST | BPF_MEM | BPF_H: /* (u16 *)(dst + off) = imm */ 749 PPC_LI32(__REG_R0, imm); 750 EMIT(PPC_RAW_STH(__REG_R0, dst_reg, off)); 751 break; 752 case BPF_STX | BPF_MEM | BPF_W: /* *(u32 *)(dst + off) = src */ 753 EMIT(PPC_RAW_STW(src_reg, dst_reg, off)); 754 break; 755 case BPF_ST | BPF_MEM | BPF_W: /* *(u32 *)(dst + off) = imm */ 756 PPC_LI32(__REG_R0, imm); 757 EMIT(PPC_RAW_STW(__REG_R0, dst_reg, off)); 758 break; 759 case BPF_STX | BPF_MEM | BPF_DW: /* (u64 *)(dst + off) = src */ 760 EMIT(PPC_RAW_STW(src_reg_h, dst_reg, off)); 761 EMIT(PPC_RAW_STW(src_reg, dst_reg, off + 4)); 762 break; 763 case BPF_ST | BPF_MEM | BPF_DW: /* *(u64 *)(dst + off) = imm */ 764 PPC_LI32(__REG_R0, imm); 765 EMIT(PPC_RAW_STW(__REG_R0, dst_reg, off + 4)); 766 PPC_EX32(__REG_R0, imm); 767 EMIT(PPC_RAW_STW(__REG_R0, dst_reg, off)); 768 break; 769 770 /* 771 * BPF_STX XADD (atomic_add) 772 */ 773 case BPF_STX | BPF_XADD | BPF_W: /* *(u32 *)(dst + off) += src */ 774 bpf_set_seen_register(ctx, tmp_reg); 775 /* Get offset into TMP_REG */ 776 EMIT(PPC_RAW_LI(tmp_reg, off)); 777 /* load value from memory into r0 */ 778 EMIT(PPC_RAW_LWARX(__REG_R0, tmp_reg, dst_reg, 0)); 779 /* add value from src_reg into this */ 780 EMIT(PPC_RAW_ADD(__REG_R0, __REG_R0, src_reg)); 781 /* store result back */ 782 EMIT(PPC_RAW_STWCX(__REG_R0, tmp_reg, dst_reg)); 783 /* we're done if this succeeded */ 784 PPC_BCC_SHORT(COND_NE, (ctx->idx - 3) * 4); 785 break; 786 787 case BPF_STX | BPF_XADD | BPF_DW: /* *(u64 *)(dst + off) += src */ 788 return -EOPNOTSUPP; 789 790 /* 791 * BPF_LDX 792 */ 793 case BPF_LDX | BPF_MEM | BPF_B: /* dst = *(u8 *)(ul) (src + off) */ 794 EMIT(PPC_RAW_LBZ(dst_reg, src_reg, off)); 795 if (!fp->aux->verifier_zext) 796 EMIT(PPC_RAW_LI(dst_reg_h, 0)); 797 break; 798 case BPF_LDX | BPF_MEM | BPF_H: /* dst = *(u16 *)(ul) (src + off) */ 799 EMIT(PPC_RAW_LHZ(dst_reg, src_reg, off)); 800 if (!fp->aux->verifier_zext) 801 EMIT(PPC_RAW_LI(dst_reg_h, 0)); 802 break; 803 case BPF_LDX | BPF_MEM | BPF_W: /* dst = *(u32 *)(ul) (src + off) */ 804 EMIT(PPC_RAW_LWZ(dst_reg, src_reg, off)); 805 if (!fp->aux->verifier_zext) 806 EMIT(PPC_RAW_LI(dst_reg_h, 0)); 807 break; 808 case BPF_LDX | BPF_MEM | BPF_DW: /* dst = *(u64 *)(ul) (src + off) */ 809 EMIT(PPC_RAW_LWZ(dst_reg_h, src_reg, off)); 810 EMIT(PPC_RAW_LWZ(dst_reg, src_reg, off + 4)); 811 break; 812 813 /* 814 * Doubleword load 815 * 16 byte instruction that uses two 'struct bpf_insn' 816 */ 817 case BPF_LD | BPF_IMM | BPF_DW: /* dst = (u64) imm */ 818 PPC_LI32(dst_reg_h, (u32)insn[i + 1].imm); 819 PPC_LI32(dst_reg, (u32)insn[i].imm); 820 /* Adjust for two bpf instructions */ 821 addrs[++i] = ctx->idx * 4; 822 break; 823 824 /* 825 * Return/Exit 826 */ 827 case BPF_JMP | BPF_EXIT: 828 /* 829 * If this isn't the very last instruction, branch to 830 * the epilogue. If we _are_ the last instruction, 831 * we'll just fall through to the epilogue. 832 */ 833 if (i != flen - 1) 834 PPC_JMP(exit_addr); 835 /* else fall through to the epilogue */ 836 break; 837 838 /* 839 * Call kernel helper or bpf function 840 */ 841 case BPF_JMP | BPF_CALL: 842 ctx->seen |= SEEN_FUNC; 843 844 ret = bpf_jit_get_func_addr(fp, &insn[i], extra_pass, 845 &func_addr, &func_addr_fixed); 846 if (ret < 0) 847 return ret; 848 849 if (bpf_is_seen_register(ctx, bpf_to_ppc(ctx, BPF_REG_5))) { 850 EMIT(PPC_RAW_STW(bpf_to_ppc(ctx, BPF_REG_5) - 1, __REG_R1, 8)); 851 EMIT(PPC_RAW_STW(bpf_to_ppc(ctx, BPF_REG_5), __REG_R1, 12)); 852 } 853 854 bpf_jit_emit_func_call_rel(image, ctx, func_addr); 855 856 EMIT(PPC_RAW_MR(bpf_to_ppc(ctx, BPF_REG_0) - 1, __REG_R3)); 857 EMIT(PPC_RAW_MR(bpf_to_ppc(ctx, BPF_REG_0), __REG_R4)); 858 break; 859 860 /* 861 * Jumps and branches 862 */ 863 case BPF_JMP | BPF_JA: 864 PPC_JMP(addrs[i + 1 + off]); 865 break; 866 867 case BPF_JMP | BPF_JGT | BPF_K: 868 case BPF_JMP | BPF_JGT | BPF_X: 869 case BPF_JMP | BPF_JSGT | BPF_K: 870 case BPF_JMP | BPF_JSGT | BPF_X: 871 case BPF_JMP32 | BPF_JGT | BPF_K: 872 case BPF_JMP32 | BPF_JGT | BPF_X: 873 case BPF_JMP32 | BPF_JSGT | BPF_K: 874 case BPF_JMP32 | BPF_JSGT | BPF_X: 875 true_cond = COND_GT; 876 goto cond_branch; 877 case BPF_JMP | BPF_JLT | BPF_K: 878 case BPF_JMP | BPF_JLT | BPF_X: 879 case BPF_JMP | BPF_JSLT | BPF_K: 880 case BPF_JMP | BPF_JSLT | BPF_X: 881 case BPF_JMP32 | BPF_JLT | BPF_K: 882 case BPF_JMP32 | BPF_JLT | BPF_X: 883 case BPF_JMP32 | BPF_JSLT | BPF_K: 884 case BPF_JMP32 | BPF_JSLT | BPF_X: 885 true_cond = COND_LT; 886 goto cond_branch; 887 case BPF_JMP | BPF_JGE | BPF_K: 888 case BPF_JMP | BPF_JGE | BPF_X: 889 case BPF_JMP | BPF_JSGE | BPF_K: 890 case BPF_JMP | BPF_JSGE | BPF_X: 891 case BPF_JMP32 | BPF_JGE | BPF_K: 892 case BPF_JMP32 | BPF_JGE | BPF_X: 893 case BPF_JMP32 | BPF_JSGE | BPF_K: 894 case BPF_JMP32 | BPF_JSGE | BPF_X: 895 true_cond = COND_GE; 896 goto cond_branch; 897 case BPF_JMP | BPF_JLE | BPF_K: 898 case BPF_JMP | BPF_JLE | BPF_X: 899 case BPF_JMP | BPF_JSLE | BPF_K: 900 case BPF_JMP | BPF_JSLE | BPF_X: 901 case BPF_JMP32 | BPF_JLE | BPF_K: 902 case BPF_JMP32 | BPF_JLE | BPF_X: 903 case BPF_JMP32 | BPF_JSLE | BPF_K: 904 case BPF_JMP32 | BPF_JSLE | BPF_X: 905 true_cond = COND_LE; 906 goto cond_branch; 907 case BPF_JMP | BPF_JEQ | BPF_K: 908 case BPF_JMP | BPF_JEQ | BPF_X: 909 case BPF_JMP32 | BPF_JEQ | BPF_K: 910 case BPF_JMP32 | BPF_JEQ | BPF_X: 911 true_cond = COND_EQ; 912 goto cond_branch; 913 case BPF_JMP | BPF_JNE | BPF_K: 914 case BPF_JMP | BPF_JNE | BPF_X: 915 case BPF_JMP32 | BPF_JNE | BPF_K: 916 case BPF_JMP32 | BPF_JNE | BPF_X: 917 true_cond = COND_NE; 918 goto cond_branch; 919 case BPF_JMP | BPF_JSET | BPF_K: 920 case BPF_JMP | BPF_JSET | BPF_X: 921 case BPF_JMP32 | BPF_JSET | BPF_K: 922 case BPF_JMP32 | BPF_JSET | BPF_X: 923 true_cond = COND_NE; 924 /* fallthrough; */ 925 926 cond_branch: 927 switch (code) { 928 case BPF_JMP | BPF_JGT | BPF_X: 929 case BPF_JMP | BPF_JLT | BPF_X: 930 case BPF_JMP | BPF_JGE | BPF_X: 931 case BPF_JMP | BPF_JLE | BPF_X: 932 case BPF_JMP | BPF_JEQ | BPF_X: 933 case BPF_JMP | BPF_JNE | BPF_X: 934 /* unsigned comparison */ 935 EMIT(PPC_RAW_CMPLW(dst_reg_h, src_reg_h)); 936 PPC_BCC_SHORT(COND_NE, (ctx->idx + 2) * 4); 937 EMIT(PPC_RAW_CMPLW(dst_reg, src_reg)); 938 break; 939 case BPF_JMP32 | BPF_JGT | BPF_X: 940 case BPF_JMP32 | BPF_JLT | BPF_X: 941 case BPF_JMP32 | BPF_JGE | BPF_X: 942 case BPF_JMP32 | BPF_JLE | BPF_X: 943 case BPF_JMP32 | BPF_JEQ | BPF_X: 944 case BPF_JMP32 | BPF_JNE | BPF_X: 945 /* unsigned comparison */ 946 EMIT(PPC_RAW_CMPLW(dst_reg, src_reg)); 947 break; 948 case BPF_JMP | BPF_JSGT | BPF_X: 949 case BPF_JMP | BPF_JSLT | BPF_X: 950 case BPF_JMP | BPF_JSGE | BPF_X: 951 case BPF_JMP | BPF_JSLE | BPF_X: 952 /* signed comparison */ 953 EMIT(PPC_RAW_CMPW(dst_reg_h, src_reg_h)); 954 PPC_BCC_SHORT(COND_NE, (ctx->idx + 2) * 4); 955 EMIT(PPC_RAW_CMPLW(dst_reg, src_reg)); 956 break; 957 case BPF_JMP32 | BPF_JSGT | BPF_X: 958 case BPF_JMP32 | BPF_JSLT | BPF_X: 959 case BPF_JMP32 | BPF_JSGE | BPF_X: 960 case BPF_JMP32 | BPF_JSLE | BPF_X: 961 /* signed comparison */ 962 EMIT(PPC_RAW_CMPW(dst_reg, src_reg)); 963 break; 964 case BPF_JMP | BPF_JSET | BPF_X: 965 EMIT(PPC_RAW_AND_DOT(__REG_R0, dst_reg_h, src_reg_h)); 966 PPC_BCC_SHORT(COND_NE, (ctx->idx + 2) * 4); 967 EMIT(PPC_RAW_AND_DOT(__REG_R0, dst_reg, src_reg)); 968 break; 969 case BPF_JMP32 | BPF_JSET | BPF_X: { 970 EMIT(PPC_RAW_AND_DOT(__REG_R0, dst_reg, src_reg)); 971 break; 972 case BPF_JMP | BPF_JNE | BPF_K: 973 case BPF_JMP | BPF_JEQ | BPF_K: 974 case BPF_JMP | BPF_JGT | BPF_K: 975 case BPF_JMP | BPF_JLT | BPF_K: 976 case BPF_JMP | BPF_JGE | BPF_K: 977 case BPF_JMP | BPF_JLE | BPF_K: 978 /* 979 * Need sign-extended load, so only positive 980 * values can be used as imm in cmplwi 981 */ 982 if (imm >= 0 && imm < 32768) { 983 EMIT(PPC_RAW_CMPLWI(dst_reg_h, 0)); 984 PPC_BCC_SHORT(COND_NE, (ctx->idx + 2) * 4); 985 EMIT(PPC_RAW_CMPLWI(dst_reg, imm)); 986 } else { 987 /* sign-extending load ... but unsigned comparison */ 988 PPC_EX32(__REG_R0, imm); 989 EMIT(PPC_RAW_CMPLW(dst_reg_h, __REG_R0)); 990 PPC_LI32(__REG_R0, imm); 991 PPC_BCC_SHORT(COND_NE, (ctx->idx + 2) * 4); 992 EMIT(PPC_RAW_CMPLW(dst_reg, __REG_R0)); 993 } 994 break; 995 case BPF_JMP32 | BPF_JNE | BPF_K: 996 case BPF_JMP32 | BPF_JEQ | BPF_K: 997 case BPF_JMP32 | BPF_JGT | BPF_K: 998 case BPF_JMP32 | BPF_JLT | BPF_K: 999 case BPF_JMP32 | BPF_JGE | BPF_K: 1000 case BPF_JMP32 | BPF_JLE | BPF_K: 1001 if (imm >= 0 && imm < 65536) { 1002 EMIT(PPC_RAW_CMPLWI(dst_reg, imm)); 1003 } else { 1004 PPC_LI32(__REG_R0, imm); 1005 EMIT(PPC_RAW_CMPLW(dst_reg, __REG_R0)); 1006 } 1007 break; 1008 } 1009 case BPF_JMP | BPF_JSGT | BPF_K: 1010 case BPF_JMP | BPF_JSLT | BPF_K: 1011 case BPF_JMP | BPF_JSGE | BPF_K: 1012 case BPF_JMP | BPF_JSLE | BPF_K: 1013 if (imm >= 0 && imm < 65536) { 1014 EMIT(PPC_RAW_CMPWI(dst_reg_h, imm < 0 ? -1 : 0)); 1015 PPC_BCC_SHORT(COND_NE, (ctx->idx + 2) * 4); 1016 EMIT(PPC_RAW_CMPLWI(dst_reg, imm)); 1017 } else { 1018 /* sign-extending load */ 1019 EMIT(PPC_RAW_CMPWI(dst_reg_h, imm < 0 ? -1 : 0)); 1020 PPC_LI32(__REG_R0, imm); 1021 PPC_BCC_SHORT(COND_NE, (ctx->idx + 2) * 4); 1022 EMIT(PPC_RAW_CMPLW(dst_reg, __REG_R0)); 1023 } 1024 break; 1025 case BPF_JMP32 | BPF_JSGT | BPF_K: 1026 case BPF_JMP32 | BPF_JSLT | BPF_K: 1027 case BPF_JMP32 | BPF_JSGE | BPF_K: 1028 case BPF_JMP32 | BPF_JSLE | BPF_K: 1029 /* 1030 * signed comparison, so any 16-bit value 1031 * can be used in cmpwi 1032 */ 1033 if (imm >= -32768 && imm < 32768) { 1034 EMIT(PPC_RAW_CMPWI(dst_reg, imm)); 1035 } else { 1036 /* sign-extending load */ 1037 PPC_LI32(__REG_R0, imm); 1038 EMIT(PPC_RAW_CMPW(dst_reg, __REG_R0)); 1039 } 1040 break; 1041 case BPF_JMP | BPF_JSET | BPF_K: 1042 /* andi does not sign-extend the immediate */ 1043 if (imm >= 0 && imm < 32768) { 1044 /* PPC_ANDI is _only/always_ dot-form */ 1045 EMIT(PPC_RAW_ANDI(__REG_R0, dst_reg, imm)); 1046 } else { 1047 PPC_LI32(__REG_R0, imm); 1048 if (imm < 0) { 1049 EMIT(PPC_RAW_CMPWI(dst_reg_h, 0)); 1050 PPC_BCC_SHORT(COND_NE, (ctx->idx + 2) * 4); 1051 } 1052 EMIT(PPC_RAW_AND_DOT(__REG_R0, dst_reg, __REG_R0)); 1053 } 1054 break; 1055 case BPF_JMP32 | BPF_JSET | BPF_K: 1056 /* andi does not sign-extend the immediate */ 1057 if (imm >= -32768 && imm < 32768) { 1058 /* PPC_ANDI is _only/always_ dot-form */ 1059 EMIT(PPC_RAW_ANDI(__REG_R0, dst_reg, imm)); 1060 } else { 1061 PPC_LI32(__REG_R0, imm); 1062 EMIT(PPC_RAW_AND_DOT(__REG_R0, dst_reg, __REG_R0)); 1063 } 1064 break; 1065 } 1066 PPC_BCC(true_cond, addrs[i + 1 + off]); 1067 break; 1068 1069 /* 1070 * Tail call 1071 */ 1072 case BPF_JMP | BPF_TAIL_CALL: 1073 ctx->seen |= SEEN_TAILCALL; 1074 bpf_jit_emit_tail_call(image, ctx, addrs[i + 1]); 1075 break; 1076 1077 default: 1078 /* 1079 * The filter contains something cruel & unusual. 1080 * We don't handle it, but also there shouldn't be 1081 * anything missing from our list. 1082 */ 1083 pr_err_ratelimited("eBPF filter opcode %04x (@%d) unsupported\n", code, i); 1084 return -EOPNOTSUPP; 1085 } 1086 if (BPF_CLASS(code) == BPF_ALU && !fp->aux->verifier_zext && 1087 !insn_is_zext(&insn[i + 1])) 1088 EMIT(PPC_RAW_LI(dst_reg_h, 0)); 1089 } 1090 1091 /* Set end-of-body-code address for exit. */ 1092 addrs[i] = ctx->idx * 4; 1093 1094 return 0; 1095 } 1096