1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * bpf_jit.h: BPF JIT compiler for PPC 4 * 5 * Copyright 2011 Matt Evans <matt@ozlabs.org>, IBM Corporation 6 * 2016 Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> 7 */ 8 #ifndef _BPF_JIT_H 9 #define _BPF_JIT_H 10 11 #ifndef __ASSEMBLY__ 12 13 #include <asm/types.h> 14 #include <asm/ppc-opcode.h> 15 #include <linux/build_bug.h> 16 17 #ifdef CONFIG_PPC64_ELF_ABI_V1 18 #define FUNCTION_DESCR_SIZE 24 19 #else 20 #define FUNCTION_DESCR_SIZE 0 21 #endif 22 23 #define CTX_NIA(ctx) ((unsigned long)ctx->idx * 4) 24 25 #define SZL sizeof(unsigned long) 26 #define BPF_INSN_SAFETY 64 27 28 #define PLANT_INSTR(d, idx, instr) \ 29 do { if (d) { (d)[idx] = instr; } idx++; } while (0) 30 #define EMIT(instr) PLANT_INSTR(image, ctx->idx, instr) 31 32 /* Long jump; (unconditional 'branch') */ 33 #define PPC_JMP(dest) \ 34 do { \ 35 long offset = (long)(dest) - CTX_NIA(ctx); \ 36 if ((dest) != 0 && !is_offset_in_branch_range(offset)) { \ 37 pr_err_ratelimited("Branch offset 0x%lx (@%u) out of range\n", offset, ctx->idx); \ 38 return -ERANGE; \ 39 } \ 40 EMIT(PPC_RAW_BRANCH(offset)); \ 41 } while (0) 42 43 /* "cond" here covers BO:BI fields. */ 44 #define PPC_BCC_SHORT(cond, dest) \ 45 do { \ 46 long offset = (long)(dest) - CTX_NIA(ctx); \ 47 if ((dest) != 0 && !is_offset_in_cond_branch_range(offset)) { \ 48 pr_err_ratelimited("Conditional branch offset 0x%lx (@%u) out of range\n", offset, ctx->idx); \ 49 return -ERANGE; \ 50 } \ 51 EMIT(PPC_INST_BRANCH_COND | (((cond) & 0x3ff) << 16) | (offset & 0xfffc)); \ 52 } while (0) 53 54 /* 55 * Sign-extended 32-bit immediate load 56 * 57 * If this is a dummy pass (!image), account for 58 * maximum possible instructions. 59 */ 60 #define PPC_LI32(d, i) do { \ 61 if (!image) \ 62 ctx->idx += 2; \ 63 else { \ 64 if ((int)(uintptr_t)(i) >= -32768 && \ 65 (int)(uintptr_t)(i) < 32768) \ 66 EMIT(PPC_RAW_LI(d, i)); \ 67 else { \ 68 EMIT(PPC_RAW_LIS(d, IMM_H(i))); \ 69 if (IMM_L(i)) \ 70 EMIT(PPC_RAW_ORI(d, d, IMM_L(i))); \ 71 } \ 72 } } while (0) 73 74 #ifdef CONFIG_PPC64 75 /* If dummy pass (!image), account for maximum possible instructions */ 76 #define PPC_LI64(d, i) do { \ 77 if (!image) \ 78 ctx->idx += 5; \ 79 else { \ 80 if ((long)(i) >= -2147483648 && \ 81 (long)(i) < 2147483648) \ 82 PPC_LI32(d, i); \ 83 else { \ 84 if (!((uintptr_t)(i) & 0xffff800000000000ULL)) \ 85 EMIT(PPC_RAW_LI(d, ((uintptr_t)(i) >> 32) & \ 86 0xffff)); \ 87 else { \ 88 EMIT(PPC_RAW_LIS(d, ((uintptr_t)(i) >> 48))); \ 89 if ((uintptr_t)(i) & 0x0000ffff00000000ULL) \ 90 EMIT(PPC_RAW_ORI(d, d, \ 91 ((uintptr_t)(i) >> 32) & 0xffff)); \ 92 } \ 93 EMIT(PPC_RAW_SLDI(d, d, 32)); \ 94 if ((uintptr_t)(i) & 0x00000000ffff0000ULL) \ 95 EMIT(PPC_RAW_ORIS(d, d, \ 96 ((uintptr_t)(i) >> 16) & 0xffff)); \ 97 if ((uintptr_t)(i) & 0x000000000000ffffULL) \ 98 EMIT(PPC_RAW_ORI(d, d, (uintptr_t)(i) & \ 99 0xffff)); \ 100 } \ 101 } } while (0) 102 #define PPC_LI_ADDR PPC_LI64 103 104 #ifndef CONFIG_PPC_KERNEL_PCREL 105 #define PPC64_LOAD_PACA() \ 106 EMIT(PPC_RAW_LD(_R2, _R13, offsetof(struct paca_struct, kernel_toc))) 107 #else 108 #define PPC64_LOAD_PACA() do {} while (0) 109 #endif 110 #else 111 #define PPC_LI64(d, i) BUILD_BUG() 112 #define PPC_LI_ADDR PPC_LI32 113 #define PPC64_LOAD_PACA() BUILD_BUG() 114 #endif 115 116 /* 117 * The fly in the ointment of code size changing from pass to pass is 118 * avoided by padding the short branch case with a NOP. If code size differs 119 * with different branch reaches we will have the issue of code moving from 120 * one pass to the next and will need a few passes to converge on a stable 121 * state. 122 */ 123 #define PPC_BCC(cond, dest) do { \ 124 if (is_offset_in_cond_branch_range((long)(dest) - CTX_NIA(ctx))) { \ 125 PPC_BCC_SHORT(cond, dest); \ 126 EMIT(PPC_RAW_NOP()); \ 127 } else { \ 128 /* Flip the 'T or F' bit to invert comparison */ \ 129 PPC_BCC_SHORT(cond ^ COND_CMP_TRUE, CTX_NIA(ctx) + 2*4); \ 130 PPC_JMP(dest); \ 131 } } while(0) 132 133 /* To create a branch condition, select a bit of cr0... */ 134 #define CR0_LT 0 135 #define CR0_GT 1 136 #define CR0_EQ 2 137 /* ...and modify BO[3] */ 138 #define COND_CMP_TRUE 0x100 139 #define COND_CMP_FALSE 0x000 140 /* Together, they make all required comparisons: */ 141 #define COND_GT (CR0_GT | COND_CMP_TRUE) 142 #define COND_GE (CR0_LT | COND_CMP_FALSE) 143 #define COND_EQ (CR0_EQ | COND_CMP_TRUE) 144 #define COND_NE (CR0_EQ | COND_CMP_FALSE) 145 #define COND_LT (CR0_LT | COND_CMP_TRUE) 146 #define COND_LE (CR0_GT | COND_CMP_FALSE) 147 148 #define SEEN_FUNC 0x20000000 /* might call external helpers */ 149 #define SEEN_TAILCALL 0x40000000 /* uses tail calls */ 150 151 struct codegen_context { 152 /* 153 * This is used to track register usage as well 154 * as calls to external helpers. 155 * - register usage is tracked with corresponding 156 * bits (r3-r31) 157 * - rest of the bits can be used to track other 158 * things -- for now, we use bits 0 to 2 159 * encoded in SEEN_* macros above 160 */ 161 unsigned int seen; 162 unsigned int idx; 163 unsigned int stack_size; 164 int b2p[MAX_BPF_JIT_REG + 2]; 165 unsigned int exentry_idx; 166 unsigned int alt_exit_addr; 167 }; 168 169 #define bpf_to_ppc(r) (ctx->b2p[r]) 170 171 #ifdef CONFIG_PPC32 172 #define BPF_FIXUP_LEN 3 /* Three instructions => 12 bytes */ 173 #else 174 #define BPF_FIXUP_LEN 2 /* Two instructions => 8 bytes */ 175 #endif 176 177 static inline bool bpf_is_seen_register(struct codegen_context *ctx, int i) 178 { 179 return ctx->seen & (1 << (31 - i)); 180 } 181 182 static inline void bpf_set_seen_register(struct codegen_context *ctx, int i) 183 { 184 ctx->seen |= 1 << (31 - i); 185 } 186 187 static inline void bpf_clear_seen_register(struct codegen_context *ctx, int i) 188 { 189 ctx->seen &= ~(1 << (31 - i)); 190 } 191 192 void bpf_jit_init_reg_mapping(struct codegen_context *ctx); 193 int bpf_jit_emit_func_call_rel(u32 *image, u32 *fimage, struct codegen_context *ctx, u64 func); 194 int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, u32 *fimage, struct codegen_context *ctx, 195 u32 *addrs, int pass, bool extra_pass); 196 void bpf_jit_build_prologue(u32 *image, struct codegen_context *ctx); 197 void bpf_jit_build_epilogue(u32 *image, struct codegen_context *ctx); 198 void bpf_jit_build_fentry_stubs(u32 *image, struct codegen_context *ctx); 199 void bpf_jit_realloc_regs(struct codegen_context *ctx); 200 int bpf_jit_emit_exit_insn(u32 *image, struct codegen_context *ctx, int tmp_reg, long exit_addr); 201 202 int bpf_add_extable_entry(struct bpf_prog *fp, u32 *image, u32 *fimage, int pass, 203 struct codegen_context *ctx, int insn_idx, 204 int jmp_off, int dst_reg); 205 206 #endif 207 208 #endif 209