xref: /linux/arch/powerpc/net/bpf_jit.h (revision 7f4f3b14e8079ecde096bd734af10e30d40c27b7)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * bpf_jit.h: BPF JIT compiler for PPC
4  *
5  * Copyright 2011 Matt Evans <matt@ozlabs.org>, IBM Corporation
6  * 	     2016 Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
7  */
8 #ifndef _BPF_JIT_H
9 #define _BPF_JIT_H
10 
11 #ifndef __ASSEMBLY__
12 
13 #include <asm/types.h>
14 #include <asm/ppc-opcode.h>
15 #include <linux/build_bug.h>
16 
17 #ifdef CONFIG_PPC64_ELF_ABI_V1
18 #define FUNCTION_DESCR_SIZE	24
19 #else
20 #define FUNCTION_DESCR_SIZE	0
21 #endif
22 
23 #define CTX_NIA(ctx) ((unsigned long)ctx->idx * 4)
24 
25 #define SZL			sizeof(unsigned long)
26 #define BPF_INSN_SAFETY		64
27 
28 #define PLANT_INSTR(d, idx, instr)					      \
29 	do { if (d) { (d)[idx] = instr; } idx++; } while (0)
30 #define EMIT(instr)		PLANT_INSTR(image, ctx->idx, instr)
31 
32 /* Long jump; (unconditional 'branch') */
33 #define PPC_JMP(dest)							      \
34 	do {								      \
35 		long offset = (long)(dest) - CTX_NIA(ctx);		      \
36 		if ((dest) != 0 && !is_offset_in_branch_range(offset)) {		      \
37 			pr_err_ratelimited("Branch offset 0x%lx (@%u) out of range\n", offset, ctx->idx);			\
38 			return -ERANGE;					      \
39 		}							      \
40 		EMIT(PPC_RAW_BRANCH(offset));				      \
41 	} while (0)
42 
43 /* "cond" here covers BO:BI fields. */
44 #define PPC_BCC_SHORT(cond, dest)					      \
45 	do {								      \
46 		long offset = (long)(dest) - CTX_NIA(ctx);		      \
47 		if ((dest) != 0 && !is_offset_in_cond_branch_range(offset)) {		      \
48 			pr_err_ratelimited("Conditional branch offset 0x%lx (@%u) out of range\n", offset, ctx->idx);		\
49 			return -ERANGE;					      \
50 		}							      \
51 		EMIT(PPC_INST_BRANCH_COND | (((cond) & 0x3ff) << 16) | (offset & 0xfffc));					\
52 	} while (0)
53 
54 /* Sign-extended 32-bit immediate load */
55 #define PPC_LI32(d, i)		do {					      \
56 		if ((int)(uintptr_t)(i) >= -32768 &&			      \
57 				(int)(uintptr_t)(i) < 32768)		      \
58 			EMIT(PPC_RAW_LI(d, i));				      \
59 		else {							      \
60 			EMIT(PPC_RAW_LIS(d, IMM_H(i)));			      \
61 			if (IMM_L(i))					      \
62 				EMIT(PPC_RAW_ORI(d, d, IMM_L(i)));	      \
63 		} } while(0)
64 
65 #ifdef CONFIG_PPC64
66 #define PPC_LI64(d, i)		do {					      \
67 		if ((long)(i) >= -2147483648 &&				      \
68 				(long)(i) < 2147483648)			      \
69 			PPC_LI32(d, i);					      \
70 		else {							      \
71 			if (!((uintptr_t)(i) & 0xffff800000000000ULL))	      \
72 				EMIT(PPC_RAW_LI(d, ((uintptr_t)(i) >> 32) &   \
73 						0xffff));		      \
74 			else {						      \
75 				EMIT(PPC_RAW_LIS(d, ((uintptr_t)(i) >> 48))); \
76 				if ((uintptr_t)(i) & 0x0000ffff00000000ULL)   \
77 					EMIT(PPC_RAW_ORI(d, d,		      \
78 					  ((uintptr_t)(i) >> 32) & 0xffff));  \
79 			}						      \
80 			EMIT(PPC_RAW_SLDI(d, d, 32));			      \
81 			if ((uintptr_t)(i) & 0x00000000ffff0000ULL)	      \
82 				EMIT(PPC_RAW_ORIS(d, d,			      \
83 					 ((uintptr_t)(i) >> 16) & 0xffff));   \
84 			if ((uintptr_t)(i) & 0x000000000000ffffULL)	      \
85 				EMIT(PPC_RAW_ORI(d, d, (uintptr_t)(i) &       \
86 							0xffff));             \
87 		} } while (0)
88 #define PPC_LI_ADDR	PPC_LI64
89 
90 #ifndef CONFIG_PPC_KERNEL_PCREL
91 #define PPC64_LOAD_PACA()						      \
92 	EMIT(PPC_RAW_LD(_R2, _R13, offsetof(struct paca_struct, kernel_toc)))
93 #else
94 #define PPC64_LOAD_PACA()	do {} while (0)
95 #endif
96 #else
97 #define PPC_LI64(d, i)	BUILD_BUG()
98 #define PPC_LI_ADDR	PPC_LI32
99 #define PPC64_LOAD_PACA() BUILD_BUG()
100 #endif
101 
102 /*
103  * The fly in the ointment of code size changing from pass to pass is
104  * avoided by padding the short branch case with a NOP.	 If code size differs
105  * with different branch reaches we will have the issue of code moving from
106  * one pass to the next and will need a few passes to converge on a stable
107  * state.
108  */
109 #define PPC_BCC(cond, dest)	do {					      \
110 		if (is_offset_in_cond_branch_range((long)(dest) - CTX_NIA(ctx))) {	\
111 			PPC_BCC_SHORT(cond, dest);			      \
112 			EMIT(PPC_RAW_NOP());				      \
113 		} else {						      \
114 			/* Flip the 'T or F' bit to invert comparison */      \
115 			PPC_BCC_SHORT(cond ^ COND_CMP_TRUE, CTX_NIA(ctx) + 2*4);  \
116 			PPC_JMP(dest);					      \
117 		} } while(0)
118 
119 /* To create a branch condition, select a bit of cr0... */
120 #define CR0_LT		0
121 #define CR0_GT		1
122 #define CR0_EQ		2
123 /* ...and modify BO[3] */
124 #define COND_CMP_TRUE	0x100
125 #define COND_CMP_FALSE	0x000
126 /* Together, they make all required comparisons: */
127 #define COND_GT		(CR0_GT | COND_CMP_TRUE)
128 #define COND_GE		(CR0_LT | COND_CMP_FALSE)
129 #define COND_EQ		(CR0_EQ | COND_CMP_TRUE)
130 #define COND_NE		(CR0_EQ | COND_CMP_FALSE)
131 #define COND_LT		(CR0_LT | COND_CMP_TRUE)
132 #define COND_LE		(CR0_GT | COND_CMP_FALSE)
133 
134 #define SEEN_FUNC	0x20000000 /* might call external helpers */
135 #define SEEN_TAILCALL	0x40000000 /* uses tail calls */
136 
137 struct codegen_context {
138 	/*
139 	 * This is used to track register usage as well
140 	 * as calls to external helpers.
141 	 * - register usage is tracked with corresponding
142 	 *   bits (r3-r31)
143 	 * - rest of the bits can be used to track other
144 	 *   things -- for now, we use bits 0 to 2
145 	 *   encoded in SEEN_* macros above
146 	 */
147 	unsigned int seen;
148 	unsigned int idx;
149 	unsigned int stack_size;
150 	int b2p[MAX_BPF_JIT_REG + 2];
151 	unsigned int exentry_idx;
152 	unsigned int alt_exit_addr;
153 };
154 
155 #define bpf_to_ppc(r)	(ctx->b2p[r])
156 
157 #ifdef CONFIG_PPC32
158 #define BPF_FIXUP_LEN	3 /* Three instructions => 12 bytes */
159 #else
160 #define BPF_FIXUP_LEN	2 /* Two instructions => 8 bytes */
161 #endif
162 
163 static inline bool bpf_is_seen_register(struct codegen_context *ctx, int i)
164 {
165 	return ctx->seen & (1 << (31 - i));
166 }
167 
168 static inline void bpf_set_seen_register(struct codegen_context *ctx, int i)
169 {
170 	ctx->seen |= 1 << (31 - i);
171 }
172 
173 static inline void bpf_clear_seen_register(struct codegen_context *ctx, int i)
174 {
175 	ctx->seen &= ~(1 << (31 - i));
176 }
177 
178 void bpf_jit_init_reg_mapping(struct codegen_context *ctx);
179 int bpf_jit_emit_func_call_rel(u32 *image, u32 *fimage, struct codegen_context *ctx, u64 func);
180 int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, u32 *fimage, struct codegen_context *ctx,
181 		       u32 *addrs, int pass, bool extra_pass);
182 void bpf_jit_build_prologue(u32 *image, struct codegen_context *ctx);
183 void bpf_jit_build_epilogue(u32 *image, struct codegen_context *ctx);
184 void bpf_jit_build_fentry_stubs(u32 *image, struct codegen_context *ctx);
185 void bpf_jit_realloc_regs(struct codegen_context *ctx);
186 int bpf_jit_emit_exit_insn(u32 *image, struct codegen_context *ctx, int tmp_reg, long exit_addr);
187 
188 int bpf_add_extable_entry(struct bpf_prog *fp, u32 *image, u32 *fimage, int pass,
189 			  struct codegen_context *ctx, int insn_idx,
190 			  int jmp_off, int dst_reg);
191 
192 #endif
193 
194 #endif
195