1 /* 2 * bpf_jit.h: BPF JIT compiler for PPC 3 * 4 * Copyright 2011 Matt Evans <matt@ozlabs.org>, IBM Corporation 5 * 2016 Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; version 2 10 * of the License. 11 */ 12 #ifndef _BPF_JIT_H 13 #define _BPF_JIT_H 14 15 #ifndef __ASSEMBLY__ 16 17 #include <asm/types.h> 18 19 #ifdef PPC64_ELF_ABI_v1 20 #define FUNCTION_DESCR_SIZE 24 21 #else 22 #define FUNCTION_DESCR_SIZE 0 23 #endif 24 25 /* 26 * 16-bit immediate helper macros: HA() is for use with sign-extending instrs 27 * (e.g. LD, ADDI). If the bottom 16 bits is "-ve", add another bit into the 28 * top half to negate the effect (i.e. 0xffff + 1 = 0x(1)0000). 29 */ 30 #define IMM_H(i) ((uintptr_t)(i)>>16) 31 #define IMM_HA(i) (((uintptr_t)(i)>>16) + \ 32 (((uintptr_t)(i) & 0x8000) >> 15)) 33 #define IMM_L(i) ((uintptr_t)(i) & 0xffff) 34 35 #define PLANT_INSTR(d, idx, instr) \ 36 do { if (d) { (d)[idx] = instr; } idx++; } while (0) 37 #define EMIT(instr) PLANT_INSTR(image, ctx->idx, instr) 38 39 #define PPC_NOP() EMIT(PPC_INST_NOP) 40 #define PPC_BLR() EMIT(PPC_INST_BLR) 41 #define PPC_BLRL() EMIT(PPC_INST_BLRL) 42 #define PPC_MTLR(r) EMIT(PPC_INST_MTLR | ___PPC_RT(r)) 43 #define PPC_ADDI(d, a, i) EMIT(PPC_INST_ADDI | ___PPC_RT(d) | \ 44 ___PPC_RA(a) | IMM_L(i)) 45 #define PPC_MR(d, a) PPC_OR(d, a, a) 46 #define PPC_LI(r, i) PPC_ADDI(r, 0, i) 47 #define PPC_ADDIS(d, a, i) EMIT(PPC_INST_ADDIS | \ 48 ___PPC_RT(d) | ___PPC_RA(a) | IMM_L(i)) 49 #define PPC_LIS(r, i) PPC_ADDIS(r, 0, i) 50 #define PPC_STD(r, base, i) EMIT(PPC_INST_STD | ___PPC_RS(r) | \ 51 ___PPC_RA(base) | ((i) & 0xfffc)) 52 #define PPC_STDU(r, base, i) EMIT(PPC_INST_STDU | ___PPC_RS(r) | \ 53 ___PPC_RA(base) | ((i) & 0xfffc)) 54 #define PPC_STW(r, base, i) EMIT(PPC_INST_STW | ___PPC_RS(r) | \ 55 ___PPC_RA(base) | IMM_L(i)) 56 #define PPC_STWU(r, base, i) EMIT(PPC_INST_STWU | ___PPC_RS(r) | \ 57 ___PPC_RA(base) | IMM_L(i)) 58 #define PPC_STH(r, base, i) EMIT(PPC_INST_STH | ___PPC_RS(r) | \ 59 ___PPC_RA(base) | IMM_L(i)) 60 #define PPC_STB(r, base, i) EMIT(PPC_INST_STB | ___PPC_RS(r) | \ 61 ___PPC_RA(base) | IMM_L(i)) 62 63 #define PPC_LBZ(r, base, i) EMIT(PPC_INST_LBZ | ___PPC_RT(r) | \ 64 ___PPC_RA(base) | IMM_L(i)) 65 #define PPC_LD(r, base, i) EMIT(PPC_INST_LD | ___PPC_RT(r) | \ 66 ___PPC_RA(base) | IMM_L(i)) 67 #define PPC_LWZ(r, base, i) EMIT(PPC_INST_LWZ | ___PPC_RT(r) | \ 68 ___PPC_RA(base) | IMM_L(i)) 69 #define PPC_LHZ(r, base, i) EMIT(PPC_INST_LHZ | ___PPC_RT(r) | \ 70 ___PPC_RA(base) | IMM_L(i)) 71 #define PPC_LHBRX(r, base, b) EMIT(PPC_INST_LHBRX | ___PPC_RT(r) | \ 72 ___PPC_RA(base) | ___PPC_RB(b)) 73 #define PPC_LDBRX(r, base, b) EMIT(PPC_INST_LDBRX | ___PPC_RT(r) | \ 74 ___PPC_RA(base) | ___PPC_RB(b)) 75 76 #define PPC_BPF_LDARX(t, a, b, eh) EMIT(PPC_INST_LDARX | ___PPC_RT(t) | \ 77 ___PPC_RA(a) | ___PPC_RB(b) | \ 78 __PPC_EH(eh)) 79 #define PPC_BPF_LWARX(t, a, b, eh) EMIT(PPC_INST_LWARX | ___PPC_RT(t) | \ 80 ___PPC_RA(a) | ___PPC_RB(b) | \ 81 __PPC_EH(eh)) 82 #define PPC_BPF_STWCX(s, a, b) EMIT(PPC_INST_STWCX | ___PPC_RS(s) | \ 83 ___PPC_RA(a) | ___PPC_RB(b)) 84 #define PPC_BPF_STDCX(s, a, b) EMIT(PPC_INST_STDCX | ___PPC_RS(s) | \ 85 ___PPC_RA(a) | ___PPC_RB(b)) 86 87 #ifdef CONFIG_PPC64 88 #define PPC_BPF_LL(r, base, i) do { PPC_LD(r, base, i); } while(0) 89 #define PPC_BPF_STL(r, base, i) do { PPC_STD(r, base, i); } while(0) 90 #define PPC_BPF_STLU(r, base, i) do { PPC_STDU(r, base, i); } while(0) 91 #else 92 #define PPC_BPF_LL(r, base, i) do { PPC_LWZ(r, base, i); } while(0) 93 #define PPC_BPF_STL(r, base, i) do { PPC_STW(r, base, i); } while(0) 94 #define PPC_BPF_STLU(r, base, i) do { PPC_STWU(r, base, i); } while(0) 95 #endif 96 97 #define PPC_CMPWI(a, i) EMIT(PPC_INST_CMPWI | ___PPC_RA(a) | IMM_L(i)) 98 #define PPC_CMPDI(a, i) EMIT(PPC_INST_CMPDI | ___PPC_RA(a) | IMM_L(i)) 99 #define PPC_CMPW(a, b) EMIT(PPC_INST_CMPW | ___PPC_RA(a) | \ 100 ___PPC_RB(b)) 101 #define PPC_CMPD(a, b) EMIT(PPC_INST_CMPD | ___PPC_RA(a) | \ 102 ___PPC_RB(b)) 103 #define PPC_CMPLWI(a, i) EMIT(PPC_INST_CMPLWI | ___PPC_RA(a) | IMM_L(i)) 104 #define PPC_CMPLDI(a, i) EMIT(PPC_INST_CMPLDI | ___PPC_RA(a) | IMM_L(i)) 105 #define PPC_CMPLW(a, b) EMIT(PPC_INST_CMPLW | ___PPC_RA(a) | \ 106 ___PPC_RB(b)) 107 #define PPC_CMPLD(a, b) EMIT(PPC_INST_CMPLD | ___PPC_RA(a) | \ 108 ___PPC_RB(b)) 109 110 #define PPC_SUB(d, a, b) EMIT(PPC_INST_SUB | ___PPC_RT(d) | \ 111 ___PPC_RB(a) | ___PPC_RA(b)) 112 #define PPC_ADD(d, a, b) EMIT(PPC_INST_ADD | ___PPC_RT(d) | \ 113 ___PPC_RA(a) | ___PPC_RB(b)) 114 #define PPC_MULD(d, a, b) EMIT(PPC_INST_MULLD | ___PPC_RT(d) | \ 115 ___PPC_RA(a) | ___PPC_RB(b)) 116 #define PPC_MULW(d, a, b) EMIT(PPC_INST_MULLW | ___PPC_RT(d) | \ 117 ___PPC_RA(a) | ___PPC_RB(b)) 118 #define PPC_MULHWU(d, a, b) EMIT(PPC_INST_MULHWU | ___PPC_RT(d) | \ 119 ___PPC_RA(a) | ___PPC_RB(b)) 120 #define PPC_MULI(d, a, i) EMIT(PPC_INST_MULLI | ___PPC_RT(d) | \ 121 ___PPC_RA(a) | IMM_L(i)) 122 #define PPC_DIVWU(d, a, b) EMIT(PPC_INST_DIVWU | ___PPC_RT(d) | \ 123 ___PPC_RA(a) | ___PPC_RB(b)) 124 #define PPC_DIVD(d, a, b) EMIT(PPC_INST_DIVD | ___PPC_RT(d) | \ 125 ___PPC_RA(a) | ___PPC_RB(b)) 126 #define PPC_AND(d, a, b) EMIT(PPC_INST_AND | ___PPC_RA(d) | \ 127 ___PPC_RS(a) | ___PPC_RB(b)) 128 #define PPC_ANDI(d, a, i) EMIT(PPC_INST_ANDI | ___PPC_RA(d) | \ 129 ___PPC_RS(a) | IMM_L(i)) 130 #define PPC_AND_DOT(d, a, b) EMIT(PPC_INST_ANDDOT | ___PPC_RA(d) | \ 131 ___PPC_RS(a) | ___PPC_RB(b)) 132 #define PPC_OR(d, a, b) EMIT(PPC_INST_OR | ___PPC_RA(d) | \ 133 ___PPC_RS(a) | ___PPC_RB(b)) 134 #define PPC_MR(d, a) PPC_OR(d, a, a) 135 #define PPC_ORI(d, a, i) EMIT(PPC_INST_ORI | ___PPC_RA(d) | \ 136 ___PPC_RS(a) | IMM_L(i)) 137 #define PPC_ORIS(d, a, i) EMIT(PPC_INST_ORIS | ___PPC_RA(d) | \ 138 ___PPC_RS(a) | IMM_L(i)) 139 #define PPC_XOR(d, a, b) EMIT(PPC_INST_XOR | ___PPC_RA(d) | \ 140 ___PPC_RS(a) | ___PPC_RB(b)) 141 #define PPC_XORI(d, a, i) EMIT(PPC_INST_XORI | ___PPC_RA(d) | \ 142 ___PPC_RS(a) | IMM_L(i)) 143 #define PPC_XORIS(d, a, i) EMIT(PPC_INST_XORIS | ___PPC_RA(d) | \ 144 ___PPC_RS(a) | IMM_L(i)) 145 #define PPC_EXTSW(d, a) EMIT(PPC_INST_EXTSW | ___PPC_RA(d) | \ 146 ___PPC_RS(a)) 147 #define PPC_SLW(d, a, s) EMIT(PPC_INST_SLW | ___PPC_RA(d) | \ 148 ___PPC_RS(a) | ___PPC_RB(s)) 149 #define PPC_SLD(d, a, s) EMIT(PPC_INST_SLD | ___PPC_RA(d) | \ 150 ___PPC_RS(a) | ___PPC_RB(s)) 151 #define PPC_SRW(d, a, s) EMIT(PPC_INST_SRW | ___PPC_RA(d) | \ 152 ___PPC_RS(a) | ___PPC_RB(s)) 153 #define PPC_SRD(d, a, s) EMIT(PPC_INST_SRD | ___PPC_RA(d) | \ 154 ___PPC_RS(a) | ___PPC_RB(s)) 155 #define PPC_SRAD(d, a, s) EMIT(PPC_INST_SRAD | ___PPC_RA(d) | \ 156 ___PPC_RS(a) | ___PPC_RB(s)) 157 #define PPC_SRADI(d, a, i) EMIT(PPC_INST_SRADI | ___PPC_RA(d) | \ 158 ___PPC_RS(a) | __PPC_SH(i) | \ 159 (((i) & 0x20) >> 4)) 160 #define PPC_RLWINM(d, a, i, mb, me) EMIT(PPC_INST_RLWINM | ___PPC_RA(d) | \ 161 ___PPC_RS(a) | __PPC_SH(i) | \ 162 __PPC_MB(mb) | __PPC_ME(me)) 163 #define PPC_RLWIMI(d, a, i, mb, me) EMIT(PPC_INST_RLWIMI | ___PPC_RA(d) | \ 164 ___PPC_RS(a) | __PPC_SH(i) | \ 165 __PPC_MB(mb) | __PPC_ME(me)) 166 #define PPC_RLDICL(d, a, i, mb) EMIT(PPC_INST_RLDICL | ___PPC_RA(d) | \ 167 ___PPC_RS(a) | __PPC_SH(i) | \ 168 __PPC_MB64(mb) | (((i) & 0x20) >> 4)) 169 #define PPC_RLDICR(d, a, i, me) EMIT(PPC_INST_RLDICR | ___PPC_RA(d) | \ 170 ___PPC_RS(a) | __PPC_SH(i) | \ 171 __PPC_ME64(me) | (((i) & 0x20) >> 4)) 172 173 /* slwi = rlwinm Rx, Ry, n, 0, 31-n */ 174 #define PPC_SLWI(d, a, i) PPC_RLWINM(d, a, i, 0, 31-(i)) 175 /* srwi = rlwinm Rx, Ry, 32-n, n, 31 */ 176 #define PPC_SRWI(d, a, i) PPC_RLWINM(d, a, 32-(i), i, 31) 177 /* sldi = rldicr Rx, Ry, n, 63-n */ 178 #define PPC_SLDI(d, a, i) PPC_RLDICR(d, a, i, 63-(i)) 179 /* sldi = rldicl Rx, Ry, 64-n, n */ 180 #define PPC_SRDI(d, a, i) PPC_RLDICL(d, a, 64-(i), i) 181 182 #define PPC_NEG(d, a) EMIT(PPC_INST_NEG | ___PPC_RT(d) | ___PPC_RA(a)) 183 184 /* Long jump; (unconditional 'branch') */ 185 #define PPC_JMP(dest) EMIT(PPC_INST_BRANCH | \ 186 (((dest) - (ctx->idx * 4)) & 0x03fffffc)) 187 /* "cond" here covers BO:BI fields. */ 188 #define PPC_BCC_SHORT(cond, dest) EMIT(PPC_INST_BRANCH_COND | \ 189 (((cond) & 0x3ff) << 16) | \ 190 (((dest) - (ctx->idx * 4)) & \ 191 0xfffc)) 192 /* Sign-extended 32-bit immediate load */ 193 #define PPC_LI32(d, i) do { \ 194 if ((int)(uintptr_t)(i) >= -32768 && \ 195 (int)(uintptr_t)(i) < 32768) \ 196 PPC_LI(d, i); \ 197 else { \ 198 PPC_LIS(d, IMM_H(i)); \ 199 if (IMM_L(i)) \ 200 PPC_ORI(d, d, IMM_L(i)); \ 201 } } while(0) 202 203 #define PPC_LI64(d, i) do { \ 204 if ((long)(i) >= -2147483648 && \ 205 (long)(i) < 2147483648) \ 206 PPC_LI32(d, i); \ 207 else { \ 208 if (!((uintptr_t)(i) & 0xffff800000000000ULL)) \ 209 PPC_LI(d, ((uintptr_t)(i) >> 32) & 0xffff); \ 210 else { \ 211 PPC_LIS(d, ((uintptr_t)(i) >> 48)); \ 212 if ((uintptr_t)(i) & 0x0000ffff00000000ULL) \ 213 PPC_ORI(d, d, \ 214 ((uintptr_t)(i) >> 32) & 0xffff); \ 215 } \ 216 PPC_SLDI(d, d, 32); \ 217 if ((uintptr_t)(i) & 0x00000000ffff0000ULL) \ 218 PPC_ORIS(d, d, \ 219 ((uintptr_t)(i) >> 16) & 0xffff); \ 220 if ((uintptr_t)(i) & 0x000000000000ffffULL) \ 221 PPC_ORI(d, d, (uintptr_t)(i) & 0xffff); \ 222 } } while (0) 223 224 #ifdef CONFIG_PPC64 225 #define PPC_FUNC_ADDR(d,i) do { PPC_LI64(d, i); } while(0) 226 #else 227 #define PPC_FUNC_ADDR(d,i) do { PPC_LI32(d, i); } while(0) 228 #endif 229 230 static inline bool is_nearbranch(int offset) 231 { 232 return (offset < 32768) && (offset >= -32768); 233 } 234 235 /* 236 * The fly in the ointment of code size changing from pass to pass is 237 * avoided by padding the short branch case with a NOP. If code size differs 238 * with different branch reaches we will have the issue of code moving from 239 * one pass to the next and will need a few passes to converge on a stable 240 * state. 241 */ 242 #define PPC_BCC(cond, dest) do { \ 243 if (is_nearbranch((dest) - (ctx->idx * 4))) { \ 244 PPC_BCC_SHORT(cond, dest); \ 245 PPC_NOP(); \ 246 } else { \ 247 /* Flip the 'T or F' bit to invert comparison */ \ 248 PPC_BCC_SHORT(cond ^ COND_CMP_TRUE, (ctx->idx+2)*4); \ 249 PPC_JMP(dest); \ 250 } } while(0) 251 252 /* To create a branch condition, select a bit of cr0... */ 253 #define CR0_LT 0 254 #define CR0_GT 1 255 #define CR0_EQ 2 256 /* ...and modify BO[3] */ 257 #define COND_CMP_TRUE 0x100 258 #define COND_CMP_FALSE 0x000 259 /* Together, they make all required comparisons: */ 260 #define COND_GT (CR0_GT | COND_CMP_TRUE) 261 #define COND_GE (CR0_LT | COND_CMP_FALSE) 262 #define COND_EQ (CR0_EQ | COND_CMP_TRUE) 263 #define COND_NE (CR0_EQ | COND_CMP_FALSE) 264 #define COND_LT (CR0_LT | COND_CMP_TRUE) 265 266 #endif 267 268 #endif 269