xref: /linux/arch/powerpc/mm/book3s64/radix_hugetlbpage.c (revision 9190d4a263264eabf715f5fc1827da45e3fdc247)
1 // SPDX-License-Identifier: GPL-2.0
2 #include <linux/mm.h>
3 #include <linux/hugetlb.h>
4 #include <linux/security.h>
5 #include <asm/cacheflush.h>
6 #include <asm/machdep.h>
7 #include <asm/mman.h>
8 #include <asm/tlb.h>
9 
10 void radix__flush_hugetlb_page(struct vm_area_struct *vma, unsigned long vmaddr)
11 {
12 	int psize;
13 	struct hstate *hstate = hstate_file(vma->vm_file);
14 
15 	psize = hstate_get_psize(hstate);
16 	radix__flush_tlb_page_psize(vma->vm_mm, vmaddr, psize);
17 }
18 
19 void radix__local_flush_hugetlb_page(struct vm_area_struct *vma, unsigned long vmaddr)
20 {
21 	int psize;
22 	struct hstate *hstate = hstate_file(vma->vm_file);
23 
24 	psize = hstate_get_psize(hstate);
25 	radix__local_flush_tlb_page_psize(vma->vm_mm, vmaddr, psize);
26 }
27 
28 void radix__flush_hugetlb_tlb_range(struct vm_area_struct *vma, unsigned long start,
29 				   unsigned long end)
30 {
31 	int psize;
32 	struct hstate *hstate = hstate_file(vma->vm_file);
33 
34 	psize = hstate_get_psize(hstate);
35 	/*
36 	 * Flush PWC even if we get PUD_SIZE hugetlb invalidate to keep this simpler.
37 	 */
38 	if (end - start >= PUD_SIZE)
39 		radix__flush_tlb_pwc_range_psize(vma->vm_mm, start, end, psize);
40 	else
41 		radix__flush_tlb_range_psize(vma->vm_mm, start, end, psize);
42 }
43 
44 void radix__huge_ptep_modify_prot_commit(struct vm_area_struct *vma,
45 					 unsigned long addr, pte_t *ptep,
46 					 pte_t old_pte, pte_t pte)
47 {
48 	struct mm_struct *mm = vma->vm_mm;
49 
50 	/*
51 	 * POWER9 NMMU must flush the TLB after clearing the PTE before
52 	 * installing a PTE with more relaxed access permissions, see
53 	 * radix__ptep_set_access_flags.
54 	 */
55 	if (!cpu_has_feature(CPU_FTR_ARCH_31) &&
56 	    is_pte_rw_upgrade(pte_val(old_pte), pte_val(pte)) &&
57 	    atomic_read(&mm->context.copros) > 0)
58 		radix__flush_hugetlb_page(vma, addr);
59 
60 	set_huge_pte_at(vma->vm_mm, addr, ptep, pte);
61 }
62